mx6: soc: update get_cpu_rev and get_imx_type for mx6solo/sololite

Previously, the same value was returned for both mx6dl and mx6solo.
Check number of processors to differeniate.
Also, a freescale patch says that sololite has its cpu/rev
stored at 0x280 instead of 0x260.
I don't have a sololite to verify.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index bc65767..a8aad5d 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -31,17 +31,33 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/imx-common/boot_mode.h>
 
+struct scu_regs {
+       u32     ctrl;
+       u32     config;
+       u32     status;
+       u32     invalidate;
+       u32     fpga_rev;
+};
+
 u32 get_cpu_rev(void)
 {
        struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
-       int reg = readl(&anatop->digprog);
-
-       /* Read mx6 variant: quad, dual or solo */
-       int system_rev = (reg >> 4) & 0xFF000;
-       /* Read mx6 silicon revision */
-       system_rev |= (reg & 0xFF) + 0x10;
-
-       return system_rev;
+       u32 reg = readl(&anatop->digprog_sololite);
+       u32 type = ((reg >> 16) & 0xff);
+
+       if (type != MXC_CPU_MX6SL) {
+               reg = readl(&anatop->digprog);
+               type = ((reg >> 16) & 0xff);
+               if (type == MXC_CPU_MX6DL) {
+                       struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
+                       u32 cfg = readl(&scu->config) & 3;
+
+                       if (!cfg)
+                               type = MXC_CPU_MX6SOLO;
+               }
+       }
+       reg &= 0xff;            /* mx6 silicon revision */
+       return (type << 12) | (reg + 0x10);
 }
 
 void init_aips(void)

diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index a10d12d..102c254 100644 (file)
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -67,18 +67,20 @@ char *get_reset_cause(void)
 
 #if defined(CONFIG_DISPLAY_CPUINFO)
 
-static const char *get_imx_type(u32 imxtype)
+const char *get_imx_type(u32 imxtype)
 {
        switch (imxtype) {
-       case 0x63:
+       case MXC_CPU_MX6Q:
                return "6Q";    /* Quad-core version of the mx6 */
-       case 0x61:
-               return "6DS";   /* Dual/Solo version of the mx6 */
-       case 0x60:
+       case MXC_CPU_MX6DL:
+               return "6DL";   /* Dual Lite version of the mx6 */
+       case MXC_CPU_MX6SOLO:
+               return "6SOLO"; /* Solo version of the mx6 */
+       case MXC_CPU_MX6SL:
                return "6SL";   /* Solo-Lite version of the mx6 */
-       case 0x51:
+       case MXC_CPU_MX51:
                return "51";
-       case 0x53:
+       case MXC_CPU_MX53:
                return "53";
        default:
                return "??";

diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h
index 7b5246e..4435be1 100644 (file)
--- a/arch/arm/include/asm/arch-mx5/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx5/sys_proto.h
@@ -24,8 +24,15 @@
 #ifndef _SYS_PROTO_H_
 #define _SYS_PROTO_H_
 
-u32 get_cpu_rev(void);
+#define MXC_CPU_MX51           0x51
+#define MXC_CPU_MX53           0x53
+#define MXC_CPU_MX6SL          0x60
+#define MXC_CPU_MX6DL          0x61
+#define MXC_CPU_MX6SOLO                0x62
+#define MXC_CPU_MX6Q           0x63
+
 #define is_soc_rev(rev)        ((get_cpu_rev() & 0xFF) - rev)
+u32 get_cpu_rev(void);
 void sdelay(unsigned long);
 void set_chipselect_size(int const);
 

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 09ab010..3eb0081 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -564,6 +564,8 @@ struct anatop_regs {
        u32     usb2_misc_clr;          /* 0x258 */
        u32     usb2_misc_tog;          /* 0x25c */
        u32     digprog;                /* 0x260 */
+       u32     reserved1[7];
+       u32     digprog_sololite;       /* 0x280 */
 };
 
 #define ANATOP_PFD_480_PFD0_FRAC_SHIFT         0

diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h
index 711b30d..6627bbc 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx6/sys_proto.h
@@ -24,9 +24,16 @@
 #ifndef _SYS_PROTO_H_
 #define _SYS_PROTO_H_
 
-#define is_soc_rev(rev)        ((get_cpu_rev() & 0xFF) - rev)
+#define MXC_CPU_MX51           0x51
+#define MXC_CPU_MX53           0x53
+#define MXC_CPU_MX6SL          0x60
+#define MXC_CPU_MX6DL          0x61
+#define MXC_CPU_MX6SOLO                0x62
+#define MXC_CPU_MX6Q           0x63
 
+#define is_soc_rev(rev)        ((get_cpu_rev() & 0xFF) - rev)
 u32 get_cpu_rev(void);
+const char *get_imx_type(u32 imxtype);
 
 void set_vddsoc(u32 mv);