drm/i915/bxt: Explicitly clear the Turbo control register

As a part of WaGsvDisableTurbo, Driver makes an early exit from the
Gen9 Turbo enabling function, so doesn't program the Turbo Control register.
But BIOS could leave the Hw Turbo as enabled, so need to explicitly clear
out the Control register just to avoid inconsitency with debugfs
interface, which will show Turbo as enabled only and that is not expected
after adding the WaGsvDisableTurbo. Apart from this there is no problem
even if the Turbo is left enabled in the Control register, as the Up/Down
interrupts would remain masked.

v2: Add explicit clearing of Turbo Control register to *_disable_rps()
    also for the similar consistency (Chris)

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Akash Goel <akash.goel@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1461350146-23454-2-git-send-email-akash.goel@intel.com
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b7c2186..695a464 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4587,7 +4587,7 @@ void intel_set_rps(struct drm_device *dev, u8 val)
                gen6_set_rps(dev, val);
 }
 
-static void gen9_disable_rps(struct drm_device *dev)
+static void gen9_disable_rc6(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
 
@@ -4595,12 +4595,20 @@ static void gen9_disable_rps(struct drm_device *dev)
        I915_WRITE(GEN9_PG_ENABLE, 0);
 }
 
+static void gen9_disable_rps(struct drm_device *dev)
+{
+       struct drm_i915_private *dev_priv = dev->dev_private;
+
+       I915_WRITE(GEN6_RP_CONTROL, 0);
+}
+
 static void gen6_disable_rps(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
 
        I915_WRITE(GEN6_RC_CONTROL, 0);
        I915_WRITE(GEN6_RPNSWREQ, 1 << 31);
+       I915_WRITE(GEN6_RP_CONTROL, 0);
 }
 
 static void cherryview_disable_rps(struct drm_device *dev)
@@ -4804,6 +4812,16 @@ static void gen9_enable_rps(struct drm_device *dev)
 
        /* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */
        if (IS_BXT_REVID(dev, 0, BXT_REVID_A1)) {
+               /*
+                * BIOS could leave the Hw Turbo enabled, so need to explicitly
+                * clear out the Control register just to avoid inconsitency
+                * with debugfs interface, which will show  Turbo as enabled
+                * only and that is not expected by the User after adding the
+                * WaGsvDisableTurbo. Apart from this there is no problem even
+                * if the Turbo is left enabled in the Control register, as the
+                * Up/Down interrupts would remain masked.
+                */
+               gen9_disable_rps(dev);
                intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
                return;
        }
@@ -6268,9 +6286,10 @@ void intel_disable_gt_powersave(struct drm_device *dev)
                intel_suspend_gt_powersave(dev);
 
                mutex_lock(&dev_priv->rps.hw_lock);
-               if (INTEL_INFO(dev)->gen >= 9)
+               if (INTEL_INFO(dev)->gen >= 9) {
+                       gen9_disable_rc6(dev);
                        gen9_disable_rps(dev);
-               else if (IS_CHERRYVIEW(dev))
+               } else if (IS_CHERRYVIEW(dev))
                        cherryview_disable_rps(dev);
                else if (IS_VALLEYVIEW(dev))
                        valleyview_disable_rps(dev);