name_collection m_set_names;
reg_to_regs_map m_value_regs_map;
reg_to_regs_map m_invalidate_regs_map;
- dynamic_reg_size_map m_dynamic_reg_size_map;
size_t m_reg_data_byte_size = 0u; // The number of bytes required to store
// all registers
bool m_finalized = false;
virtual const RegisterInfo *GetRegisterInfoAtIndex(size_t reg) = 0;
- // Detect the register size dynamically.
- uint32_t UpdateDynamicRegisterSize(const lldb_private::ArchSpec &arch,
- RegisterInfo *reg_info);
-
virtual size_t GetRegisterSetCount() = 0;
virtual const RegisterSet *GetRegisterSet(size_t reg_set) = 0;
/// this register changes. For example, the invalidate list for eax would be
/// rax ax, ah, and al.
uint32_t *invalidate_regs;
- /// A DWARF expression that when evaluated gives the byte size of this
- /// register.
- const uint8_t *dynamic_size_dwarf_expr_bytes;
- /// The length of the DWARF expression in bytes in the
- /// dynamic_size_dwarf_expr_bytes member.
- size_t dynamic_size_dwarf_len;
llvm::ArrayRef<uint8_t> data(const uint8_t *context_base) const {
return llvm::ArrayRef<uint8_t>(context_base + byte_offset, byte_size);
DEFINE_REG_NAME(dwarf_num), DEFINE_REG_NAME_STR(str_name), \
0, 0, eEncodingInvalid, eFormatDefault, \
{ dwarf_num, dwarf_num, generic_num, LLDB_INVALID_REGNUM, dwarf_num }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr \
}
#define DEFINE_REGISTER_STUB(dwarf_num, str_name) \
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r1",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r2",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r3",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r4",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r5",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r6",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r7",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r8",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r9",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r10",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r11",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r12",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"sp",
"r13",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"lr",
"r14",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"pc",
"r15",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"cpsr",
"psr",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s0",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s1",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s2",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s3",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s4",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s5",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s6",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s7",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s8",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s9",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s10",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s11",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s12",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s13",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s14",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s15",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s16",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s17",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s18",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s19",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s20",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s21",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s22",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s23",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s24",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s25",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s26",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s27",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s28",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s29",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s30",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s31",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"fpscr",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d0",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d1",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d2",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d3",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d4",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d5",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d6",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d7",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d8",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d9",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d10",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d11",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d12",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d13",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d14",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d15",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d16",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d17",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d18",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d19",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d20",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d21",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d22",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d23",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d24",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d25",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d26",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d27",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d28",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d29",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d30",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d31",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r8_usr",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r9_usr",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r10_usr",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r11_usr",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r12_usr",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r13_usr",
"sp_usr",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r14_usr",
"lr_usr",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r8_fiq",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r9_fiq",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r10_fiq",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r11_fiq",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r12_fiq",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r13_fiq",
"sp_fiq",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r14_fiq",
"lr_fiq",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r13_irq",
"sp_irq",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r14_irq",
"lr_irq",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r13_abt",
"sp_abt",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r14_abt",
"lr_abt",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r13_und",
"sp_und",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r14_und",
"lr_und",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r13_svc",
"sp_svc",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r14_svc",
"lr_svc",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0}};
+ }};
static const uint32_t k_num_register_infos =
llvm::array_lengthof(g_register_infos);
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r1",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r2",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r3",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r4",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r5",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r6",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r7",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r8",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r9",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r10",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r11",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r12",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"sp",
"r13",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"lr",
"r14",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"pc",
"r15",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"cpsr",
"psr",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s0",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s1",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s2",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s3",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s4",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s5",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s6",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s7",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s8",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s9",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s10",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s11",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s12",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s13",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s14",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s15",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s16",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s17",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s18",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s19",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s20",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s21",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s22",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s23",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s24",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s25",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s26",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s27",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s28",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s29",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s30",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s31",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"fpscr",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d0",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d1",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d2",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d3",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d4",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d5",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d6",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d7",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d8",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d9",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d10",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d11",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d12",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d13",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d14",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d15",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d16",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d17",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d18",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d19",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d20",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d21",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d22",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d23",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d24",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d25",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d26",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d27",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d28",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d29",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d30",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d31",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r8_usr",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r9_usr",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r10_usr",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r11_usr",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r12_usr",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r13_usr",
"sp_usr",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r14_usr",
"lr_usr",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r8_fiq",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r9_fiq",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r10_fiq",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r11_fiq",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r12_fiq",
nullptr,
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r13_fiq",
"sp_fiq",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r14_fiq",
"lr_fiq",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r13_irq",
"sp_irq",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r14_irq",
"lr_irq",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r13_abt",
"sp_abt",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r14_abt",
"lr_abt",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r13_und",
"sp_und",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r14_und",
"lr_und",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r13_svc",
"sp_svc",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r14_svc",
"lr_svc",
4,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0}};
+ }};
static const uint32_t k_num_register_infos =
llvm::array_lengthof(g_register_infos);
{0, 0, LLDB_INVALID_REGNUM, 0, 0},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r01",
"",
4,
{1, 1, LLDB_INVALID_REGNUM, 1, 1},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r02",
"",
4,
{2, 2, LLDB_INVALID_REGNUM, 2, 2},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r03",
"",
4,
{3, 3, LLDB_INVALID_REGNUM, 3, 3},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r04",
"",
4,
{4, 4, LLDB_INVALID_REGNUM, 4, 4},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r05",
"",
4,
{5, 5, LLDB_INVALID_REGNUM, 5, 5},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r06",
"",
4,
{6, 6, LLDB_INVALID_REGNUM, 6, 6},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r07",
"",
4,
{7, 7, LLDB_INVALID_REGNUM, 7, 7},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r08",
"",
4,
{8, 8, LLDB_INVALID_REGNUM, 8, 8},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r09",
"",
4,
{9, 9, LLDB_INVALID_REGNUM, 9, 9},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r10",
"",
4,
{10, 10, LLDB_INVALID_REGNUM, 10, 10},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r11",
"",
4,
{11, 11, LLDB_INVALID_REGNUM, 11, 11},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r12",
"",
4,
{12, 12, LLDB_INVALID_REGNUM, 12, 12},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r13",
"",
4,
{13, 13, LLDB_INVALID_REGNUM, 13, 13},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r14",
"",
4,
{14, 14, LLDB_INVALID_REGNUM, 14, 14},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r15",
"",
4,
{15, 15, LLDB_INVALID_REGNUM, 15, 15},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r16",
"",
4,
{16, 16, LLDB_INVALID_REGNUM, 16, 16},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r17",
"",
4,
{17, 17, LLDB_INVALID_REGNUM, 17, 17},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r18",
"",
4,
{18, 18, LLDB_INVALID_REGNUM, 18, 18},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r19",
"",
4,
{19, 19, LLDB_INVALID_REGNUM, 19, 19},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r20",
"",
4,
{20, 20, LLDB_INVALID_REGNUM, 20, 20},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r21",
"",
4,
{21, 21, LLDB_INVALID_REGNUM, 21, 21},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r22",
"",
4,
{22, 22, LLDB_INVALID_REGNUM, 22, 22},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r23",
"",
4,
{23, 23, LLDB_INVALID_REGNUM, 23, 23},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r24",
"",
4,
{24, 24, LLDB_INVALID_REGNUM, 24, 24},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r25",
"",
4,
{25, 25, LLDB_INVALID_REGNUM, 25, 25},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r26",
"",
4,
{26, 26, LLDB_INVALID_REGNUM, 26, 26},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r27",
"",
4,
{27, 27, LLDB_INVALID_REGNUM, 27, 27},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r28",
"",
4,
{28, 28, LLDB_INVALID_REGNUM, 28, 28},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"sp",
"r29",
4,
{29, 29, LLDB_REGNUM_GENERIC_SP, 29, 29},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"fp",
"r30",
4,
{30, 30, LLDB_REGNUM_GENERIC_FP, 30, 30},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"lr",
"r31",
4,
{31, 31, LLDB_REGNUM_GENERIC_RA, 31, 31},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"sa0",
"",
4,
{32, 32, LLDB_INVALID_REGNUM, 32, 32},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"lc0",
"",
4,
{33, 33, LLDB_INVALID_REGNUM, 33, 33},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"sa1",
"",
4,
{34, 34, LLDB_INVALID_REGNUM, 34, 34},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"lc1",
"",
4,
{35, 35, LLDB_INVALID_REGNUM, 35, 35},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
// --> hexagon-v4/5/55/56-sim.xml
{"p3_0",
"",
{36, 36, LLDB_INVALID_REGNUM, 36, 36},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
// PADDING {
{"p00",
"",
{37, 37, LLDB_INVALID_REGNUM, 37, 37},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
// }
{"m0",
"",
{38, 38, LLDB_INVALID_REGNUM, 38, 38},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"m1",
"",
4,
{39, 39, LLDB_INVALID_REGNUM, 39, 39},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"usr",
"",
4,
{40, 40, LLDB_INVALID_REGNUM, 40, 40},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"pc",
"",
4,
{41, 41, LLDB_REGNUM_GENERIC_PC, 41, 41},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"ugp",
"",
4,
{42, 42, LLDB_INVALID_REGNUM, 42, 42},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"gp",
"",
4,
{43, 43, LLDB_INVALID_REGNUM, 43, 43},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"cs0",
"",
4,
{44, 44, LLDB_INVALID_REGNUM, 44, 44},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"cs1",
"",
4,
{45, 45, LLDB_INVALID_REGNUM, 45, 45},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
// PADDING {
{"p01",
"",
{46, 46, LLDB_INVALID_REGNUM, 46, 46},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p02",
"",
4,
{47, 47, LLDB_INVALID_REGNUM, 47, 47},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p03",
"",
4,
{48, 48, LLDB_INVALID_REGNUM, 48, 48},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p04",
"",
4,
{49, 49, LLDB_INVALID_REGNUM, 49, 49},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p05",
"",
4,
{50, 50, LLDB_INVALID_REGNUM, 50, 50},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p06",
"",
4,
{51, 51, LLDB_INVALID_REGNUM, 51, 51},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p07",
"",
4,
{52, 52, LLDB_INVALID_REGNUM, 52, 52},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p08",
"",
4,
{53, 53, LLDB_INVALID_REGNUM, 53, 53},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p09",
"",
4,
{54, 54, LLDB_INVALID_REGNUM, 54, 54},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p10",
"",
4,
{55, 55, LLDB_INVALID_REGNUM, 55, 55},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p11",
"",
4,
{56, 56, LLDB_INVALID_REGNUM, 56, 56},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p12",
"",
4,
{57, 57, LLDB_INVALID_REGNUM, 57, 57},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p13",
"",
4,
{58, 58, LLDB_INVALID_REGNUM, 58, 58},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p14",
"",
4,
{59, 59, LLDB_INVALID_REGNUM, 59, 59},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p15",
"",
4,
{60, 60, LLDB_INVALID_REGNUM, 60, 60},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p16",
"",
4,
{61, 61, LLDB_INVALID_REGNUM, 61, 61},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p17",
"",
4,
{62, 62, LLDB_INVALID_REGNUM, 62, 62},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p18",
"",
4,
{63, 63, LLDB_INVALID_REGNUM, 63, 63},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
// }
{"sgp0",
"",
{64, 64, LLDB_INVALID_REGNUM, 64, 64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
// PADDING {
{"p19",
"",
{65, 65, LLDB_INVALID_REGNUM, 65, 65},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
// }
{"stid",
"",
{66, 66, LLDB_INVALID_REGNUM, 66, 66},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"elr",
"",
4,
{67, 67, LLDB_INVALID_REGNUM, 67, 67},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"badva0",
"",
4,
{68, 68, LLDB_INVALID_REGNUM, 68, 68},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"badva1",
"",
4,
{69, 69, LLDB_INVALID_REGNUM, 69, 69},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"ssr",
"",
4,
{70, 70, LLDB_INVALID_REGNUM, 70, 70},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"ccr",
"",
4,
{71, 71, LLDB_INVALID_REGNUM, 71, 71},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"htid",
"",
4,
{72, 72, LLDB_INVALID_REGNUM, 72, 72},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
// PADDING {
{"p20",
"",
{73, 73, LLDB_INVALID_REGNUM, 73, 73},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
// }
{"imask",
"",
{74, 74, LLDB_INVALID_REGNUM, 74, 74},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
// PADDING {
{"p21",
"",
{75, 75, LLDB_INVALID_REGNUM, 75, 75},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p22",
"",
4,
{76, 76, LLDB_INVALID_REGNUM, 76, 76},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p23",
"",
4,
{77, 77, LLDB_INVALID_REGNUM, 77, 77},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p24",
"",
4,
{78, 78, LLDB_INVALID_REGNUM, 78, 78},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"p25",
"",
4,
{79, 79, LLDB_INVALID_REGNUM, 79, 79},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
// }
{"g0",
"",
{80, 80, LLDB_INVALID_REGNUM, 80, 80},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"g1",
"",
4,
{81, 81, LLDB_INVALID_REGNUM, 81, 81},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"g2",
"",
4,
{82, 82, LLDB_INVALID_REGNUM, 82, 82},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"g3",
"",
4,
{83, 83, LLDB_INVALID_REGNUM, 83, 83},
nullptr,
nullptr,
- nullptr,
- 0}};
+ }};
static const uint32_t k_num_register_infos =
sizeof(g_register_infos) / sizeof(RegisterInfo);
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r1",
"AT",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r2",
"v0",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r3",
"v1",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r4",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r5",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r6",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r7",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r8",
"arg5",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r9",
"arg6",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r10",
"arg7",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r11",
"arg8",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r12",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r13",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r14",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r15",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r16",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r17",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r18",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r19",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r20",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r21",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r22",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r23",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r24",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r25",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r26",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r27",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r28",
"gp",
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r29",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r30",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r31",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"sr",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"lo",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"hi",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"bad",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"cause",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"pc",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
};
static const uint32_t k_num_register_infos =
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r1",
"AT",
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r2",
"v0",
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r3",
"v1",
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r4",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r5",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r6",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r7",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r8",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r9",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r10",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r11",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r12",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r13",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r14",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r15",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r16",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r17",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r18",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r19",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r20",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r21",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r22",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r23",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r24",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r25",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r26",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r27",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r28",
"gp",
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r29",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r30",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r31",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"sr",
nullptr,
4,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"lo",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"hi",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"bad",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"cause",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"pc",
nullptr,
8,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
};
static const uint32_t k_num_register_infos =
#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
{ \
#reg, alt, 8, 0, eEncodingUint, eFormatHex, {kind1, kind2, kind3, kind4 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
static const RegisterInfo g_register_infos[] = {
eFormatHex,
{dwarf_cfa, dwarf_cfa, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
- nullptr,
- nullptr,
- 0}};
+ }};
static const uint32_t k_num_register_infos =
llvm::array_lengthof(g_register_infos);
#name, alt, size, 0, eEncodingUint, eFormatHex, \
{dwarf_##name##_s390x, dwarf_##name##_s390x, generic, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
static const RegisterInfo g_register_infos[] = {
"na", nullptr, 8, 0, lldb::eEncodingUint, lldb::eFormatHex, \
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM}, \
- nullptr, nullptr, nullptr, 0
+ nullptr, nullptr
#define DECLARE_REGISTER_INFOS_ARM64_STRUCT
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM }, \
- nullptr, nullptr, nullptr, 0
+ nullptr, nullptr,
#define REG_CONTEXT_SIZE \
(sizeof(RegisterContextDarwin_arm::GPR) + \
sizeof(RegisterContextDarwin_arm::FPU) + \
{ehframe_r0, dwarf_r0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r0},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r1",
nullptr,
4,
{ehframe_r1, dwarf_r1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r1},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r2",
nullptr,
4,
{ehframe_r2, dwarf_r2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r2},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r3",
nullptr,
4,
{ehframe_r3, dwarf_r3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r3},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r4",
nullptr,
4,
{ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r4},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r5",
nullptr,
4,
{ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r5},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r6",
nullptr,
4,
{ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r6},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r7",
nullptr,
4,
gpr_r7},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r8",
nullptr,
4,
{ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r8},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r9",
nullptr,
4,
{ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r9},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r10",
nullptr,
4,
gpr_r10},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r11",
nullptr,
4,
gpr_r11},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r12",
nullptr,
4,
gpr_r12},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"sp",
"r13",
4,
gpr_sp},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"lr",
"r14",
4,
gpr_lr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"pc",
"r15",
4,
gpr_pc},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"cpsr",
"psr",
4,
gpr_cpsr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s0",
nullptr,
fpu_s0},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s1",
nullptr,
4,
fpu_s1},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s2",
nullptr,
4,
fpu_s2},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s3",
nullptr,
4,
fpu_s3},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s4",
nullptr,
4,
fpu_s4},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s5",
nullptr,
4,
fpu_s5},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s6",
nullptr,
4,
fpu_s6},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s7",
nullptr,
4,
fpu_s7},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s8",
nullptr,
4,
fpu_s8},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s9",
nullptr,
4,
fpu_s9},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s10",
nullptr,
4,
fpu_s10},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s11",
nullptr,
4,
fpu_s11},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s12",
nullptr,
4,
fpu_s12},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s13",
nullptr,
4,
fpu_s13},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s14",
nullptr,
4,
fpu_s14},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s15",
nullptr,
4,
fpu_s15},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s16",
nullptr,
4,
fpu_s16},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s17",
nullptr,
4,
fpu_s17},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s18",
nullptr,
4,
fpu_s18},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s19",
nullptr,
4,
fpu_s19},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s20",
nullptr,
4,
fpu_s20},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s21",
nullptr,
4,
fpu_s21},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s22",
nullptr,
4,
fpu_s22},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s23",
nullptr,
4,
fpu_s23},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s24",
nullptr,
4,
fpu_s24},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s25",
nullptr,
4,
fpu_s25},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s26",
nullptr,
4,
fpu_s26},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s27",
nullptr,
4,
fpu_s27},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s28",
nullptr,
4,
fpu_s28},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s29",
nullptr,
4,
fpu_s29},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s30",
nullptr,
4,
fpu_s30},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s31",
nullptr,
4,
fpu_s31},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"fpscr",
nullptr,
4,
LLDB_INVALID_REGNUM, fpu_fpscr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"exception",
nullptr,
LLDB_INVALID_REGNUM, exc_exception},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"fsr",
nullptr,
4,
LLDB_INVALID_REGNUM, exc_fsr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"far",
nullptr,
4,
LLDB_INVALID_REGNUM, exc_far},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_DBG(bvr, 0)},
{DEFINE_DBG(bvr, 1)},
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM }, \
- NULL, NULL, NULL, 0
+ NULL, NULL
#define REG_CONTEXT_SIZE \
(sizeof(RegisterContextDarwin_arm64::GPR) + \
sizeof(RegisterContextDarwin_arm64::FPU) + \
{LLDB_INVALID_REGNUM, dwarf_##reg##i, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
fpu_##reg##i }, \
- nullptr, nullptr, nullptr, 0
+ nullptr, nullptr,
#define DEFINE_EXC(reg) \
#reg, NULL, sizeof(((RegisterContextDarwin_i386::EXC *) NULL)->reg), \
gpr_eax},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(ebx, nullptr),
{ehframe_ebx, dwarf_ebx, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
gpr_ebx},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(ecx, nullptr),
{ehframe_ecx, dwarf_ecx, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
gpr_ecx},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(edx, nullptr),
{ehframe_edx, dwarf_edx, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
gpr_edx},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(edi, nullptr),
{ehframe_edi, dwarf_edi, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
gpr_edi},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(esi, nullptr),
{ehframe_esi, dwarf_esi, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
gpr_esi},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(ebp, "fp"),
{ehframe_ebp, dwarf_ebp, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM,
gpr_ebp},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(esp, "sp"),
{ehframe_esp, dwarf_esp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM,
gpr_esp},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(ss, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_ss},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(eflags, "flags"),
{ehframe_eflags, dwarf_eflags, LLDB_REGNUM_GENERIC_FLAGS,
LLDB_INVALID_REGNUM, gpr_eflags},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(eip, "pc"),
{ehframe_eip, dwarf_eip, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM,
gpr_eip},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(cs, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_cs},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(ds, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_ds},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(es, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_es},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(fs, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_fs},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(gs, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_gs},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(fcw),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_fcw},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(fsw),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_fsw},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(ftw),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_ftw},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(fop),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_fop},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(ip),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_ip},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(cs),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_cs},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(dp),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_dp},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(ds),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_ds},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(mxcsr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_mxcsr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(mxcsrmask),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_mxcsrmask},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_VECT(stmm, 0)},
{DEFINE_FPU_VECT(stmm, 1)},
{DEFINE_FPU_VECT(stmm, 2)},
LLDB_INVALID_REGNUM, exc_trapno},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_EXC(err),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, exc_err},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_EXC(faultvaddr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, exc_faultvaddr},
nullptr,
nullptr,
- nullptr,
- 0}};
+ }};
static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
{ehframe_dwarf_fpu_##reg##i, \
ehframe_dwarf_fpu_##reg##i, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, fpu_##reg##i }, \
- nullptr, nullptr, nullptr, 0
+ nullptr, nullptr,
#define DEFINE_EXC(reg) \
#reg, NULL, sizeof(((RegisterContextDarwin_x86_64::EXC *) NULL)->reg), \
EXC_OFFSET(reg), eEncodingUint, eFormatHex
LLDB_INVALID_REGNUM, gpr_rax},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rbx, nullptr),
{ehframe_dwarf_gpr_rbx, ehframe_dwarf_gpr_rbx, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_rbx},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rcx, nullptr),
{ehframe_dwarf_gpr_rcx, ehframe_dwarf_gpr_rcx, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_rcx},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rdx, nullptr),
{ehframe_dwarf_gpr_rdx, ehframe_dwarf_gpr_rdx, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_rdx},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rdi, nullptr),
{ehframe_dwarf_gpr_rdi, ehframe_dwarf_gpr_rdi, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_rdi},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rsi, nullptr),
{ehframe_dwarf_gpr_rsi, ehframe_dwarf_gpr_rsi, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_rsi},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rbp, "fp"),
{ehframe_dwarf_gpr_rbp, ehframe_dwarf_gpr_rbp, LLDB_REGNUM_GENERIC_FP,
LLDB_INVALID_REGNUM, gpr_rbp},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rsp, "sp"),
{ehframe_dwarf_gpr_rsp, ehframe_dwarf_gpr_rsp, LLDB_REGNUM_GENERIC_SP,
LLDB_INVALID_REGNUM, gpr_rsp},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r8, nullptr),
{ehframe_dwarf_gpr_r8, ehframe_dwarf_gpr_r8, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r8},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r9, nullptr),
{ehframe_dwarf_gpr_r9, ehframe_dwarf_gpr_r9, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r9},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r10, nullptr),
{ehframe_dwarf_gpr_r10, ehframe_dwarf_gpr_r10, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r10},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r11, nullptr),
{ehframe_dwarf_gpr_r11, ehframe_dwarf_gpr_r11, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r11},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r12, nullptr),
{ehframe_dwarf_gpr_r12, ehframe_dwarf_gpr_r12, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r12},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r13, nullptr),
{ehframe_dwarf_gpr_r13, ehframe_dwarf_gpr_r13, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r13},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r14, nullptr),
{ehframe_dwarf_gpr_r14, ehframe_dwarf_gpr_r14, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r14},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r15, nullptr),
{ehframe_dwarf_gpr_r15, ehframe_dwarf_gpr_r15, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r15},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rip, "pc"),
{ehframe_dwarf_gpr_rip, ehframe_dwarf_gpr_rip, LLDB_REGNUM_GENERIC_PC,
LLDB_INVALID_REGNUM, gpr_rip},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rflags, "flags"),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_REGNUM_GENERIC_FLAGS,
LLDB_INVALID_REGNUM, gpr_rflags},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(cs, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_cs},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(fs, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_fs},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(gs, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_gs},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(fcw),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_fcw},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(fsw),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_fsw},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(ftw),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_ftw},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(fop),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_fop},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(ip),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_ip},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(cs),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_cs},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(dp),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_dp},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(ds),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_ds},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(mxcsr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_mxcsr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_UINT(mxcsrmask),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_mxcsrmask},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_VECT(stmm, 0)},
{DEFINE_FPU_VECT(stmm, 1)},
{DEFINE_FPU_VECT(stmm, 2)},
LLDB_INVALID_REGNUM, exc_trapno},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_EXC(err),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, exc_err},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_EXC(faultvaddr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, exc_faultvaddr},
nullptr,
nullptr,
- nullptr,
- 0}};
+ }};
static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
RegisterContextLinux_i386::RegisterContextLinux_i386(
const ArchSpec &target_arch)
: RegisterInfoInterface(target_arch) {
- RegisterInfo orig_ax = {"orig_eax",
- nullptr,
- sizeof(((GPR *)nullptr)->orig_eax),
- (LLVM_EXTENSION offsetof(GPR, orig_eax)),
- eEncodingUint,
- eFormatHex,
- {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
- LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
- LLDB_INVALID_REGNUM},
- nullptr,
- nullptr,
- nullptr,
- 0};
+ RegisterInfo orig_ax = {
+ "orig_eax",
+ nullptr,
+ sizeof(((GPR *)nullptr)->orig_eax),
+ (LLVM_EXTENSION offsetof(GPR, orig_eax)),
+ eEncodingUint,
+ eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
+ nullptr,
+ nullptr,
+ };
d_register_infos.push_back(orig_ax);
}
m_register_info_p(GetRegisterInfoPtr(target_arch)),
m_register_info_count(GetRegisterInfoCount(target_arch)),
m_user_register_count(GetUserRegisterInfoCount(target_arch)) {
- RegisterInfo orig_ax = {"orig_rax",
- nullptr,
- sizeof(((GPR *)nullptr)->orig_rax),
- (LLVM_EXTENSION offsetof(GPR, orig_rax)),
- eEncodingUint,
- eFormatHex,
- {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
- LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
- LLDB_INVALID_REGNUM},
- nullptr,
- nullptr,
- nullptr,
- 0};
+ RegisterInfo orig_ax = {
+ "orig_rax",
+ nullptr,
+ sizeof(((GPR *)nullptr)->orig_rax),
+ (LLVM_EXTENSION offsetof(GPR, orig_rax)),
+ eEncodingUint,
+ eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
+ nullptr,
+ nullptr,
+ };
d_register_infos.push_back(orig_ax);
}
#reg, alt, sizeof(((GPR *)nullptr)->reg), GPR_OFFSET(reg), eEncodingUint, \
eFormatHex, \
{kind1, kind2, kind3, kind4, lldb_##reg##_i386 }, nullptr, nullptr, \
- nullptr, 0 \
}
// clang-format off
#reg, alt, sizeof(((GPR *)nullptr)->reg), GPR_OFFSET(reg), eEncodingUint, \
eFormatHex, \
{kind1, kind2, kind3, kind4, lldb_##reg##_x86_64 }, nullptr, nullptr, \
- nullptr, 0 \
}
typedef struct _FPReg {
eEncodingUint, eFormatVectorOfUInt64, \
{dwarf_##reg##_x86_64, dwarf_##reg##_x86_64, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_##reg##_x86_64 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
// clang-format off
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
dbg_##reg##i }, \
- NULL, NULL, NULL, 0
+ NULL, NULL,
#define REG_CONTEXT_SIZE \
(sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \
sizeof(RegisterInfoPOSIX_arm::EXC))
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
dbg_##reg##i }, \
- NULL, NULL, NULL, 0
+ NULL, NULL,
#define REG_CONTEXT_SIZE \
(sizeof(RegisterInfoPOSIX_arm64::GPR) + \
sizeof(RegisterInfoPOSIX_arm64::FPU) + \
gpr_r0},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r1",
nullptr,
4,
gpr_r1},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r2",
nullptr,
4,
gpr_r2},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r3",
nullptr,
4,
gpr_r3},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r4",
nullptr,
4,
{ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r4},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r5",
nullptr,
4,
{ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r5},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r6",
nullptr,
4,
{ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r6},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r7",
nullptr,
4,
{ehframe_r7, dwarf_r7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r7},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r8",
nullptr,
4,
{ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r8},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r9",
nullptr,
4,
{ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r9},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r10",
nullptr,
4,
gpr_r10},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r11",
nullptr,
4,
gpr_r11},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"r12",
nullptr,
4,
gpr_r12},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"sp",
"r13",
4,
gpr_sp},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"lr",
"r14",
4,
gpr_lr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"pc",
"r15",
4,
gpr_pc},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"cpsr",
"psr",
4,
gpr_cpsr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"s0",
nullptr,
fpu_s0},
nullptr,
g_s0_invalidates,
- nullptr,
- 0},
+ },
{"s1",
nullptr,
4,
fpu_s1},
nullptr,
g_s1_invalidates,
- nullptr,
- 0},
+ },
{"s2",
nullptr,
4,
fpu_s2},
nullptr,
g_s2_invalidates,
- nullptr,
- 0},
+ },
{"s3",
nullptr,
4,
fpu_s3},
nullptr,
g_s3_invalidates,
- nullptr,
- 0},
+ },
{"s4",
nullptr,
4,
fpu_s4},
nullptr,
g_s4_invalidates,
- nullptr,
- 0},
+ },
{"s5",
nullptr,
4,
fpu_s5},
nullptr,
g_s5_invalidates,
- nullptr,
- 0},
+ },
{"s6",
nullptr,
4,
fpu_s6},
nullptr,
g_s6_invalidates,
- nullptr,
- 0},
+ },
{"s7",
nullptr,
4,
fpu_s7},
nullptr,
g_s7_invalidates,
- nullptr,
- 0},
+ },
{"s8",
nullptr,
4,
fpu_s8},
nullptr,
g_s8_invalidates,
- nullptr,
- 0},
+ },
{"s9",
nullptr,
4,
fpu_s9},
nullptr,
g_s9_invalidates,
- nullptr,
- 0},
+ },
{"s10",
nullptr,
4,
fpu_s10},
nullptr,
g_s10_invalidates,
- nullptr,
- 0},
+ },
{"s11",
nullptr,
4,
fpu_s11},
nullptr,
g_s11_invalidates,
- nullptr,
- 0},
+ },
{"s12",
nullptr,
4,
fpu_s12},
nullptr,
g_s12_invalidates,
- nullptr,
- 0},
+ },
{"s13",
nullptr,
4,
fpu_s13},
nullptr,
g_s13_invalidates,
- nullptr,
- 0},
+ },
{"s14",
nullptr,
4,
fpu_s14},
nullptr,
g_s14_invalidates,
- nullptr,
- 0},
+ },
{"s15",
nullptr,
4,
fpu_s15},
nullptr,
g_s15_invalidates,
- nullptr,
- 0},
+ },
{"s16",
nullptr,
4,
fpu_s16},
nullptr,
g_s16_invalidates,
- nullptr,
- 0},
+ },
{"s17",
nullptr,
4,
fpu_s17},
nullptr,
g_s17_invalidates,
- nullptr,
- 0},
+ },
{"s18",
nullptr,
4,
fpu_s18},
nullptr,
g_s18_invalidates,
- nullptr,
- 0},
+ },
{"s19",
nullptr,
4,
fpu_s19},
nullptr,
g_s19_invalidates,
- nullptr,
- 0},
+ },
{"s20",
nullptr,
4,
fpu_s20},
nullptr,
g_s20_invalidates,
- nullptr,
- 0},
+ },
{"s21",
nullptr,
4,
fpu_s21},
nullptr,
g_s21_invalidates,
- nullptr,
- 0},
+ },
{"s22",
nullptr,
4,
fpu_s22},
nullptr,
g_s22_invalidates,
- nullptr,
- 0},
+ },
{"s23",
nullptr,
4,
fpu_s23},
nullptr,
g_s23_invalidates,
- nullptr,
- 0},
+ },
{"s24",
nullptr,
4,
fpu_s24},
nullptr,
g_s24_invalidates,
- nullptr,
- 0},
+ },
{"s25",
nullptr,
4,
fpu_s25},
nullptr,
g_s25_invalidates,
- nullptr,
- 0},
+ },
{"s26",
nullptr,
4,
fpu_s26},
nullptr,
g_s26_invalidates,
- nullptr,
- 0},
+ },
{"s27",
nullptr,
4,
fpu_s27},
nullptr,
g_s27_invalidates,
- nullptr,
- 0},
+ },
{"s28",
nullptr,
4,
fpu_s28},
nullptr,
g_s28_invalidates,
- nullptr,
- 0},
+ },
{"s29",
nullptr,
4,
fpu_s29},
nullptr,
g_s29_invalidates,
- nullptr,
- 0},
+ },
{"s30",
nullptr,
4,
fpu_s30},
nullptr,
g_s30_invalidates,
- nullptr,
- 0},
+ },
{"s31",
nullptr,
4,
fpu_s31},
nullptr,
g_s31_invalidates,
- nullptr,
- 0},
+ },
{"fpscr",
nullptr,
4,
LLDB_INVALID_REGNUM, fpu_fpscr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"d0",
nullptr,
fpu_d0},
g_d0_contains,
g_d0_invalidates,
- nullptr,
- 0},
+ },
{"d1",
nullptr,
8,
fpu_d1},
g_d1_contains,
g_d1_invalidates,
- nullptr,
- 0},
+ },
{"d2",
nullptr,
8,
fpu_d2},
g_d2_contains,
g_d2_invalidates,
- nullptr,
- 0},
+ },
{"d3",
nullptr,
8,
fpu_d3},
g_d3_contains,
g_d3_invalidates,
- nullptr,
- 0},
+ },
{"d4",
nullptr,
8,
fpu_d4},
g_d4_contains,
g_d4_invalidates,
- nullptr,
- 0},
+ },
{"d5",
nullptr,
8,
fpu_d5},
g_d5_contains,
g_d5_invalidates,
- nullptr,
- 0},
+ },
{"d6",
nullptr,
8,
fpu_d6},
g_d6_contains,
g_d6_invalidates,
- nullptr,
- 0},
+ },
{"d7",
nullptr,
8,
fpu_d7},
g_d7_contains,
g_d7_invalidates,
- nullptr,
- 0},
+ },
{"d8",
nullptr,
8,
fpu_d8},
g_d8_contains,
g_d8_invalidates,
- nullptr,
- 0},
+ },
{"d9",
nullptr,
8,
fpu_d9},
g_d9_contains,
g_d9_invalidates,
- nullptr,
- 0},
+ },
{"d10",
nullptr,
8,
fpu_d10},
g_d10_contains,
g_d10_invalidates,
- nullptr,
- 0},
+ },
{"d11",
nullptr,
8,
fpu_d11},
g_d11_contains,
g_d11_invalidates,
- nullptr,
- 0},
+ },
{"d12",
nullptr,
8,
fpu_d12},
g_d12_contains,
g_d12_invalidates,
- nullptr,
- 0},
+ },
{"d13",
nullptr,
8,
fpu_d13},
g_d13_contains,
g_d13_invalidates,
- nullptr,
- 0},
+ },
{"d14",
nullptr,
8,
fpu_d14},
g_d14_contains,
g_d14_invalidates,
- nullptr,
- 0},
+ },
{"d15",
nullptr,
8,
fpu_d15},
g_d15_contains,
g_d15_invalidates,
- nullptr,
- 0},
+ },
{"d16",
nullptr,
8,
fpu_d16},
nullptr,
g_d16_invalidates,
- nullptr,
- 0},
+ },
{"d17",
nullptr,
8,
fpu_d17},
nullptr,
g_d17_invalidates,
- nullptr,
- 0},
+ },
{"d18",
nullptr,
8,
fpu_d18},
nullptr,
g_d18_invalidates,
- nullptr,
- 0},
+ },
{"d19",
nullptr,
8,
fpu_d19},
nullptr,
g_d19_invalidates,
- nullptr,
- 0},
+ },
{"d20",
nullptr,
8,
fpu_d20},
nullptr,
g_d20_invalidates,
- nullptr,
- 0},
+ },
{"d21",
nullptr,
8,
fpu_d21},
nullptr,
g_d21_invalidates,
- nullptr,
- 0},
+ },
{"d22",
nullptr,
8,
fpu_d22},
nullptr,
g_d22_invalidates,
- nullptr,
- 0},
+ },
{"d23",
nullptr,
8,
fpu_d23},
nullptr,
g_d23_invalidates,
- nullptr,
- 0},
+ },
{"d24",
nullptr,
8,
fpu_d24},
nullptr,
g_d24_invalidates,
- nullptr,
- 0},
+ },
{"d25",
nullptr,
8,
fpu_d25},
nullptr,
g_d25_invalidates,
- nullptr,
- 0},
+ },
{"d26",
nullptr,
8,
fpu_d26},
nullptr,
g_d26_invalidates,
- nullptr,
- 0},
+ },
{"d27",
nullptr,
8,
fpu_d27},
nullptr,
g_d27_invalidates,
- nullptr,
- 0},
+ },
{"d28",
nullptr,
8,
fpu_d28},
nullptr,
g_d28_invalidates,
- nullptr,
- 0},
+ },
{"d29",
nullptr,
8,
fpu_d29},
nullptr,
g_d29_invalidates,
- nullptr,
- 0},
+ },
{"d30",
nullptr,
8,
fpu_d30},
nullptr,
g_d30_invalidates,
- nullptr,
- 0},
+ },
{"d31",
nullptr,
8,
fpu_d31},
nullptr,
g_d31_invalidates,
- nullptr,
- 0},
+ },
{"q0",
nullptr,
fpu_q0},
g_q0_contains,
nullptr,
- nullptr,
- 0},
+ },
{"q1",
nullptr,
16,
fpu_q1},
g_q1_contains,
nullptr,
- nullptr,
- 0},
+ },
{"q2",
nullptr,
16,
fpu_q2},
g_q2_contains,
nullptr,
- nullptr,
- 0},
+ },
{"q3",
nullptr,
16,
fpu_q3},
g_q3_contains,
nullptr,
- nullptr,
- 0},
+ },
{"q4",
nullptr,
16,
fpu_q4},
g_q4_contains,
nullptr,
- nullptr,
- 0},
+ },
{"q5",
nullptr,
16,
fpu_q5},
g_q5_contains,
nullptr,
- nullptr,
- 0},
+ },
{"q6",
nullptr,
16,
fpu_q6},
g_q6_contains,
nullptr,
- nullptr,
- 0},
+ },
{"q7",
nullptr,
16,
fpu_q7},
g_q7_contains,
nullptr,
- nullptr,
- 0},
+ },
{"q8",
nullptr,
16,
fpu_q8},
g_q8_contains,
nullptr,
- nullptr,
- 0},
+ },
{"q9",
nullptr,
16,
fpu_q9},
g_q9_contains,
nullptr,
- nullptr,
- 0},
+ },
{"q10",
nullptr,
16,
fpu_q10},
g_q10_contains,
nullptr,
- nullptr,
- 0},
+ },
{"q11",
nullptr,
16,
fpu_q11},
g_q11_contains,
nullptr,
- nullptr,
- 0},
+ },
{"q12",
nullptr,
16,
fpu_q12},
g_q12_contains,
nullptr,
- nullptr,
- 0},
+ },
{"q13",
nullptr,
16,
fpu_q13},
g_q13_contains,
nullptr,
- nullptr,
- 0},
+ },
{"q14",
nullptr,
16,
fpu_q14},
g_q14_contains,
nullptr,
- nullptr,
- 0},
+ },
{"q15",
nullptr,
16,
fpu_q15},
g_q15_contains,
nullptr,
- nullptr,
- 0},
+ },
{"exception",
nullptr,
LLDB_INVALID_REGNUM, exc_exception},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"fsr",
nullptr,
4,
LLDB_INVALID_REGNUM, exc_fsr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"far",
nullptr,
4,
LLDB_INVALID_REGNUM, exc_far},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_DBG(bvr, 0)},
{DEFINE_DBG(bvr, 1)},
{ \
#reg, nullptr, 8, GPR_OFFSET(gpr_##reg), lldb::eEncodingUint, \
lldb::eFormatHex, GPR64_KIND(reg, generic_kind), nullptr, nullptr, \
- nullptr, 0 \
}
// Defines a 64-bit general purpose register
{ \
#reg, #alt, 8, GPR_OFFSET(gpr_##reg), lldb::eEncodingUint, \
lldb::eFormatHex, GPR64_KIND(reg, generic_kind), nullptr, nullptr, \
- nullptr, 0 \
}
// Defines a 32-bit general purpose pseudo register
#wreg, nullptr, 4, \
GPR_OFFSET(gpr_##xreg) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, \
lldb::eEncodingUint, lldb::eFormatHex, LLDB_KIND(gpr_##wreg), \
- g_contained_##xreg, g_##wreg##_invalidates, nullptr, 0 \
+ g_contained_##xreg, g_##wreg##_invalidates, \
}
// Defines a vector register with 16-byte size
#define DEFINE_VREG(reg) \
{ \
#reg, nullptr, 16, FPU_OFFSET(fpu_##reg - fpu_v0), lldb::eEncodingVector, \
- lldb::eFormatVectorOfUInt8, VREG_KIND(reg), nullptr, nullptr, nullptr, \
- 0 \
+ lldb::eFormatVectorOfUInt8, VREG_KIND(reg), nullptr, nullptr, \
}
// Defines S and D pseudo registers mapping over corresponding vector register
{ \
#reg, nullptr, size, FPU_OFFSET(fpu_##vreg - fpu_v0) + offset, \
lldb::eEncodingIEEE754, lldb::eFormatFloat, LLDB_KIND(fpu_##reg), \
- g_contained_##vreg, g_##reg##_invalidates, nullptr, 0 \
+ g_contained_##vreg, g_##reg##_invalidates, \
}
// Defines miscellaneous status and control registers like cpsr, fpsr etc
{ \
#reg, nullptr, size, TYPE##_OFFSET_NAME(reg), lldb::eEncodingUint, \
lldb::eFormatHex, MISC_##TYPE##_KIND(lldb_kind), nullptr, nullptr, \
- nullptr, 0 \
}
// Defines pointer authentication mask registers
#define DEFINE_EXTENSION_REG(reg) \
{ \
#reg, nullptr, 8, 0, lldb::eEncodingUint, lldb::eFormatHex, \
- KIND_ALL_INVALID, nullptr, nullptr, nullptr, 0 \
+ KIND_ALL_INVALID, nullptr, nullptr, \
}
static lldb_private::RegisterInfo g_register_infos_arm64_le[] = {
{ \
#vreg, nullptr, 16, 0, lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, \
VREG_KIND(vreg), g_contained_##zreg, g_sve_##vreg##_invalidates, \
- nullptr, 0 \
}
// Defines S and D pseudo registers mapping over corresponding vector register
{ \
#reg, nullptr, size, 0, lldb::eEncodingIEEE754, lldb::eFormatFloat, \
LLDB_KIND(fpu_##reg), g_contained_##zreg, g_sve_##reg##_invalidates, \
- nullptr, 0 \
}
// Defines a Z vector register with 16-byte default size
#define DEFINE_ZREG(reg) \
{ \
#reg, nullptr, 16, 0, lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, \
- SVE_REG_KIND(reg), nullptr, nullptr, nullptr, 0 \
+ SVE_REG_KIND(reg), nullptr, nullptr, \
}
// Defines a P vector register with 2-byte default size
#define DEFINE_PREG(reg) \
{ \
#reg, nullptr, 2, 0, lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, \
- SVE_REG_KIND(reg), nullptr, nullptr, nullptr, 0 \
+ SVE_REG_KIND(reg), nullptr, nullptr, \
}
static lldb_private::RegisterInfo g_register_infos_arm64_sve_le[] = {
GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, kind4, \
lldb_##reg##_i386 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \
#name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, kind4, \
lldb_##name##_i386 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
// RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB
stmm[i]), eEncodingVector, eFormatVectorOfUInt8, \
{ehframe_st##i##_i386, dwarf_st##i##_i386, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_st##i##_i386 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEFINE_FP_MM(reg, i, streg) \
{dwarf_mm##i##_i386, dwarf_mm##i##_i386, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_mm##i##_i386 }, \
RegisterContextPOSIX_x86::g_contained_##streg##_32, \
- RegisterContextPOSIX_x86::g_invalidate_##streg##_32, nullptr, 0 \
+ RegisterContextPOSIX_x86::g_invalidate_##streg##_32, \
}
#define DEFINE_XMM(reg, i) \
reg[i]), eEncodingVector, eFormatVectorOfUInt8, \
{ehframe_##reg##i##_i386, dwarf_##reg##i##_i386, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_i386 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
// I believe the YMM registers use dwarf_xmm_%_i386 register numbers and then
{LLDB_INVALID_REGNUM, dwarf_xmm##i##_i386, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg##i##_i386 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEFINE_BNDR(reg, i) \
LLVM_EXTENSION BNDR_OFFSET(i), eEncodingVector, eFormatVectorOfUInt64, \
{dwarf_##reg##i##_i386, dwarf_##reg##i##_i386, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_##reg##i##_i386 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEFINE_BNDC(name, i) \
eFormatVectorOfUInt8, \
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_##name##_i386 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEFINE_DR(reg, i) \
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg##i##_i386 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEFINE_GPR_PSEUDO_16(reg16, reg32) \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg16##_i386 }, \
RegisterContextPOSIX_x86::g_contained_##reg32, \
- RegisterContextPOSIX_x86::g_invalidate_##reg32, nullptr, 0 \
+ RegisterContextPOSIX_x86::g_invalidate_##reg32, \
}
#define DEFINE_GPR_PSEUDO_8H(reg8, reg32) \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg8##_i386 }, \
RegisterContextPOSIX_x86::g_contained_##reg32, \
- RegisterContextPOSIX_x86::g_invalidate_##reg32, nullptr, 0 \
+ RegisterContextPOSIX_x86::g_invalidate_##reg32, \
}
#define DEFINE_GPR_PSEUDO_8L(reg8, reg32) \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg8##_i386 }, \
RegisterContextPOSIX_x86::g_contained_##reg32, \
- RegisterContextPOSIX_x86::g_invalidate_##reg32, nullptr, 0 \
+ RegisterContextPOSIX_x86::g_invalidate_##reg32, \
}
static RegisterInfo g_register_infos_i386[] = {
GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, kind4, \
gpr_##reg##_mips64 }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL \
}
-const uint8_t dwarf_opcode_mips64[] = {
- llvm::dwarf::DW_OP_regx, dwarf_sr_mips64, llvm::dwarf::DW_OP_lit1,
- llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shl, llvm::dwarf::DW_OP_and,
- llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shr};
-
#define DEFINE_FPR(reg, alt, kind1, kind2, kind3) \
{ \
#reg, alt, sizeof(((FPR_freebsd_mips *) 0)->reg), \
FPR_OFFSET(reg), eEncodingIEEE754, eFormatFloat, \
{kind1, kind2, kind3, LLDB_INVALID_REGNUM, \
fpr_##reg##_mips64 }, \
- NULL, NULL, dwarf_opcode_mips64, \
- sizeof(dwarf_opcode_mips64) \
+ NULL, NULL, \
}
#define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3) \
FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, LLDB_INVALID_REGNUM, \
fpr_##reg##_mips64 }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL, \
}
dwarf_##reg##_powerpc, lldb_kind, \
LLDB_INVALID_REGNUM, \
gpr_##reg##_powerpc }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL, \
}
#define DEFINE_FPR(reg, lldb_kind) \
{ \
{dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, \
lldb_kind, LLDB_INVALID_REGNUM, \
fpr_##reg##_powerpc }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL, \
}
#define DEFINE_VMX(reg, lldb_kind) \
{ \
{dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, \
lldb_kind, LLDB_INVALID_REGNUM, \
vmx_##reg##_powerpc }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL, \
}
// General purpose registers. EH_Frame, DWARF,
LLDB_INVALID_REGNUM, fpr_fpscr_powerpc}, \
NULL, \
NULL, \
- NULL, \
- 0}, \
+ }, \
DEFINE_VMX(v0, LLDB_INVALID_REGNUM), \
DEFINE_VMX(v1, LLDB_INVALID_REGNUM), \
DEFINE_VMX(v2, LLDB_INVALID_REGNUM), \
LLDB_INVALID_REGNUM, vmx_vrsave_powerpc}, \
NULL, \
NULL, \
- NULL, \
- 0}, \
+ }, \
{"vscr", \
NULL, \
4, \
LLDB_INVALID_REGNUM, vmx_vscr_powerpc}, \
NULL, \
NULL, \
- NULL, \
- 0},
+ },
static RegisterInfo g_register_infos_powerpc64[] = {
#define GPR GPR64
lldb_kind, \
LLDB_INVALID_REGNUM, \
gpr_##reg##_ppc64 }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL, \
}
#define DEFINE_FPR_PPC64(reg, alt, lldb_kind) \
{ \
{ppc64_dwarf::dwarf_##reg##_ppc64, \
ppc64_dwarf::dwarf_##reg##_ppc64, lldb_kind, LLDB_INVALID_REGNUM, \
fpr_##reg##_ppc64 }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL, \
}
#define DEFINE_VMX_PPC64(reg, lldb_kind) \
{ \
{ppc64_dwarf::dwarf_##reg##_ppc64, \
ppc64_dwarf::dwarf_##reg##_ppc64, lldb_kind, LLDB_INVALID_REGNUM, \
vmx_##reg##_ppc64 }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL, \
}
// General purpose registers.
LLDB_INVALID_REGNUM, fpr_fpscr_ppc64}, \
NULL, \
NULL, \
- NULL, \
- 0}, \
+ }, \
DEFINE_VMX_PPC64(vr0, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr1, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr2, LLDB_INVALID_REGNUM), \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, vmx_vscr_ppc64}, \
NULL, \
NULL, \
- NULL, \
- 0}, \
+ }, \
{"vrsave", \
NULL, \
4, \
LLDB_INVALID_REGNUM, vmx_vrsave_ppc64}, \
NULL, \
NULL, \
- NULL, \
- 0}, /* */
+ }, /* */
typedef struct _GPR_PPC64 {
uint64_t r0;
lldb_kind, \
LLDB_INVALID_REGNUM, \
gpr_##reg##_ppc64le }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL, \
}
#define DEFINE_FPR(reg, alt, lldb_kind) \
{ \
{ppc64le_dwarf::dwarf_##reg##_ppc64le, \
ppc64le_dwarf::dwarf_##reg##_ppc64le, lldb_kind, LLDB_INVALID_REGNUM, \
fpr_##reg##_ppc64le }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL, \
}
#define DEFINE_VMX(reg, lldb_kind) \
{ \
{ppc64le_dwarf::dwarf_##reg##_ppc64le, \
ppc64le_dwarf::dwarf_##reg##_ppc64le, lldb_kind, LLDB_INVALID_REGNUM, \
vmx_##reg##_ppc64le }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL, \
}
#define DEFINE_VSX(reg, lldb_kind) \
{ \
{ppc64le_dwarf::dwarf_##reg##_ppc64le, \
ppc64le_dwarf::dwarf_##reg##_ppc64le, lldb_kind, LLDB_INVALID_REGNUM, \
vsx_##reg##_ppc64le }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL, \
}
// General purpose registers.
LLDB_INVALID_REGNUM, fpr_fpscr_ppc64le}, \
NULL, \
NULL, \
- NULL, \
- 0}, \
+ }, \
DEFINE_VMX(vr0, LLDB_INVALID_REGNUM), \
DEFINE_VMX(vr1, LLDB_INVALID_REGNUM), \
DEFINE_VMX(vr2, LLDB_INVALID_REGNUM), \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, vmx_vscr_ppc64le}, \
NULL, \
NULL, \
- NULL, \
- 0}, \
+ }, \
{"vrsave", \
NULL, \
4, \
LLDB_INVALID_REGNUM, vmx_vrsave_ppc64le}, \
NULL, \
NULL, \
- NULL, \
- 0}, \
+ }, \
DEFINE_VSX(vs0, LLDB_INVALID_REGNUM), \
DEFINE_VSX(vs1, LLDB_INVALID_REGNUM), \
DEFINE_VSX(vs2, LLDB_INVALID_REGNUM), \
#name, alt, size, offset, eEncodingUint, eFormatHex, \
{dwarf_##name##_s390x, dwarf_##name##_s390x, generic, \
LLDB_INVALID_REGNUM, lldb_##name##_s390x }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL, \
}
#define DEFINE_GPR_NODWARF(name, size, offset, alt, generic) \
#name, alt, size, offset, eEncodingUint, eFormatHex, \
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, generic, \
LLDB_INVALID_REGNUM, lldb_##name##_s390x }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL, \
}
#define DEFINE_FPR(name, size, offset) \
#name, NULL, size, offset, eEncodingUint, eFormatHex, \
{dwarf_##name##_s390x, dwarf_##name##_s390x, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_##name##_s390x }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL, \
}
#define DEFINE_FPR_NODWARF(name, size, offset) \
#name, NULL, size, offset, eEncodingUint, eFormatHex, \
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_##name##_s390x }, \
- NULL, NULL, NULL, 0 \
+ NULL, NULL, \
}
static RegisterInfo g_register_infos_s390x[] = {
GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, kind4, \
lldb_##reg##_x86_64 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \
#name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, kind4, \
lldb_##name##_x86_64 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEFINE_FP_ST(reg, i) \
stmm[i]), eEncodingVector, eFormatVectorOfUInt8, \
{dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEFINE_FP_MM(reg, i, streg) \
{dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_mm##i##_x86_64 }, \
RegisterContextPOSIX_x86::g_contained_##streg##_64, \
- RegisterContextPOSIX_x86::g_invalidate_##streg##_64, nullptr, 0 \
+ RegisterContextPOSIX_x86::g_invalidate_##streg##_64, \
}
#define DEFINE_XMM(reg, i) \
{dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg##i##_x86_64 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEFINE_YMM(reg, i) \
dwarf_##reg##i##h_x86_64, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg##i##_x86_64 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEFINE_BNDR(reg, i) \
dwarf_##reg##i##_x86_64, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg##i##_x86_64 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEFINE_BNDC(name, i) \
LLVM_EXTENSION BNDC_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_##name##_x86_64 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEFINE_DR(reg, i) \
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg##i##_x86_64 }, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEFINE_GPR_PSEUDO_32(reg32, reg64) \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg32##_x86_64 }, \
RegisterContextPOSIX_x86::g_contained_##reg64, \
- RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
+ RegisterContextPOSIX_x86::g_invalidate_##reg64, \
}
#define DEFINE_GPR_PSEUDO_16(reg16, reg64) \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg16##_x86_64 }, \
RegisterContextPOSIX_x86::g_contained_##reg64, \
- RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
+ RegisterContextPOSIX_x86::g_invalidate_##reg64, \
}
#define DEFINE_GPR_PSEUDO_8H(reg8, reg64) \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg8##_x86_64 }, \
RegisterContextPOSIX_x86::g_contained_##reg64, \
- RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
+ RegisterContextPOSIX_x86::g_invalidate_##reg64, \
}
#define DEFINE_GPR_PSEUDO_8L(reg8, reg64) \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg8##_x86_64 }, \
RegisterContextPOSIX_x86::g_contained_##reg64, \
- RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
+ RegisterContextPOSIX_x86::g_invalidate_##reg64, \
}
#define DEFINE_FPR_32(name, reg, kind1, kind2, kind3, kind4, reg64) \
#name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, kind4, lldb_##name##_x86_64 }, \
RegisterContextPOSIX_x86::g_contained_##reg64, \
- RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
+ RegisterContextPOSIX_x86::g_invalidate_##reg64, \
}
// clang-format off
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM }, \
- NULL, NULL, NULL, 0
+ NULL, NULL
// Include RegisterInfos_arm to declare our g_register_infos_arm structure.
#define DECLARE_REGISTER_INFOS_ARM_STRUCT
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM }, \
- NULL, NULL, NULL, 0
+ NULL, NULL
// Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure.
#define DECLARE_REGISTER_INFOS_ARM64_STRUCT
#reg, NULL, 16, 0, eEncodingUint, eFormatVectorOfUInt64, \
{dwarf_##reg##_x86_64, dwarf_##reg##_x86_64, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_##reg##_x86_64}, \
- nullptr, nullptr, nullptr, 0
+ nullptr, nullptr
namespace {
LLDB_INVALID_REGNUM, lldb_rax_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rbx, nullptr),
{dwarf_rbx_x86_64, dwarf_rbx_x86_64, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_rbx_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rcx, nullptr),
{dwarf_rcx_x86_64, dwarf_rcx_x86_64, LLDB_REGNUM_GENERIC_ARG1,
LLDB_INVALID_REGNUM, lldb_rcx_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rdx, nullptr),
{dwarf_rdx_x86_64, dwarf_rdx_x86_64, LLDB_REGNUM_GENERIC_ARG2,
LLDB_INVALID_REGNUM, lldb_rdx_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rdi, nullptr),
{dwarf_rdi_x86_64, dwarf_rdi_x86_64, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_rdi_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rsi, nullptr),
{dwarf_rsi_x86_64, dwarf_rsi_x86_64, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_rsi_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rbp, "fp"),
{dwarf_rbp_x86_64, dwarf_rbp_x86_64, LLDB_REGNUM_GENERIC_FP,
LLDB_INVALID_REGNUM, lldb_rbp_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rsp, "sp"),
{dwarf_rsp_x86_64, dwarf_rsp_x86_64, LLDB_REGNUM_GENERIC_SP,
LLDB_INVALID_REGNUM, lldb_rsp_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r8, nullptr),
{dwarf_r8_x86_64, dwarf_r8_x86_64, LLDB_REGNUM_GENERIC_ARG3,
LLDB_INVALID_REGNUM, lldb_r8_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r9, nullptr),
{dwarf_r9_x86_64, dwarf_r9_x86_64, LLDB_REGNUM_GENERIC_ARG4,
LLDB_INVALID_REGNUM, lldb_r9_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r10, nullptr),
{dwarf_r10_x86_64, dwarf_r10_x86_64, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_r10_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r11, nullptr),
{dwarf_r11_x86_64, dwarf_r11_x86_64, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_r11_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r12, nullptr),
{dwarf_r12_x86_64, dwarf_r12_x86_64, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_r12_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r13, nullptr),
{dwarf_r13_x86_64, dwarf_r13_x86_64, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_r13_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r14, nullptr),
{dwarf_r14_x86_64, dwarf_r14_x86_64, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_r14_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(r15, nullptr),
{dwarf_r15_x86_64, dwarf_r15_x86_64, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_r15_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR(rip, "pc"),
{dwarf_rip_x86_64, dwarf_rip_x86_64, LLDB_REGNUM_GENERIC_PC,
LLDB_INVALID_REGNUM, lldb_rip_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_GPR_BIN(eflags, "flags"),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_REGNUM_GENERIC_FLAGS,
LLDB_INVALID_REGNUM, lldb_rflags_x86_64},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{DEFINE_FPU_XMM(xmm0)},
{DEFINE_FPU_XMM(xmm1)},
{DEFINE_FPU_XMM(xmm2)},
LLDB_INVALID_REGNUM, lldb_eax_i386},
nullptr,
nullptr,
- nullptr,
- 0u},
+ },
{DEFINE_GPR(ebx, nullptr),
{ehframe_ebx_i386, dwarf_ebx_i386, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_ebx_i386},
nullptr,
nullptr,
- nullptr,
- 0u},
+ },
{DEFINE_GPR(ecx, nullptr),
{ehframe_ecx_i386, dwarf_ecx_i386, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_ecx_i386},
nullptr,
nullptr,
- nullptr,
- 0u},
+ },
{DEFINE_GPR(edx, nullptr),
{ehframe_edx_i386, dwarf_edx_i386, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_edx_i386},
nullptr,
nullptr,
- nullptr,
- 0u},
+ },
{DEFINE_GPR(edi, nullptr),
{ehframe_edi_i386, dwarf_edi_i386, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_edi_i386},
nullptr,
nullptr,
- nullptr,
- 0u},
+ },
{DEFINE_GPR(esi, nullptr),
{ehframe_esi_i386, dwarf_esi_i386, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_esi_i386},
nullptr,
nullptr,
- nullptr,
- 0u},
+ },
{DEFINE_GPR(ebp, "fp"),
{ehframe_ebp_i386, dwarf_ebp_i386, LLDB_REGNUM_GENERIC_FP,
LLDB_INVALID_REGNUM, lldb_ebp_i386},
nullptr,
nullptr,
- nullptr,
- 0u},
+ },
{DEFINE_GPR(esp, "sp"),
{ehframe_esp_i386, dwarf_esp_i386, LLDB_REGNUM_GENERIC_SP,
LLDB_INVALID_REGNUM, lldb_esp_i386},
nullptr,
nullptr,
- nullptr,
- 0u},
+ },
{DEFINE_GPR(eip, "pc"),
{ehframe_eip_i386, dwarf_eip_i386, LLDB_REGNUM_GENERIC_PC,
LLDB_INVALID_REGNUM, lldb_eip_i386},
nullptr,
nullptr,
- nullptr,
- 0u},
+ },
{DEFINE_GPR_BIN(eflags, "flags"),
{ehframe_eflags_i386, dwarf_eflags_i386, LLDB_REGNUM_GENERIC_FLAGS,
LLDB_INVALID_REGNUM, lldb_eflags_i386},
nullptr,
nullptr,
- nullptr,
- 0u},
+ },
};
static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
response.PutChar(';');
}
- if (reg_info->dynamic_size_dwarf_expr_bytes) {
- const size_t dwarf_opcode_len = reg_info->dynamic_size_dwarf_len;
- response.PutCString("dynamic_size_dwarf_expr_bytes:");
- for (uint32_t i = 0; i < dwarf_opcode_len; ++i)
- response.PutHex8(reg_info->dynamic_size_dwarf_expr_bytes[i]);
- response.PutChar(';');
- }
return SendPacketNoLock(response.GetString());
}
return SendErrorResponse(0x47);
}
- // The dwarf expression are evaluate on host site which may cause register
- // size to change Hence the reg_size may not be same as reg_info->bytes_size
- if ((reg_size != reg_info->byte_size) &&
- !(reg_info->dynamic_size_dwarf_expr_bytes)) {
+ if (reg_size != reg_info->byte_size)
return SendIllFormedResponse(packet, "P packet register size is incorrect");
- }
// Build the reginfos response.
StreamGDBRemote response;
response.Printf("\" ");
}
- if (reg_info->dynamic_size_dwarf_expr_bytes) {
- const size_t dwarf_opcode_len = reg_info->dynamic_size_dwarf_len;
- response.PutCString("dynamic_size_dwarf_expr_bytes=\"");
- for (uint32_t i = 0; i < dwarf_opcode_len; ++i)
- response.PutHex8(reg_info->dynamic_size_dwarf_expr_bytes[i]);
- response.Printf("\" ");
- }
-
response.Printf("/>");
}
const RegisterInfo *
GDBRemoteRegisterContext::GetRegisterInfoAtIndex(size_t reg) {
- RegisterInfo *reg_info = m_reg_info_sp->GetRegisterInfoAtIndex(reg);
-
- if (reg_info && reg_info->dynamic_size_dwarf_expr_bytes) {
- const ArchSpec &arch = m_thread.GetProcess()->GetTarget().GetArchitecture();
- uint8_t reg_size = UpdateDynamicRegisterSize(arch, reg_info);
- reg_info->byte_size = reg_size;
- }
- return reg_info;
+ return m_reg_info_sp->GetRegisterInfoAtIndex(reg);
}
size_t GDBRemoteRegisterContext::GetRegisterSetCount() {
// clang-format off
static RegisterInfo g_register_infos[] = {
-// NAME ALT SZ OFF ENCODING FORMAT EH_FRAME DWARF GENERIC PROCESS PLUGIN LLDB VALUE REGS INVALIDATE REGS SIZE EXPR SIZE LEN
-// ====== ====== === === ============= ========== =================== =================== ====================== ============= ==== ========== =============== ========= ========
- { "r0", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r0, dwarf_r0, LLDB_REGNUM_GENERIC_ARG1,0, 0 }, nullptr, nullptr, nullptr, 0 },
- { "r1", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r1, dwarf_r1, LLDB_REGNUM_GENERIC_ARG2,1, 1 }, nullptr, nullptr, nullptr, 0 },
- { "r2", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r2, dwarf_r2, LLDB_REGNUM_GENERIC_ARG3,2, 2 }, nullptr, nullptr, nullptr, 0 },
- { "r3", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r3, dwarf_r3, LLDB_REGNUM_GENERIC_ARG4,3, 3 }, nullptr, nullptr, nullptr, 0 },
- { "r4", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, 4, 4 }, nullptr, nullptr, nullptr, 0 },
- { "r5", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, 5, 5 }, nullptr, nullptr, nullptr, 0 },
- { "r6", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, 6, 6 }, nullptr, nullptr, nullptr, 0 },
- { "r7", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r7, dwarf_r7, LLDB_REGNUM_GENERIC_FP, 7, 7 }, nullptr, nullptr, nullptr, 0 },
- { "r8", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, 8, 8 }, nullptr, nullptr, nullptr, 0 },
- { "r9", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, 9, 9 }, nullptr, nullptr, nullptr, 0 },
- { "r10", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r10, dwarf_r10, LLDB_INVALID_REGNUM, 10, 10 }, nullptr, nullptr, nullptr, 0 },
- { "r11", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r11, dwarf_r11, LLDB_INVALID_REGNUM, 11, 11 }, nullptr, nullptr, nullptr, 0 },
- { "r12", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r12, dwarf_r12, LLDB_INVALID_REGNUM, 12, 12 }, nullptr, nullptr, nullptr, 0 },
- { "sp", "r13", 4, 0, eEncodingUint, eFormatHex, { ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, 13, 13 }, nullptr, nullptr, nullptr, 0 },
- { "lr", "r14", 4, 0, eEncodingUint, eFormatHex, { ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, 14, 14 }, nullptr, nullptr, nullptr, 0 },
- { "pc", "r15", 4, 0, eEncodingUint, eFormatHex, { ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, 15, 15 }, nullptr, nullptr, nullptr, 0 },
- { "f0", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 16, 16 }, nullptr, nullptr, nullptr, 0 },
- { "f1", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 17, 17 }, nullptr, nullptr, nullptr, 0 },
- { "f2", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 18, 18 }, nullptr, nullptr, nullptr, 0 },
- { "f3", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 19, 19 }, nullptr, nullptr, nullptr, 0 },
- { "f4", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 20, 20 }, nullptr, nullptr, nullptr, 0 },
- { "f5", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 21, 21 }, nullptr, nullptr, nullptr, 0 },
- { "f6", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 22, 22 }, nullptr, nullptr, nullptr, 0 },
- { "f7", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 23, 23 }, nullptr, nullptr, nullptr, 0 },
- { "fps", nullptr, 4, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 24, 24 }, nullptr, nullptr, nullptr, 0 },
- { "cpsr","flags", 4, 0, eEncodingUint, eFormatHex, { ehframe_cpsr, dwarf_cpsr, LLDB_INVALID_REGNUM, 25, 25 }, nullptr, nullptr, nullptr, 0 },
- { "s0", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, 26, 26 }, nullptr, nullptr, nullptr, 0 },
- { "s1", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, 27, 27 }, nullptr, nullptr, nullptr, 0 },
- { "s2", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, 28, 28 }, nullptr, nullptr, nullptr, 0 },
- { "s3", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, 29, 29 }, nullptr, nullptr, nullptr, 0 },
- { "s4", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, 30, 30 }, nullptr, nullptr, nullptr, 0 },
- { "s5", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, 31, 31 }, nullptr, nullptr, nullptr, 0 },
- { "s6", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, 32, 32 }, nullptr, nullptr, nullptr, 0 },
- { "s7", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, 33, 33 }, nullptr, nullptr, nullptr, 0 },
- { "s8", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, 34, 34 }, nullptr, nullptr, nullptr, 0 },
- { "s9", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, 35, 35 }, nullptr, nullptr, nullptr, 0 },
- { "s10", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, 36, 36 }, nullptr, nullptr, nullptr, 0 },
- { "s11", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, 37, 37 }, nullptr, nullptr, nullptr, 0 },
- { "s12", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, 38, 38 }, nullptr, nullptr, nullptr, 0 },
- { "s13", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, 39, 39 }, nullptr, nullptr, nullptr, 0 },
- { "s14", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, 40, 40 }, nullptr, nullptr, nullptr, 0 },
- { "s15", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, 41, 41 }, nullptr, nullptr, nullptr, 0 },
- { "s16", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, 42, 42 }, nullptr, nullptr, nullptr, 0 },
- { "s17", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, 43, 43 }, nullptr, nullptr, nullptr, 0 },
- { "s18", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, 44, 44 }, nullptr, nullptr, nullptr, 0 },
- { "s19", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, 45, 45 }, nullptr, nullptr, nullptr, 0 },
- { "s20", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, 46, 46 }, nullptr, nullptr, nullptr, 0 },
- { "s21", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, 47, 47 }, nullptr, nullptr, nullptr, 0 },
- { "s22", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, 48, 48 }, nullptr, nullptr, nullptr, 0 },
- { "s23", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, 49, 49 }, nullptr, nullptr, nullptr, 0 },
- { "s24", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, 50, 50 }, nullptr, nullptr, nullptr, 0 },
- { "s25", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, 51, 51 }, nullptr, nullptr, nullptr, 0 },
- { "s26", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, 52, 52 }, nullptr, nullptr, nullptr, 0 },
- { "s27", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, 53, 53 }, nullptr, nullptr, nullptr, 0 },
- { "s28", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, 54, 54 }, nullptr, nullptr, nullptr, 0 },
- { "s29", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, 55, 55 }, nullptr, nullptr, nullptr, 0 },
- { "s30", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, 56, 56 }, nullptr, nullptr, nullptr, 0 },
- { "s31", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, 57, 57 }, nullptr, nullptr, nullptr, 0 },
- { "fpscr",nullptr, 4, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 58, 58 }, nullptr, nullptr, nullptr, 0 },
- { "d16", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d16, LLDB_INVALID_REGNUM, 59, 59 }, nullptr, nullptr, nullptr, 0 },
- { "d17", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d17, LLDB_INVALID_REGNUM, 60, 60 }, nullptr, nullptr, nullptr, 0 },
- { "d18", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d18, LLDB_INVALID_REGNUM, 61, 61 }, nullptr, nullptr, nullptr, 0 },
- { "d19", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d19, LLDB_INVALID_REGNUM, 62, 62 }, nullptr, nullptr, nullptr, 0 },
- { "d20", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d20, LLDB_INVALID_REGNUM, 63, 63 }, nullptr, nullptr, nullptr, 0 },
- { "d21", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d21, LLDB_INVALID_REGNUM, 64, 64 }, nullptr, nullptr, nullptr, 0 },
- { "d22", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d22, LLDB_INVALID_REGNUM, 65, 65 }, nullptr, nullptr, nullptr, 0 },
- { "d23", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d23, LLDB_INVALID_REGNUM, 66, 66 }, nullptr, nullptr, nullptr, 0 },
- { "d24", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d24, LLDB_INVALID_REGNUM, 67, 67 }, nullptr, nullptr, nullptr, 0 },
- { "d25", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d25, LLDB_INVALID_REGNUM, 68, 68 }, nullptr, nullptr, nullptr, 0 },
- { "d26", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d26, LLDB_INVALID_REGNUM, 69, 69 }, nullptr, nullptr, nullptr, 0 },
- { "d27", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d27, LLDB_INVALID_REGNUM, 70, 70 }, nullptr, nullptr, nullptr, 0 },
- { "d28", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d28, LLDB_INVALID_REGNUM, 71, 71 }, nullptr, nullptr, nullptr, 0 },
- { "d29", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d29, LLDB_INVALID_REGNUM, 72, 72 }, nullptr, nullptr, nullptr, 0 },
- { "d30", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d30, LLDB_INVALID_REGNUM, 73, 73 }, nullptr, nullptr, nullptr, 0 },
- { "d31", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d31, LLDB_INVALID_REGNUM, 74, 74 }, nullptr, nullptr, nullptr, 0 },
- { "d0", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d0, LLDB_INVALID_REGNUM, 75, 75 }, g_d0_regs, nullptr, nullptr, 0 },
- { "d1", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d1, LLDB_INVALID_REGNUM, 76, 76 }, g_d1_regs, nullptr, nullptr, 0 },
- { "d2", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d2, LLDB_INVALID_REGNUM, 77, 77 }, g_d2_regs, nullptr, nullptr, 0 },
- { "d3", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d3, LLDB_INVALID_REGNUM, 78, 78 }, g_d3_regs, nullptr, nullptr, 0 },
- { "d4", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d4, LLDB_INVALID_REGNUM, 79, 79 }, g_d4_regs, nullptr, nullptr, 0 },
- { "d5", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d5, LLDB_INVALID_REGNUM, 80, 80 }, g_d5_regs, nullptr, nullptr, 0 },
- { "d6", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d6, LLDB_INVALID_REGNUM, 81, 81 }, g_d6_regs, nullptr, nullptr, 0 },
- { "d7", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d7, LLDB_INVALID_REGNUM, 82, 82 }, g_d7_regs, nullptr, nullptr, 0 },
- { "d8", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d8, LLDB_INVALID_REGNUM, 83, 83 }, g_d8_regs, nullptr, nullptr, 0 },
- { "d9", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d9, LLDB_INVALID_REGNUM, 84, 84 }, g_d9_regs, nullptr, nullptr, 0 },
- { "d10", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d10, LLDB_INVALID_REGNUM, 85, 85 }, g_d10_regs, nullptr, nullptr, 0 },
- { "d11", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d11, LLDB_INVALID_REGNUM, 86, 86 }, g_d11_regs, nullptr, nullptr, 0 },
- { "d12", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d12, LLDB_INVALID_REGNUM, 87, 87 }, g_d12_regs, nullptr, nullptr, 0 },
- { "d13", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d13, LLDB_INVALID_REGNUM, 88, 88 }, g_d13_regs, nullptr, nullptr, 0 },
- { "d14", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d14, LLDB_INVALID_REGNUM, 89, 89 }, g_d14_regs, nullptr, nullptr, 0 },
- { "d15", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d15, LLDB_INVALID_REGNUM, 90, 90 }, g_d15_regs, nullptr, nullptr, 0 },
- { "q0", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q0, LLDB_INVALID_REGNUM, 91, 91 }, g_q0_regs, nullptr, nullptr, 0 },
- { "q1", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q1, LLDB_INVALID_REGNUM, 92, 92 }, g_q1_regs, nullptr, nullptr, 0 },
- { "q2", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q2, LLDB_INVALID_REGNUM, 93, 93 }, g_q2_regs, nullptr, nullptr, 0 },
- { "q3", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q3, LLDB_INVALID_REGNUM, 94, 94 }, g_q3_regs, nullptr, nullptr, 0 },
- { "q4", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q4, LLDB_INVALID_REGNUM, 95, 95 }, g_q4_regs, nullptr, nullptr, 0 },
- { "q5", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q5, LLDB_INVALID_REGNUM, 96, 96 }, g_q5_regs, nullptr, nullptr, 0 },
- { "q6", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q6, LLDB_INVALID_REGNUM, 97, 97 }, g_q6_regs, nullptr, nullptr, 0 },
- { "q7", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q7, LLDB_INVALID_REGNUM, 98, 98 }, g_q7_regs, nullptr, nullptr, 0 },
- { "q8", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q8, LLDB_INVALID_REGNUM, 99, 99 }, g_q8_regs, nullptr, nullptr, 0 },
- { "q9", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q9, LLDB_INVALID_REGNUM, 100, 100 }, g_q9_regs, nullptr, nullptr, 0 },
- { "q10", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q10, LLDB_INVALID_REGNUM, 101, 101 }, g_q10_regs, nullptr, nullptr, 0 },
- { "q11", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q11, LLDB_INVALID_REGNUM, 102, 102 }, g_q11_regs, nullptr, nullptr, 0 },
- { "q12", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q12, LLDB_INVALID_REGNUM, 103, 103 }, g_q12_regs, nullptr, nullptr, 0 },
- { "q13", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q13, LLDB_INVALID_REGNUM, 104, 104 }, g_q13_regs, nullptr, nullptr, 0 },
- { "q14", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q14, LLDB_INVALID_REGNUM, 105, 105 }, g_q14_regs, nullptr, nullptr, 0 },
- { "q15", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q15, LLDB_INVALID_REGNUM, 106, 106 }, g_q15_regs, nullptr, nullptr, 0 }
+// NAME ALT SZ OFF ENCODING FORMAT EH_FRAME DWARF GENERIC PROCESS PLUGIN LLDB VALUE REGS INVALIDATE REGS
+// ====== ====== === === ============= ========== =================== =================== ====================== ============= ==== ========== ===============
+ { "r0", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r0, dwarf_r0, LLDB_REGNUM_GENERIC_ARG1,0, 0 }, nullptr, nullptr },
+ { "r1", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r1, dwarf_r1, LLDB_REGNUM_GENERIC_ARG2,1, 1 }, nullptr, nullptr },
+ { "r2", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r2, dwarf_r2, LLDB_REGNUM_GENERIC_ARG3,2, 2 }, nullptr, nullptr },
+ { "r3", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r3, dwarf_r3, LLDB_REGNUM_GENERIC_ARG4,3, 3 }, nullptr, nullptr },
+ { "r4", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, 4, 4 }, nullptr, nullptr },
+ { "r5", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, 5, 5 }, nullptr, nullptr },
+ { "r6", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, 6, 6 }, nullptr, nullptr },
+ { "r7", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r7, dwarf_r7, LLDB_REGNUM_GENERIC_FP, 7, 7 }, nullptr, nullptr },
+ { "r8", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, 8, 8 }, nullptr, nullptr },
+ { "r9", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, 9, 9 }, nullptr, nullptr },
+ { "r10", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r10, dwarf_r10, LLDB_INVALID_REGNUM, 10, 10 }, nullptr, nullptr },
+ { "r11", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r11, dwarf_r11, LLDB_INVALID_REGNUM, 11, 11 }, nullptr, nullptr },
+ { "r12", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r12, dwarf_r12, LLDB_INVALID_REGNUM, 12, 12 }, nullptr, nullptr },
+ { "sp", "r13", 4, 0, eEncodingUint, eFormatHex, { ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, 13, 13 }, nullptr, nullptr },
+ { "lr", "r14", 4, 0, eEncodingUint, eFormatHex, { ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, 14, 14 }, nullptr, nullptr },
+ { "pc", "r15", 4, 0, eEncodingUint, eFormatHex, { ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, 15, 15 }, nullptr, nullptr },
+ { "f0", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 16, 16 }, nullptr, nullptr },
+ { "f1", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 17, 17 }, nullptr, nullptr },
+ { "f2", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 18, 18 }, nullptr, nullptr },
+ { "f3", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 19, 19 }, nullptr, nullptr },
+ { "f4", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 20, 20 }, nullptr, nullptr },
+ { "f5", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 21, 21 }, nullptr, nullptr },
+ { "f6", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 22, 22 }, nullptr, nullptr },
+ { "f7", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 23, 23 }, nullptr, nullptr },
+ { "fps", nullptr, 4, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 24, 24 }, nullptr, nullptr },
+ { "cpsr","flags", 4, 0, eEncodingUint, eFormatHex, { ehframe_cpsr, dwarf_cpsr, LLDB_INVALID_REGNUM, 25, 25 }, nullptr, nullptr },
+ { "s0", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, 26, 26 }, nullptr, nullptr },
+ { "s1", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, 27, 27 }, nullptr, nullptr },
+ { "s2", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, 28, 28 }, nullptr, nullptr },
+ { "s3", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, 29, 29 }, nullptr, nullptr },
+ { "s4", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, 30, 30 }, nullptr, nullptr },
+ { "s5", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, 31, 31 }, nullptr, nullptr },
+ { "s6", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, 32, 32 }, nullptr, nullptr },
+ { "s7", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, 33, 33 }, nullptr, nullptr },
+ { "s8", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, 34, 34 }, nullptr, nullptr },
+ { "s9", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, 35, 35 }, nullptr, nullptr },
+ { "s10", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, 36, 36 }, nullptr, nullptr },
+ { "s11", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, 37, 37 }, nullptr, nullptr },
+ { "s12", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, 38, 38 }, nullptr, nullptr },
+ { "s13", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, 39, 39 }, nullptr, nullptr },
+ { "s14", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, 40, 40 }, nullptr, nullptr },
+ { "s15", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, 41, 41 }, nullptr, nullptr },
+ { "s16", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, 42, 42 }, nullptr, nullptr },
+ { "s17", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, 43, 43 }, nullptr, nullptr },
+ { "s18", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, 44, 44 }, nullptr, nullptr },
+ { "s19", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, 45, 45 }, nullptr, nullptr },
+ { "s20", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, 46, 46 }, nullptr, nullptr },
+ { "s21", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, 47, 47 }, nullptr, nullptr },
+ { "s22", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, 48, 48 }, nullptr, nullptr },
+ { "s23", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, 49, 49 }, nullptr, nullptr },
+ { "s24", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, 50, 50 }, nullptr, nullptr },
+ { "s25", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, 51, 51 }, nullptr, nullptr },
+ { "s26", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, 52, 52 }, nullptr, nullptr },
+ { "s27", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, 53, 53 }, nullptr, nullptr },
+ { "s28", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, 54, 54 }, nullptr, nullptr },
+ { "s29", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, 55, 55 }, nullptr, nullptr },
+ { "s30", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, 56, 56 }, nullptr, nullptr },
+ { "s31", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, 57, 57 }, nullptr, nullptr },
+ { "fpscr",nullptr, 4, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 58, 58 }, nullptr, nullptr },
+ { "d16", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d16, LLDB_INVALID_REGNUM, 59, 59 }, nullptr, nullptr },
+ { "d17", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d17, LLDB_INVALID_REGNUM, 60, 60 }, nullptr, nullptr },
+ { "d18", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d18, LLDB_INVALID_REGNUM, 61, 61 }, nullptr, nullptr },
+ { "d19", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d19, LLDB_INVALID_REGNUM, 62, 62 }, nullptr, nullptr },
+ { "d20", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d20, LLDB_INVALID_REGNUM, 63, 63 }, nullptr, nullptr },
+ { "d21", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d21, LLDB_INVALID_REGNUM, 64, 64 }, nullptr, nullptr },
+ { "d22", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d22, LLDB_INVALID_REGNUM, 65, 65 }, nullptr, nullptr },
+ { "d23", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d23, LLDB_INVALID_REGNUM, 66, 66 }, nullptr, nullptr },
+ { "d24", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d24, LLDB_INVALID_REGNUM, 67, 67 }, nullptr, nullptr },
+ { "d25", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d25, LLDB_INVALID_REGNUM, 68, 68 }, nullptr, nullptr },
+ { "d26", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d26, LLDB_INVALID_REGNUM, 69, 69 }, nullptr, nullptr },
+ { "d27", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d27, LLDB_INVALID_REGNUM, 70, 70 }, nullptr, nullptr },
+ { "d28", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d28, LLDB_INVALID_REGNUM, 71, 71 }, nullptr, nullptr },
+ { "d29", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d29, LLDB_INVALID_REGNUM, 72, 72 }, nullptr, nullptr },
+ { "d30", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d30, LLDB_INVALID_REGNUM, 73, 73 }, nullptr, nullptr },
+ { "d31", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d31, LLDB_INVALID_REGNUM, 74, 74 }, nullptr, nullptr },
+ { "d0", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d0, LLDB_INVALID_REGNUM, 75, 75 }, g_d0_regs, nullptr },
+ { "d1", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d1, LLDB_INVALID_REGNUM, 76, 76 }, g_d1_regs, nullptr },
+ { "d2", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d2, LLDB_INVALID_REGNUM, 77, 77 }, g_d2_regs, nullptr },
+ { "d3", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d3, LLDB_INVALID_REGNUM, 78, 78 }, g_d3_regs, nullptr },
+ { "d4", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d4, LLDB_INVALID_REGNUM, 79, 79 }, g_d4_regs, nullptr },
+ { "d5", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d5, LLDB_INVALID_REGNUM, 80, 80 }, g_d5_regs, nullptr },
+ { "d6", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d6, LLDB_INVALID_REGNUM, 81, 81 }, g_d6_regs, nullptr },
+ { "d7", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d7, LLDB_INVALID_REGNUM, 82, 82 }, g_d7_regs, nullptr },
+ { "d8", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d8, LLDB_INVALID_REGNUM, 83, 83 }, g_d8_regs, nullptr },
+ { "d9", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d9, LLDB_INVALID_REGNUM, 84, 84 }, g_d9_regs, nullptr },
+ { "d10", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d10, LLDB_INVALID_REGNUM, 85, 85 }, g_d10_regs, nullptr },
+ { "d11", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d11, LLDB_INVALID_REGNUM, 86, 86 }, g_d11_regs, nullptr },
+ { "d12", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d12, LLDB_INVALID_REGNUM, 87, 87 }, g_d12_regs, nullptr },
+ { "d13", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d13, LLDB_INVALID_REGNUM, 88, 88 }, g_d13_regs, nullptr },
+ { "d14", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d14, LLDB_INVALID_REGNUM, 89, 89 }, g_d14_regs, nullptr },
+ { "d15", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d15, LLDB_INVALID_REGNUM, 90, 90 }, g_d15_regs, nullptr },
+ { "q0", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q0, LLDB_INVALID_REGNUM, 91, 91 }, g_q0_regs, nullptr },
+ { "q1", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q1, LLDB_INVALID_REGNUM, 92, 92 }, g_q1_regs, nullptr },
+ { "q2", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q2, LLDB_INVALID_REGNUM, 93, 93 }, g_q2_regs, nullptr },
+ { "q3", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q3, LLDB_INVALID_REGNUM, 94, 94 }, g_q3_regs, nullptr },
+ { "q4", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q4, LLDB_INVALID_REGNUM, 95, 95 }, g_q4_regs, nullptr },
+ { "q5", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q5, LLDB_INVALID_REGNUM, 96, 96 }, g_q5_regs, nullptr },
+ { "q6", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q6, LLDB_INVALID_REGNUM, 97, 97 }, g_q6_regs, nullptr },
+ { "q7", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q7, LLDB_INVALID_REGNUM, 98, 98 }, g_q7_regs, nullptr },
+ { "q8", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q8, LLDB_INVALID_REGNUM, 99, 99 }, g_q8_regs, nullptr },
+ { "q9", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q9, LLDB_INVALID_REGNUM, 100, 100 }, g_q9_regs, nullptr },
+ { "q10", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q10, LLDB_INVALID_REGNUM, 101, 101 }, g_q10_regs, nullptr },
+ { "q11", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q11, LLDB_INVALID_REGNUM, 102, 102 }, g_q11_regs, nullptr },
+ { "q12", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q12, LLDB_INVALID_REGNUM, 103, 103 }, g_q12_regs, nullptr },
+ { "q13", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q13, LLDB_INVALID_REGNUM, 104, 104 }, g_q13_regs, nullptr },
+ { "q14", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q14, LLDB_INVALID_REGNUM, 105, 105 }, g_q14_regs, nullptr },
+ { "q15", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q15, LLDB_INVALID_REGNUM, 106, 106 }, g_q15_regs, nullptr }
};
// clang-format on
SplitCommaSeparatedRegisterNumberString(value, reg_info.value_regs, 16);
} else if (name.equals("invalidate-regs")) {
SplitCommaSeparatedRegisterNumberString(value, reg_info.invalidate_regs, 16);
- } else if (name.equals("dynamic_size_dwarf_expr_bytes")) {
- size_t dwarf_opcode_len = value.size() / 2;
- assert(dwarf_opcode_len > 0);
-
- reg_info.dwarf_opcode_bytes.resize(dwarf_opcode_len);
-
- StringExtractor opcode_extractor(value);
- uint32_t ret_val =
- opcode_extractor.GetHexBytesAvail(reg_info.dwarf_opcode_bytes);
- assert(dwarf_opcode_len == ret_val);
- UNUSED_IF_ASSERT_DISABLED(ret_val);
}
}
} else if (name == "invalidate_regnums") {
SplitCommaSeparatedRegisterNumberString(
value, reg_info.invalidate_regs, 0);
- } else if (name == "dynamic_size_dwarf_expr_bytes") {
- std::string opcode_string = value.str();
- size_t dwarf_opcode_len = opcode_string.length() / 2;
- assert(dwarf_opcode_len > 0);
-
- reg_info.dwarf_opcode_bytes.resize(dwarf_opcode_len);
- StringExtractor opcode_extractor(opcode_string);
- uint32_t ret_val =
- opcode_extractor.GetHexBytesAvail(reg_info.dwarf_opcode_bytes);
- assert(dwarf_opcode_len == ret_val);
- UNUSED_IF_ASSERT_DISABLED(ret_val);
} else {
Log *log(ProcessGDBRemoteLog::GetLogIfAllCategoriesSet(
GDBR_LOG_PROCESS));
local_regnum},
regs_with_sentinel(remote_reg_info.value_regs),
regs_with_sentinel(remote_reg_info.invalidate_regs),
- !remote_reg_info.dwarf_opcode_bytes.empty()
- ? remote_reg_info.dwarf_opcode_bytes.data()
- : nullptr,
- remote_reg_info.dwarf_opcode_bytes.size(),
};
if (abi_sp)
uint32_t regnum_remote = LLDB_INVALID_REGNUM;
std::vector<uint32_t> value_regs;
std::vector<uint32_t> invalidate_regs;
- std::vector<uint8_t> dwarf_opcode_bytes;
};
class ThreadGDBRemote;
#define DEF_R(i) \
{ \
"r" #i, nullptr, 4, OFFSET(r) + i * 4, eEncodingUint, eFormatHex, \
- {ehframe_r##i, dwarf_r##i, INV, INV, reg_r##i}, \
- nullptr, nullptr, nullptr, 0 \
+ {ehframe_r##i, dwarf_r##i, INV, INV, reg_r##i}, nullptr, nullptr, \
}
#define DEF_R_ARG(i, n) \
{ \
"r" #i, "arg" #n, 4, OFFSET(r) + i * 4, eEncodingUint, eFormatHex, \
- {ehframe_r##i, dwarf_r##i, LLDB_REGNUM_GENERIC_ARG1 + i, INV, reg_r##i}, \
- nullptr, nullptr, nullptr, 0 \
+ {ehframe_r##i, dwarf_r##i, LLDB_REGNUM_GENERIC_ARG1 + i, INV, \
+ reg_r##i}, \
+ nullptr, nullptr, \
}
#define DEF_D(i) \
{ \
"d" #i, nullptr, 8, OFFSET(d) + i * 8, eEncodingVector, \
eFormatVectorOfUInt8, {dwarf_d##i, dwarf_d##i, INV, INV, reg_d##i}, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEF_S(i) \
{ \
"s" #i, nullptr, 4, OFFSET(s) + i * 4, eEncodingIEEE754, eFormatFloat, \
- {dwarf_s##i, dwarf_s##i, INV, INV, reg_s##i}, \
- nullptr, nullptr, nullptr, 0 \
+ {dwarf_s##i, dwarf_s##i, INV, INV, reg_s##i}, nullptr, nullptr, \
}
#define DEF_Q(i) \
{ \
"q" #i, nullptr, 16, OFFSET(q) + i * 16, eEncodingVector, \
eFormatVectorOfUInt8, {dwarf_q##i, dwarf_q##i, INV, INV, reg_q##i}, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
// Zero based LLDB register numbers for this register context
{ehframe_r7, dwarf_r7, LLDB_REGNUM_GENERIC_FP, INV, reg_r7},
nullptr,
nullptr,
- nullptr,
- 0};
+};
static RegisterInfo g_reg_info_fp = {
"fp",
{ehframe_r11, dwarf_r11, LLDB_REGNUM_GENERIC_FP, INV, reg_r11},
nullptr,
nullptr,
- nullptr,
- 0};
+};
// Register info definitions for this register context
static RegisterInfo g_reg_infos[] = {
{ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, INV, reg_sp},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"lr",
"r14",
4,
{ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, INV, reg_lr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"pc",
"r15",
4,
{ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, INV, reg_pc},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"cpsr",
"psr",
4,
{ehframe_cpsr, dwarf_cpsr, LLDB_REGNUM_GENERIC_FLAGS, INV, reg_cpsr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"fpscr",
nullptr,
8,
{INV, INV, INV, INV, reg_fpscr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
DEF_D(0),
DEF_D(1),
DEF_D(2),
{ \
"x" #i, nullptr, 8, OFFSET(x) + i * 8, eEncodingUint, eFormatHex, \
{arm64_dwarf::x##i, arm64_dwarf::x##i, INV, INV, reg_x##i}, \
- nullptr, nullptr, nullptr, 0 \
+ nullptr, nullptr, \
}
#define DEF_W(i) \
{ \
"w" #i, nullptr, 4, OFFSET(x) + i * 8, eEncodingUint, eFormatHex, \
- {INV, INV, INV, INV, reg_w##i}, nullptr, nullptr, nullptr, 0 \
+ {INV, INV, INV, INV, reg_w##i}, nullptr, nullptr, \
}
#define DEF_X_ARG(i, n) \
{ \
"x" #i, "arg" #n, 8, OFFSET(x) + i * 8, eEncodingUint, eFormatHex, \
{arm64_dwarf::x##i, arm64_dwarf::x##i, LLDB_REGNUM_GENERIC_ARG1 + i, \
- INV, reg_x##i}, nullptr, nullptr, nullptr, 0 \
+ INV, reg_x##i}, nullptr, nullptr, \
}
#define DEF_V(i) \
{ \
"v" #i, nullptr, 16, OFFSET(v) + i * 16, eEncodingVector, \
eFormatVectorOfUInt8, {arm64_dwarf::v##i, arm64_dwarf::v##i, INV, INV, \
- reg_v##i}, nullptr, nullptr, nullptr, 0 \
+ reg_v##i}, nullptr, nullptr, \
}
#define DEF_D(i) \
{ \
"d" #i, nullptr, 8, OFFSET(v) + i * 16, eEncodingVector, \
eFormatVectorOfUInt8, {INV, INV, INV, INV, reg_d##i}, nullptr, \
- nullptr, nullptr, 0 \
+ nullptr, \
}
#define DEF_S(i) \
{ \
"s" #i, nullptr, 4, OFFSET(v) + i * 16, eEncodingVector, \
eFormatVectorOfUInt8, {INV, INV, INV, INV, reg_s##i}, nullptr, \
- nullptr, nullptr, 0 \
+ nullptr, \
}
#define DEF_H(i) \
{ \
"h" #i, nullptr, 2, OFFSET(v) + i * 16, eEncodingVector, \
eFormatVectorOfUInt8, {INV, INV, INV, INV, reg_h##i}, nullptr, \
- nullptr, nullptr, 0 \
+ nullptr, \
}
// Zero based LLDB register numbers for this register context
{arm64_dwarf::x29, arm64_dwarf::x29, LLDB_REGNUM_GENERIC_FP, INV, reg_fp},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"lr",
"x30",
8,
{arm64_dwarf::x30, arm64_dwarf::x30, LLDB_REGNUM_GENERIC_RA, INV, reg_lr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"sp",
"x31",
8,
{arm64_dwarf::x31, arm64_dwarf::x31, LLDB_REGNUM_GENERIC_SP, INV, reg_sp},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"pc",
nullptr,
8,
{arm64_dwarf::pc, arm64_dwarf::pc, LLDB_REGNUM_GENERIC_PC, INV, reg_pc},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
// w0 - w31
DEF_W(0),
DEF_W(1),
{INV, arm64_dwarf::cpsr, LLDB_REGNUM_GENERIC_FLAGS, INV, reg_cpsr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"fpsr",
nullptr,
4,
{INV, INV, INV, INV, reg_fpsr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
{"fpcr",
nullptr,
4,
{INV, INV, INV, INV, reg_fpcr},
nullptr,
nullptr,
- nullptr,
- 0},
+ },
// v0 - v31
DEF_V(0),
DEF_V(1),
m_set_names = std::move(info.m_set_names);
m_value_regs_map = std::move(info.m_value_regs_map);
m_invalidate_regs_map = std::move(info.m_invalidate_regs_map);
- m_dynamic_reg_size_map = std::move(info.m_dynamic_reg_size_map);
m_reg_data_byte_size = info.m_reg_data_byte_size;
m_finalized = info.m_finalized;
reg_info.byte_size = bitsize / 8;
- llvm::StringRef dwarf_opcode_string;
- if (reg_info_dict->GetValueForKeyAsString("dynamic_size_dwarf_expr_bytes",
- dwarf_opcode_string)) {
- reg_info.dynamic_size_dwarf_len = dwarf_opcode_string.size() / 2;
- assert(reg_info.dynamic_size_dwarf_len > 0);
-
- std::vector<uint8_t> dwarf_opcode_bytes(reg_info.dynamic_size_dwarf_len);
- uint32_t j;
- StringExtractor opcode_extractor(dwarf_opcode_string);
- uint32_t ret_val = opcode_extractor.GetHexBytesAvail(dwarf_opcode_bytes);
- UNUSED_IF_ASSERT_DISABLED(ret_val);
- assert(ret_val == reg_info.dynamic_size_dwarf_len);
-
- for (j = 0; j < reg_info.dynamic_size_dwarf_len; ++j)
- m_dynamic_reg_size_map[i].push_back(dwarf_opcode_bytes[j]);
-
- reg_info.dynamic_size_dwarf_expr_bytes = m_dynamic_reg_size_map[i].data();
- }
-
llvm::StringRef format_str;
if (reg_info_dict->GetValueForKeyAsString("format", format_str, nullptr)) {
if (OptionArgParser::ToFormat(format_str.str().c_str(), reg_info.format,
// invalidate until Finalize() is called
reg_info.invalidate_regs = nullptr;
}
- if (reg_info.dynamic_size_dwarf_expr_bytes) {
- for (i = 0; i < reg_info.dynamic_size_dwarf_len; ++i)
- m_dynamic_reg_size_map[reg_num].push_back(
- reg_info.dynamic_size_dwarf_expr_bytes[i]);
-
- reg_info.dynamic_size_dwarf_expr_bytes =
- m_dynamic_reg_size_map[reg_num].data();
- }
m_regs.push_back(reg_info);
uint32_t set = GetRegisterSetIndexByName(set_name, true);
m_set_names.clear();
m_value_regs_map.clear();
m_invalidate_regs_map.clear();
- m_dynamic_reg_size_map.clear();
m_reg_data_byte_size = 0;
m_finalized = false;
}
return nullptr;
}
-uint32_t
-RegisterContext::UpdateDynamicRegisterSize(const lldb_private::ArchSpec &arch,
- RegisterInfo *reg_info) {
- ExecutionContext exe_ctx(CalculateThread());
-
- // In MIPS, the floating point registers size is depends on FR bit of SR
- // register. if SR.FR == 1 then all floating point registers are 64 bits.
- // else they are all 32 bits.
-
- int expr_result;
- uint32_t addr_size = arch.GetAddressByteSize();
- const uint8_t *dwarf_opcode_ptr = reg_info->dynamic_size_dwarf_expr_bytes;
- const size_t dwarf_opcode_len = reg_info->dynamic_size_dwarf_len;
-
- DataExtractor dwarf_data(dwarf_opcode_ptr, dwarf_opcode_len,
- arch.GetByteOrder(), addr_size);
- ModuleSP opcode_ctx;
- DWARFExpression dwarf_expr(opcode_ctx, dwarf_data, nullptr);
- Value result;
- Status error;
- if (dwarf_expr.Evaluate(&exe_ctx, this, opcode_ctx, dwarf_data, nullptr,
- eRegisterKindDWARF, nullptr, nullptr, result,
- &error)) {
- expr_result = result.GetScalar().SInt(-1);
- switch (expr_result) {
- case 0:
- return 4;
- case 1:
- return 8;
- default:
- return reg_info->byte_size;
- }
- } else {
- printf("Error executing DwarfExpression::Evaluate %s\n", error.AsCString());
- return reg_info->byte_size;
- }
-}
-
const RegisterInfo *RegisterContext::GetRegisterInfo(lldb::RegisterKind kind,
uint32_t num) {
const uint32_t reg_num = ConvertRegisterKindToRegisterNumber(kind, num);
lldb::eFormatUnsigned,
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
next_regnum, next_regnum},
- nullptr, nullptr, nullptr, 0
+ nullptr, nullptr
};
if (!value_regs.empty()) {
lldb::eFormatUnsigned,
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, eax,
eax},
- value_regs, nullptr, nullptr, 0
+ value_regs, nullptr
};
info.AddSupplementaryRegister(eax_reg, group);
"ax", nullptr, 2, LLDB_INVALID_INDEX32, lldb::eEncodingUint,
lldb::eFormatUnsigned,
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, ax, ax},
- value_regs, nullptr, nullptr, 0
+ value_regs, nullptr
};
info.AddSupplementaryRegister(ax_reg, group);
"al", nullptr, 1, LLDB_INVALID_INDEX32, lldb::eEncodingUint,
lldb::eFormatUnsigned,
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, al, al},
- value_regs, nullptr, nullptr, 0
+ value_regs, nullptr
};
info.AddSupplementaryRegister(al_reg, group);
},
nullptr,
nullptr,
- nullptr, // Dwarf expression opcode bytes pointer
- 0 // Dwarf expression opcode bytes length
};
Info.name = ConstString(Elements["name"]).GetCString();
if (!Info.name)
projects / platform / upstream / llvm.git / commitdiff