asahi: Dynamically configure tile size

We need to shrink the tile size when using small images (including
due to mipmapping) or when using large block sizes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

diff --git a/src/asahi/lib/tiling.c b/src/asahi/lib/tiling.c
index db0b84c..5a40d21 100644 (file)
--- a/src/asahi/lib/tiling.c
+++ b/src/asahi/lib/tiling.c
@@ -29,7 +29,7 @@
 #include "util/macros.h"
 #include "tiling.h"
 
-/* Z-order with 64x64 tiles:
+/* Z-order with square tiles, at most 64x64:
  *
  *     [y5][x5][y4][x4][y3][x3][y2][x2][y1][x1][y0][x0]
  *
@@ -54,48 +54,46 @@
  * applying the two's complement identity, we are left with (X - mask) & mask
  */
 
-#define TILE_WIDTH 64
-#define TILE_HEIGHT 64
-#define TILE_SHIFT 6
-#define TILE_MASK ((1 << TILE_SHIFT) - 1)
-
 /* mask of bits used for X coordinate in a tile */
 #define SPACE_MASK 0x555 // 0b010101010101
 
 static uint32_t
 agx_space_bits(unsigned x)
 {
-   assert(x < TILE_WIDTH);
+   assert(x < 64);
    return ((x & 1) << 0) | ((x & 2) << 1) | ((x & 4) << 2) |
           ((x & 8) << 3) | ((x & 16) << 4) | ((x & 32) << 5);
 }
 
-#define TILED_UNALIGNED_TYPE(pixel_t, is_store) { \
-       unsigned tiles_per_row = (width + TILE_WIDTH - 1) >> TILE_SHIFT;\
-       unsigned y_offs = agx_space_bits(sy & TILE_MASK) << 1;\
-       unsigned x_offs_start = agx_space_bits(sx & TILE_MASK);\
+#define TILED_UNALIGNED_TYPE(pixel_t, is_store, tile_shift) { \
+   unsigned tile_size = (1 << tile_shift);\
+   unsigned pixels_per_tile = tile_size * tile_size;\
+       unsigned tiles_per_row = (width + tile_size - 1) >> tile_shift;\
+       unsigned y_offs = agx_space_bits(sy & (tile_size - 1)) << 1;\
+       unsigned x_offs_start = agx_space_bits(sx & (tile_size - 1));\
+   unsigned space_mask = SPACE_MASK & (pixels_per_tile - 1);\
 \
        for (unsigned y = sy; y < smaxy; ++y) {\
-               unsigned tile_y = (y >> TILE_SHIFT);\
+               unsigned tile_y = (y >> tile_shift);\
                unsigned tile_row = tile_y * tiles_per_row;\
                unsigned x_offs = x_offs_start;\
 \
                pixel_t *linear_row = linear;\
                \
                for (unsigned x = sx; x < smaxx; ++x) {\
-                       unsigned tile_x = (x >> TILE_SHIFT);\
+                       unsigned tile_x = (x >> tile_shift);\
                        unsigned tile_idx = (tile_row + tile_x);\
-                       unsigned tile_base = tile_idx * (TILE_WIDTH * TILE_HEIGHT);\
+                       unsigned tile_base = tile_idx * pixels_per_tile;\
 \
                        pixel_t *ptiled = &tiled[tile_base + y_offs + x_offs];\
                        pixel_t *plinear = (linear_row++);\
                        pixel_t *outp = (pixel_t *) (is_store ? ptiled : plinear); \
                        pixel_t *inp = (pixel_t *) (is_store ? plinear : ptiled); \
                        *outp = *inp;\
-                       x_offs = (x_offs - SPACE_MASK) & SPACE_MASK;\
+                       x_offs = (x_offs - space_mask) & space_mask;\
                }\
 \
-               y_offs = (((y_offs >> 1) - SPACE_MASK) & SPACE_MASK) << 1;\
+               y_offs = (((y_offs >> 1) - space_mask) & space_mask) << 1;\
                linear += linear_pitch;\
        }\
 }
@@ -103,25 +101,26 @@ agx_space_bits(unsigned x)
 void
 agx_detile(void *_tiled, void *_linear,
            unsigned width, unsigned bpp, unsigned linear_pitch,
-           unsigned sx, unsigned sy, unsigned smaxx, unsigned smaxy)
+           unsigned sx, unsigned sy, unsigned smaxx, unsigned smaxy, unsigned tile_shift)
 {
    /* TODO: parametrize with macro magic */
    assert(bpp == 32);
 
    uint32_t *linear = _linear;
    uint32_t *tiled = _tiled;
-   TILED_UNALIGNED_TYPE(uint32_t, false);
+   TILED_UNALIGNED_TYPE(uint32_t, false, tile_shift);
 }
 
 void
 agx_tile(void *_tiled, void *_linear,
          unsigned width, unsigned bpp, unsigned linear_pitch,
-         unsigned sx, unsigned sy, unsigned smaxx, unsigned smaxy)
+         unsigned sx, unsigned sy, unsigned smaxx, unsigned smaxy,
+         unsigned tile_shift)
 {
    /* TODO: parametrize with macro magic */
    assert(bpp == 32);
 
    uint32_t *linear = _linear;
    uint32_t *tiled = _tiled;
-   TILED_UNALIGNED_TYPE(uint32_t, true);
+   TILED_UNALIGNED_TYPE(uint32_t, true, tile_shift);
 }

diff --git a/src/asahi/lib/tiling.h b/src/asahi/lib/tiling.h
index 7cc02c9..3566af4 100644 (file)
--- a/src/asahi/lib/tiling.h
+++ b/src/asahi/lib/tiling.h
@@ -24,12 +24,38 @@
 #ifndef __AGX_TILING_H
 #define __AGX_TILING_H
 
+#include "util/u_math.h"
+
 void agx_detile(void *tiled, void *linear,
                 unsigned width, unsigned bpp, unsigned linear_pitch,
-                unsigned sx, unsigned sy, unsigned smaxx, unsigned smaxy);
+                unsigned sx, unsigned sy, unsigned smaxx, unsigned smaxy, unsigned tile_shift);
 
 void agx_tile(void *tiled, void *linear,
          unsigned width, unsigned bpp, unsigned linear_pitch,
-         unsigned sx, unsigned sy, unsigned smaxx, unsigned smaxy);
+         unsigned sx, unsigned sy, unsigned smaxx, unsigned smaxy, unsigned tile_shift);
+
+/* Select effective tile size given texture dimensions */
+static inline unsigned
+agx_select_tile_shift(unsigned width, unsigned height, unsigned level, unsigned blocksize)
+{
+   /* Calculate effective width/height due to mipmapping */
+   width = u_minify(width, level);
+   height = u_minify(height, level);
+
+   /* Select the largest square power-of-two tile fitting in the image */
+   unsigned shift = util_logbase2_ceil(MIN3(width, height, 64));
+
+   /* Shrink based on block size */
+   if (blocksize > 4)
+      return MAX2(shift - 1, 0);
+   else
+      return shift;
+}
+
+static inline unsigned
+agx_select_tile_size(unsigned width, unsigned height, unsigned level, unsigned blocksize)
+{
+   return 1 << agx_select_tile_shift(width, height, level, blocksize);
+}
 
 #endif

diff --git a/src/gallium/drivers/asahi/agx_pipe.c b/src/gallium/drivers/asahi/agx_pipe.c
index 71cda65..d8660d3 100644 (file)
--- a/src/gallium/drivers/asahi/agx_pipe.c
+++ b/src/gallium/drivers/asahi/agx_pipe.c
@@ -312,7 +312,7 @@ agx_transfer_map(struct pipe_context *pctx,
             agx_detile(map, dst,
                u_minify(resource->width0, level), bytes_per_pixel * 8,
                transfer->base.stride / bytes_per_pixel,
-               box->x, box->y, box->x + box->width, box->y + box->height);
+               box->x, box->y, box->x + box->width, box->y + box->height, 6);
          }
       }
 
@@ -365,7 +365,7 @@ agx_transfer_unmap(struct pipe_context *pctx,
             transfer->stride / bytes_per_pixel,
             transfer->box.x, transfer->box.y,
             transfer->box.x + transfer->box.width,
-            transfer->box.y + transfer->box.height);
+            transfer->box.y + transfer->box.height, 6);
       }
    }
 
@@ -660,7 +660,7 @@ agx_flush_frontbuffer(struct pipe_screen *_screen,
    if (rsrc->modifier == DRM_FORMAT_MOD_APPLE_64X64_MORTON_ORDER) {
       agx_detile(rsrc->bo->ptr.cpu, map,
                  rsrc->base.width0, 32, rsrc->dt_stride / 4,
-                 0, 0, rsrc->base.width0, rsrc->base.height0);
+                 0, 0, rsrc->base.width0, rsrc->base.height0, 6);
    } else {
       memcpy(map, rsrc->bo->ptr.cpu, rsrc->dt_stride * rsrc->base.height0);
    }