PCI: pciehp: Disable in-band presence detect when possible

The presence detect state (PDS) is normally a logical OR of in-band and
out-of-band (OOB) presence detect.  As of PCIe 4.0, there is the option to
disable in-band presence so that the PDS bit always reflects the state of
the out-of-band presence.

The recommendation of the PCIe spec is to disable in-band presence whenever
supported (PCIe r5.0, appendix I implementation note):

  Due to architectural issues, the in-band (Physical-Layer-based) portion
  of the PD mechanism is deprecated for use with async hot-plug. One issue
  is that in-band PD as architected does not detect adapter removal during
  certain LTSSM states, notably the L1 and Disabled States.  Another issue
  is that when both in-band and OOB PD are being used together, the
  Presence Detect State bit and its associated interrupt mechanism always
  reflect the logical OR of the inband and OOB PD states, and with some
  hot-plug hardware configurations, it is important for software to detect
  and respond to in-band and OOB PD events independently.  If OOB PD is
  being used and the associated DSP supports In-Band PD Disable, it is
  recommended that the In-Band PD Disable bit be Set, and the Presence
  Detect State bit and its associated interrupt mechanism be used
  exclusively for OOB PD.  As a substitute for in-band PD with async
  hot-plug, the reference model uses either the DPC or the DLL Link Active
  mechanism.

Link: https://lore.kernel.org/r/20191025190047.38130-2-stuart.w.hayes@gmail.com
[bhelgaas: move PCI_EXP_SLTCAP2 read earlier & print PCI_EXP_SLTCAP2_IBPD
value (suggested by Lukas)]
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Lukas Wunner <lukas@wunner.de>

diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index aa61d4c219d7b63ccfcaedb78cb481c8861b0fe4..ae44f46d1bf3bac1c300fee51c9a276e7de95227 100644 (file)
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -84,6 +84,7 @@ struct controller {
        struct pcie_device *pcie;
 
        u32 slot_cap;                           /* capabilities and quirks */
+       unsigned int inband_presence_disabled:1;
 
        u16 slot_ctrl;                          /* control register access */
        struct mutex ctrl_lock;

diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 8a2cb17643864508156dc19d304fadd88bae06d4..a573490289c3d23893a4740f5c8c556bdf752e73 100644 (file)
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -848,7 +848,7 @@ static inline void dbg_ctrl(struct controller *ctrl)
 struct controller *pcie_init(struct pcie_device *dev)
 {
        struct controller *ctrl;
-       u32 slot_cap, link_cap;
+       u32 slot_cap, slot_cap2, link_cap;
        u8 poweron;
        struct pci_dev *pdev = dev->port;
        struct pci_bus *subordinate = pdev->subordinate;
@@ -883,6 +883,13 @@ struct controller *pcie_init(struct pcie_device *dev)
        ctrl->state = list_empty(&subordinate->devices) ? OFF_STATE : ON_STATE;
        up_read(&pci_bus_sem);
 
+       pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP2, &slot_cap2);
+       if (slot_cap2 & PCI_EXP_SLTCAP2_IBPD) {
+               pcie_write_cmd_nowait(ctrl, PCI_EXP_SLTCTL_IBPD_DISABLE,
+                                     PCI_EXP_SLTCTL_IBPD_DISABLE);
+               ctrl->inband_presence_disabled = 1;
+       }
+
        /* Check if Data Link Layer Link Active Reporting is implemented */
        pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap);
 
@@ -892,7 +899,7 @@ struct controller *pcie_init(struct pcie_device *dev)
                PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_CC |
                PCI_EXP_SLTSTA_DLLSC | PCI_EXP_SLTSTA_PDC);
 
-       ctrl_info(ctrl, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interlock%c NoCompl%c LLActRep%c%s\n",
+       ctrl_info(ctrl, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interlock%c NoCompl%c IbPresDis%c LLActRep%c%s\n",
                (slot_cap & PCI_EXP_SLTCAP_PSN) >> 19,
                FLAG(slot_cap, PCI_EXP_SLTCAP_ABP),
                FLAG(slot_cap, PCI_EXP_SLTCAP_PCP),
@@ -903,6 +910,7 @@ struct controller *pcie_init(struct pcie_device *dev)
                FLAG(slot_cap, PCI_EXP_SLTCAP_HPS),
                FLAG(slot_cap, PCI_EXP_SLTCAP_EIP),
                FLAG(slot_cap, PCI_EXP_SLTCAP_NCCS),
+               FLAG(slot_cap2, PCI_EXP_SLTCAP2_IBPD),
                FLAG(link_cap, PCI_EXP_LNKCAP_DLLLARC),
                pdev->broken_cmd_compl ? " (with Cmd Compl erratum)" : "");
 

diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 5437690483cded0999edd48eb7d7f327326264f8..f9701410d3b52b7cfc549c50f08ab5478e04e385 100644 (file)
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -605,6 +605,7 @@
 #define  PCI_EXP_SLTCTL_PWR_OFF        0x0400 /* Power Off */
 #define  PCI_EXP_SLTCTL_EIC    0x0800  /* Electromechanical Interlock Control */
 #define  PCI_EXP_SLTCTL_DLLSCE 0x1000  /* Data Link Layer State Changed Enable */
+#define  PCI_EXP_SLTCTL_IBPD_DISABLE   0x4000 /* In-band PD disable */
 #define PCI_EXP_SLTSTA         26      /* Slot Status */
 #define  PCI_EXP_SLTSTA_ABP    0x0001  /* Attention Button Pressed */
 #define  PCI_EXP_SLTSTA_PFD    0x0002  /* Power Fault Detected */
@@ -680,6 +681,7 @@
 #define PCI_EXP_LNKSTA2                50      /* Link Status 2 */
 #define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 52      /* v2 endpoints with link end here */
 #define PCI_EXP_SLTCAP2                52      /* Slot Capabilities 2 */
+#define  PCI_EXP_SLTCAP2_IBPD  0x00000001 /* In-band PD Disable Supported */
 #define PCI_EXP_SLTCTL2                56      /* Slot Control 2 */
 #define PCI_EXP_SLTSTA2                58      /* Slot Status 2 */