+2009-07-24 Nick Clifton <nickc@redhat.com>
+
+ PR 10437
+ * config/tc-alpha.c: Fix up uses of gas printf like functions so
+ that the format string is a constant string. Add translation
+ support to message strings.
+ * config/tc-arc.c: Likewise.
+ * config/tc-arm.c: Likewise.
+ * config/tc-cris.c: Likewise.
+ * config/tc-fr30.c: Likewise.
+ * config/tc-frv.c: Likewise.
+ * config/tc-h8300.c: Likewise.
+ * config/tc-hppa.c: Likewise.
+ * config/tc-i370.c: Likewise.
+ * config/tc-i960.c: Likewise.
+ * config/tc-ia64.c: Likewise.
+ * config/tc-m32r.c: Likewise.
+ * config/tc-mep.c: Likewise.
+ * config/tc-mips.c: Likewise.
+ * config/tc-moxie.c: Likewise.
+ * config/tc-msp430.c: Likewise.
+ * config/tc-openrisc.c: Likewise.
+ * config/tc-pdp11.c: Likewise.
+ * config/tc-pj.c: Likewise.
+ * config/tc-s390.c: Likewise.
+ * config/tc-sh.c: Likewise.
+ * config/tc-sh64.c: Likewise.
+ * config/tc-sparc.c: Likewise.
+ * config/tc-spu.c: Likewise.
+ * config/tc-tic30.c: Likewise.
+ * config/tc-tic4x.c: Likewise.
+ * config/tc-tic54x.c: Likewise.
+ * config/tc-v850.c: Likewise.
+ * config/tc-xc16x.c: Likewise.
+ * config/tc-xstormy16.c: Likewise.
+ * config/tc-z80.c: Likewise.
+ * config/tc-z8k.c: Likewise.
+ * config/atof-ieee.c: Add translation support to as_warn
+ messages.
+ * config/obj-coff.c: Likewise.
+
2009-07-23 Ulrich Drepper <drepper@redhat.com>
* config/obj-elf.c (obj_elf_type): Add code to support a type of
/* atof_ieee.c - turn a Flonum into an IEEE floating point number
Copyright 1987, 1992, 1994, 1996, 1997, 1998, 1999, 2000, 2001, 2005,
- 2007 Free Software Foundation, Inc.
+ 2007, 2009 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
if (generic_floating_point_number.sign == 0)
{
if (TC_LARGEST_EXPONENT_IS_NORMAL (precision))
- as_warn ("NaNs are not supported by this target\n");
+ as_warn (_("NaNs are not supported by this target\n"));
if (precision == F_PRECISION)
{
words[0] = 0x7fff;
else if (generic_floating_point_number.sign == 'P')
{
if (TC_LARGEST_EXPONENT_IS_NORMAL (precision))
- as_warn ("Infinities are not supported by this target\n");
+ as_warn (_("Infinities are not supported by this target\n"));
/* +INF: Do the right thing. */
if (precision == F_PRECISION)
else if (generic_floating_point_number.sign == 'N')
{
if (TC_LARGEST_EXPONENT_IS_NORMAL (precision))
- as_warn ("Infinities are not supported by this target\n");
+ as_warn (_("Infinities are not supported by this target\n"));
/* Negative INF. */
if (precision == F_PRECISION)
/* coff object file format
Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2009
Free Software Foundation, Inc.
This file is part of GAS.
if (next_set_end != NULL)
{
if (set_end != NULL)
- as_warn ("Warning: internal error: forgetting to set endndx of %s",
+ as_warn (_("Warning: internal error: forgetting to set endndx of %s"),
S_GET_NAME (set_end));
set_end = next_set_end;
}
/* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
Copyright 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
- 2001, 2002, 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
+ 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009
+ Free Software Foundation, Inc.
Contributed by Carnegie Mellon University, 1993.
Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
Modified by Ken Raeburn for gas-2.x and ECOFF support.
strcpy (info->string, buffer);
errmsg = hash_insert (alpha_literal_hash, info->string, (void *) info);
if (errmsg)
- as_fatal (errmsg);
+ as_fatal ("%s", errmsg);
#ifdef OBJ_EVAX
info->sym = 0;
info->psym = 0;
insn = (*operand->insert) (insn, val, &errmsg);
if (errmsg)
- as_warn (errmsg);
+ as_warn ("%s", errmsg);
}
else
insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift);
if (S_GET_VALUE (symbolP))
{
if (S_GET_VALUE (symbolP) != (valueT) size)
- as_bad ("Length of .comm \"%s\" is already %ld. Not changed to %ld.",
+ as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
S_GET_NAME (symbolP),
(long) S_GET_VALUE (symbolP),
(long) size);
alpha_target_name = p->name, alpha_target = p->flags;
goto found;
}
- as_warn ("Unknown CPU identifier `%s'", name);
+ as_warn (_("Unknown CPU identifier `%s'"), name);
found:
*input_line_pointer = ch;
/* tc-arc.c -- Assembler for the ARC
Copyright 1994, 1995, 1997, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
- 2006, 2007 Free Software Foundation, Inc.
+ 2006, 2007, 2009 Free Software Foundation, Inc.
Contributed by Doug Evans (dje@cygnus.com).
This file is part of GAS, the GNU Assembler.
errmsg = NULL;
insn = (*operand->insert) (insn, operand, mods, reg, (long) val, &errmsg);
if (errmsg != (const char *) NULL)
- as_warn (errmsg);
+ as_warn ("%s", errmsg);
}
else
insn |= (((long) val & ((1 << operand->bits) - 1))
last_errmsg = errmsg;
if (operand->flags & ARC_OPERAND_ERROR)
{
- as_bad (errmsg);
+ as_bad ("%s", errmsg);
return;
}
else if (operand->flags & ARC_OPERAND_WARN)
- as_warn (errmsg);
+ as_warn ("%s", errmsg);
break;
}
if (limm_reloc_p
last_errmsg = errmsg;
if (operand->flags & ARC_OPERAND_ERROR)
{
- as_bad (errmsg);
+ as_bad ("%s", errmsg);
return;
}
else if (operand->flags & ARC_OPERAND_WARN)
- as_warn (errmsg);
+ as_warn ("%s", errmsg);
break;
}
}
if (NULL == last_errmsg)
as_bad (_("bad instruction `%s'"), start);
else
- as_bad (last_errmsg);
+ as_bad ("%s", last_errmsg);
}
int leading_brace = 0;
enum arm_reg_type rtype = REG_TYPE_NDQ;
int addregs = 1;
- const char *const incr_error = "register stride must be 1 or 2";
- const char *const type_error = "mismatched element/structure types in list";
+ const char *const incr_error = _("register stride must be 1 or 2");
+ const char *const type_error = _("mismatched element/structure types in list");
struct neon_typed_alias firsttype;
if (skip_past_char (&ptr, '{') == SUCCESS)
sprintf (err_msg,
_("alignments greater than %d bytes not supported in .text sections."),
MAX_MEM_FOR_RS_ALIGN_CODE + 1);
- as_fatal (err_msg);
+ as_fatal ("%s", err_msg);
}
p = frag_var (rs_align_code,
/* tc-cris.c -- Assembler code for the CRIS CPU core.
- Copyright 2000, 2001, 2002, 2003, 2004, 2006, 2007
+ Copyright 2000, 2001, 2002, 2003, 2004, 2006, 2007, 2009
Free Software Foundation, Inc.
Contributed by Axis Communications AB, Lund, Sweden.
pseudo yet, so some of this is just unused
framework. */
if (out_insnp->spec_reg->warning)
- as_warn (out_insnp->spec_reg->warning);
+ as_warn ("%s", out_insnp->spec_reg->warning);
else if (out_insnp->spec_reg->applicable_version
== cris_ver_warning)
/* Others have a generic warning. */
/* tc-fr30.c -- Assembler for the Fujitsu FR30.
- Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007
+ Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2009
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
if (!insn.insn)
{
- as_bad (errmsg);
+ as_bad ("%s", errmsg);
return;
}
/* tc-frv.c -- Assembler for the Fujitsu FRV.
- Copyright 2002, 2003, 2004, 2005, 2006, 2007, 2008
+ Copyright 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
Free Software Foundation. Inc.
This file is part of GAS, the GNU Assembler.
if (!insn.insn)
{
- as_bad (errmsg);
+ as_bad ("%s", errmsg);
return;
}
/* tc-h8300.c -- Assemble code for the Renesas H8/300
Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000,
- 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
+ 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
op->mode = (op->mode & ~SIZE) | L_8;
break;
default:
- as_warn ("invalid suffix after register.");
+ as_warn (_("invalid suffix after register."));
break;
}
src += 2;
/* Look up the opcode in the hash table. */
if ((insn = (struct pa_opcode *) hash_find (op_hash, str)) == NULL)
{
- as_bad ("Unknown opcode: `%s'", str);
+ as_bad (_("Unknown opcode: `%s'"), str);
return;
}
/* tc-i370.c -- Assembler for the IBM 360/370/390 instruction set.
Loosely based on the ppc files by Linas Vepstas <linas@linas.org> 1998, 99
Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
- 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
+ 2004, 2005, 2006, 2007, 2009 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support.
This file is part of GAS, the GNU Assembler.
#endif
else
{
- as_bad ("invalid switch -m%s", arg);
+ as_bad (_("invalid switch -m%s"), arg);
return 0;
}
break;
retval = hash_insert (i370_hash, op->name, (void *) op);
if (retval != (const char *) NULL)
{
- as_bad ("Internal assembler error for instruction %s", op->name);
+ as_bad (_("Internal assembler error for instruction %s"), op->name);
dup_insn = TRUE;
}
}
retval = hash_insert (i370_macro_hash, macro->name, (void *) macro);
if (retval != (const char *) NULL)
{
- as_bad ("Internal assembler error for macro %s", macro->name);
+ as_bad (_("Internal assembler error for macro %s"), macro->name);
dup_insn = TRUE;
}
}
|| ptr->reloc == BFD_RELOC_LO16_GOTOFF
|| ptr->reloc == BFD_RELOC_HI16_GOTOFF
|| ptr->reloc == BFD_RELOC_HI16_S_GOTOFF))
- as_warn ("identifier+constant@got means identifier@got+constant");
+ as_warn (_("identifier+constant@got means identifier@got+constant"));
/* Now check for identifier@suffix+constant */
if (*str == '-' || *str == '+')
int size = bfd_get_reloc_size (reloc_howto);
if (size > nbytes)
- as_bad ("%s relocations do not fit in %d bytes\n", reloc_howto->name, nbytes);
+ as_bad (_("%s relocations do not fit in %d bytes\n"),
+ reloc_howto->name, nbytes);
else
{
char *p = frag_more ((int) nbytes);
nbytes = 8;
break;
default:
- as_bad ("unsupported DC type");
+ as_bad (_("unsupported DC type"));
return;
}
if (close)
*close= ' ';
else
- as_bad ("missing end-quote");
+ as_bad (_("missing end-quote"));
}
if ('\"' == *input_line_pointer)
if (close)
*close= ' ';
else
- as_bad ("missing end-quote");
+ as_bad (_("missing end-quote"));
}
switch (type)
memcpy (p, tmp, nbytes);
break;
default:
- as_bad ("unsupported DC type");
+ as_bad (_("unsupported DC type"));
return;
}
alignment = 3;
break;
default:
- as_bad ("unsupported alignment");
+ as_bad (_("unsupported alignment"));
return;
}
frag_align (alignment, 0, 0);
record_alignment (now_seg, alignment);
}
else
- as_bad ("this DS form not yet supported");
+ as_bad (_("this DS form not yet supported"));
}
/* Solaris pseudo op to change to the .rodata section. */
SKIP_WHITESPACE ();
if (*input_line_pointer != ',')
{
- as_bad ("Expected comma after symbol-name: rest of line ignored.");
+ as_bad (_("Expected comma after symbol-name: rest of line ignored."));
ignore_rest_of_line ();
return;
}
input_line_pointer++;
if ((size = get_absolute_expression ()) < 0)
{
- as_warn (".COMMon length (%ld.) <0! Ignored.", (long) size);
+ as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
ignore_rest_of_line ();
return;
}
align = get_absolute_expression ();
if (align <= 0)
{
- as_warn ("ignoring bad alignment");
+ as_warn (_("ignoring bad alignment"));
align = 8;
}
}
if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
{
- as_bad ("Ignoring attempt to re-define symbol `%s'.",
+ as_bad (_("Ignoring attempt to re-define symbol `%s'."),
S_GET_NAME (symbolP));
ignore_rest_of_line ();
return;
if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
{
- as_bad ("Length of .lcomm \"%s\" is already %ld. Not changed to %ld.",
+ as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
S_GET_NAME (symbolP),
(long) S_GET_VALUE (symbolP),
(long) size);
;
if (align != 1)
{
- as_bad ("Common alignment not a power of 2");
+ as_bad (_("Common alignment not a power of 2"));
ignore_rest_of_line ();
return;
}
exx->X_add_number += baseaddr->X_add_number;
}
else
- as_bad ("Missing or bad .using directive");
+ as_bad (_("Missing or bad .using directive"));
}
/* Add an expression to the literal pool. */
if (lit_count == next_literal_pool_place) /* new entry */
{
if (next_literal_pool_place > MAX_LITERAL_POOL_SIZE)
- as_bad ("Literal Pool Overflow");
+ as_bad (_("Literal Pool Overflow"));
literals[next_literal_pool_place].exp = *exx;
literals[next_literal_pool_place].size = sz;
if (close)
*close= ' ';
else
- as_bad ("missing end-quote");
+ as_bad (_("missing end-quote"));
}
if ('\"' == *input_line_pointer)
{
if (close)
*close= ' ';
else
- as_bad ("missing end-quote");
+ as_bad (_("missing end-quote"));
}
if (('X' == name[0]) || ('E' == name[0]) || ('D' == name[0]))
{
/* O_big occurs when more than 4 bytes worth gets parsed. */
if ((exp->X_op != O_constant) && (exp->X_op != O_big))
{
- as_bad ("expression not a constant");
+ as_bad (_("expression not a constant"));
return FALSE;
}
add_to_lit_pool (exp, 0x0, cons_len);
break;
default:
- as_bad ("Unknown/unsupported address literal type");
+ as_bad (_("Unknown/unsupported address literal type"));
return FALSE;
}
if (strncmp (now_seg->name, ".text", 5))
{
if (i370_other_section == undefined_section)
- as_bad (".ltorg without prior .using in section %s",
+ as_bad (_(".ltorg without prior .using in section %s"),
now_seg->name);
if (i370_other_section != now_seg)
- as_bad (".ltorg in section %s paired to .using in section %s",
+ as_bad (_(".ltorg in section %s paired to .using in section %s"),
now_seg->name, i370_other_section->name);
}
else if (2 == biggest_literal_size) biggest_align = 1;
else if (4 == biggest_literal_size) biggest_align = 2;
else if (8 == biggest_literal_size) biggest_align = 3;
- else as_bad ("bad alignment of %d bytes in literal pool", biggest_literal_size);
+ else as_bad (_("bad alignment of %d bytes in literal pool"), biggest_literal_size);
if (0 == biggest_align) biggest_align = 1;
/* Align pool for short, word, double word accesses. */
case 1:
current_poolP = byte_poolP; break;
default:
- as_bad ("bad literal size\n");
+ as_bad (_("bad literal size\n"));
}
if (NULL == current_poolP)
continue;
if (O_constant != baseaddr.X_op
&& O_symbol != baseaddr.X_op
&& O_uminus != baseaddr.X_op)
- as_bad (".using: base address expression illegal or too complex");
+ as_bad (_(".using: base address expression illegal or too complex"));
if (*input_line_pointer != '\0') ++input_line_pointer;
if (0 == strncmp (now_seg->name, ".text", 5))
{
if (iregno != i370_using_text_regno)
- as_bad ("droping register %d in section %s does not match using register %d",
+ as_bad (_("droping register %d in section %s does not match using register %d"),
iregno, now_seg->name, i370_using_text_regno);
i370_using_text_regno = -1;
else
{
if (iregno != i370_using_other_regno)
- as_bad ("droping register %d in section %s does not match using register %d",
+ as_bad (_("droping register %d in section %s does not match using register %d"),
iregno, now_seg->name, i370_using_other_regno);
if (i370_other_section != now_seg)
- as_bad ("droping register %d in section %s previously used in section %s",
+ as_bad (_("droping register %d in section %s previously used in section %s"),
iregno, now_seg->name, i370_other_section->name);
i370_using_other_regno = -1;
if (count != macro->operands)
{
- as_bad ("wrong number of operands");
+ as_bad (_("wrong number of operands"));
return;
}
gas_assert (i370_macro_hash);
macro = (const struct i370_macro *) hash_find (i370_macro_hash, str);
if (macro == (const struct i370_macro *) NULL)
- as_bad ("Unrecognized opcode: `%s'", str);
+ as_bad (_("Unrecognized opcode: `%s'"), str);
else
i370_macro (s, macro);
basereg = i370_using_other_regno;
}
if (0 > basereg)
- as_bad ("not using any base register");
+ as_bad (_("not using any base register"));
insn = i370_insert_operand (insn, operand, basereg);
continue;
}
if (! register_name (&ex))
- as_bad ("expecting a register for operand %d",
+ as_bad (_("expecting a register for operand %d"),
(int) (opindex_ptr - opcode->operands + 1));
}
ex.X_add_number --;
if (ex.X_op == O_illegal)
- as_bad ("illegal operand");
+ as_bad (_("illegal operand"));
else if (ex.X_op == O_absent)
- as_bad ("missing operand");
+ as_bad (_("missing operand"));
else if (ex.X_op == O_register)
insn = i370_insert_operand (insn, operand, ex.X_add_number);
else if (ex.X_op == O_constant)
++str;
if (*str != '\0')
- as_bad ("junk at end of line: `%s'", str);
+ as_bad (_("junk at end of line: `%s'"), str);
/* Write out the instruction. */
f = frag_more (opcode->len);
else
{
/* Not used --- don't have any 8 byte instructions. */
- as_bad ("Internal Error: bad instruction length");
+ as_bad (_("Internal Error: bad instruction length"));
md_number_to_chars ((f + 4), insn.i[1], opcode->len -4);
}
}
/* tc-i960.c - All the i80960-specific stuff
Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007
+ 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2009
Free Software Foundation, Inc.
This file is part of GAS.
break;
case REG:
if (branch_predict)
- as_warn (bp_error_msg);
+ as_warn ("%s", bp_error_msg);
reg_fmt (args, oP);
break;
case MEM1:
if (args[0][0] == 'c' && args[0][1] == 'a')
{
if (branch_predict)
- as_warn (bp_error_msg);
+ as_warn ("%s", bp_error_msg);
mem_fmt (args, oP, 1);
break;
}
case MEM12:
case MEM16:
if (branch_predict)
- as_warn (bp_error_msg);
+ as_warn ("%s", bp_error_msg);
mem_fmt (args, oP, 0);
break;
case CALLJ:
if (branch_predict)
- as_warn (bp_error_msg);
+ as_warn ("%s", bp_error_msg);
/* Output opcode & set up "fixup" (relocation); flag
relocation as 'callj' type. */
know (oP->num_ops == 1);
if (reloc->howto == NULL)
{
as_bad_where (fixP->fx_file, fixP->fx_line,
- "internal error: can't export reloc type %d (`%s')",
+ _("internal error: can't export reloc type %d (`%s')"),
fixP->fx_r_type,
bfd_get_reloc_code_name (fixP->fx_r_type));
return NULL;
else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
{
if (value & ~0x3fffffffffffffffULL)
- err = "integer operand out of range";
+ err = _("integer operand out of range");
insn[1] = (value >> 21) & 0x1ffffffffffLL;
insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
}
/* tc-m32r.c -- Assembler for the Renesas M32R.
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
- 2006, 2007 Free Software Foundation, Inc.
+ 2006, 2007, 2009 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
if (! (first.insn = m32r_cgen_assemble_insn
(gas_cgen_cpu_desc, str1, & first.fields, first.buffer, & errmsg)))
{
- as_bad (errmsg);
+ as_bad ("%s", errmsg);
return;
}
if (! (second.insn = m32r_cgen_assemble_insn
(gas_cgen_cpu_desc, str1, & second.fields, second.buffer, & errmsg)))
{
- as_bad (errmsg);
+ as_bad ("%s", errmsg);
return;
}
if (!insn.insn)
{
- as_bad (errmsg);
+ as_bad ("%s", errmsg);
return;
}
case 7: /* $hi */
case 8: /* $lo */
if (!has_mul_div)
- as_bad ("$hi and $lo are disabled when MUL and DIV are off");
+ as_bad (_("$hi and $lo are disabled when MUL and DIV are off"));
break;
case 12: /* $mb0 */
case 13: /* $me0 */
case 14: /* $mb1 */
case 15: /* $me1 */
if (!has_cop)
- as_bad ("$mb0, $me0, $mb1, and $me1 are disabled when COP is off");
+ as_bad (_("$mb0, $me0, $mb1, and $me1 are disabled when COP is off"));
break;
case 24: /* $dbg */
case 25: /* $depc */
if (!has_debug)
- as_bad ("$dbg and $depc are disabled when DEBUG is off");
+ as_bad (_("$dbg and $depc are disabled when DEBUG is off"));
break;
}
}
if (insn0length + insn1length == 32)
return;
else
- as_bad ("core and copro insn lengths must total 32 bits.");
+ as_bad (_("core and copro insn lengths must total 32 bits."));
}
else
- as_bad ("vliw group must consist of 1 core and 1 copro insn.");
+ as_bad (_("vliw group must consist of 1 core and 1 copro insn."));
}
else
{
if (insn0length + insn1length == 64)
return;
else
- as_bad ("core and copro insn lengths must total 64 bits.");
+ as_bad (_("core and copro insn lengths must total 64 bits."));
}
else
- as_bad ("vliw group must consist of 1 core and 1 copro insn.");
+ as_bad (_("vliw group must consist of 1 core and 1 copro insn."));
}
else
{
else if (slot_ok (1, SLOTS_P0S))
slots[SLOTS_P0S] = 1;
else
- as_bad ("cannot pack %s with a 16-bit insn",
+ as_bad (_("cannot pack %s with a 16-bit insn"),
CGEN_INSN_NAME (saved_insns[1].insn));
break;
slots[SLOTS_P0S] = 2;
}
else
- as_bad ("cannot pack %s and %s together with a 16-bit insn",
+ as_bad (_("cannot pack %s and %s together with a 16-bit insn"),
CGEN_INSN_NAME (saved_insns[1].insn),
CGEN_INSN_NAME (saved_insns[2].insn));
break;
default:
- as_bad ("too many IVC2 insns to pack with a 16-bit core insn");
+ as_bad (_("too many IVC2 insns to pack with a 16-bit core insn"));
break;
}
}
case 2:
/* The other insn must allow P1. */
if (!slot_ok (1, SLOTS_P1))
- as_bad ("cannot pack %s into slot P1",
+ as_bad (_("cannot pack %s into slot P1"),
CGEN_INSN_NAME (saved_insns[1].insn));
else
slots[SLOTS_P1] = 1;
break;
default:
- as_bad ("too many IVC2 insns to pack with a 32-bit core insn");
+ as_bad (_("too many IVC2 insns to pack with a 32-bit core insn"));
break;
}
}
else if (slot_ok (0, SLOTS_P0S))
slots[SLOTS_P0S] = 0;
else
- as_bad ("unable to pack %s by itself?",
+ as_bad (_("unable to pack %s by itself?"),
CGEN_INSN_NAME (saved_insns[0].insn));
break;
slots[SLOTS_P0S] = 1;
}
else
- as_bad ("cannot pack %s and %s together",
+ as_bad (_("cannot pack %s and %s together"),
CGEN_INSN_NAME (saved_insns[0].insn),
CGEN_INSN_NAME (saved_insns[1].insn));
break;
default:
- as_bad ("too many IVC2 insns to pack together");
+ as_bad (_("too many IVC2 insns to pack together"));
break;
}
}
if (reg >= 0)
*s = e;
else if (types & RWARN)
- as_warn ("Unrecognized register name `%s'", *s);
+ as_warn (_("Unrecognized register name `%s'"), *s);
*e = save_c;
if (regnop)
/* If we did not find a '.', then we can quit now. */
if (*s != '.')
{
- insn_error = "unrecognized opcode";
+ insn_error = _("unrecognized opcode");
return;
}
*s++ = '\0';
if ((insn = (struct mips_opcode *) hash_find (op_hash, str)) == NULL)
{
- insn_error = "unrecognized opcode";
+ insn_error = _("unrecognized opcode");
return;
}
}
my_getExpression (&imm_expr, s);
check_absolute_expr (ip, &imm_expr);
if ((unsigned long) imm_expr.X_add_number > OP_MASK_ALN)
- as_warn ("Improper align amount (%ld), using low bits",
+ as_warn (_("Improper align amount (%ld), using low bits"),
(long) imm_expr.X_add_number);
INSERT_OPERAND (ALN, *ip, imm_expr.X_add_number);
imm_expr.X_op = O_absent;
check_absolute_expr (ip, &imm_expr);
s = expr_end;
if (imm_expr.X_add_number > max_el)
- as_bad(_("Bad element selector %ld"),
- (long) imm_expr.X_add_number);
+ as_bad (_("Bad element selector %ld"),
+ (long) imm_expr.X_add_number);
imm_expr.X_add_number &= max_el;
ip->insn_opcode |= (imm_expr.X_add_number
<< (OP_SH_VSEL +
(is_qh ? 2 : 1)));
imm_expr.X_op = O_absent;
if (*s != ']')
- as_warn(_("Expecting ']' found '%s'"), s);
+ as_warn (_("Expecting ']' found '%s'"), s);
else
s++;
}
|| strcmp(str + strlen(str) - 5, "any2f") == 0
|| strcmp(str + strlen(str) - 5, "any2t") == 0)
&& (regno & 1) != 0)
- as_warn(_("Condition code register should be even for %s, was %d"),
- str, regno);
+ as_warn (_("Condition code register should be even for %s, was %d"),
+ str, regno);
if ((strcmp(str + strlen(str) - 5, "any4f") == 0
|| strcmp(str + strlen(str) - 5, "any4t") == 0)
&& (regno & 3) != 0)
- as_warn(_("Condition code register should be 0 or 4 for %s, was %d"),
- str, regno);
+ as_warn (_("Condition code register should be 0 or 4 for %s, was %d"),
+ str, regno);
if (*args == 'N')
INSERT_OPERAND (BCC, *ip, regno);
else
If not, issue an error and fall back on something safe. */
if (!bfd_reloc_type_lookup (stdoutput, percent_op[i].reloc))
{
- as_bad ("relocation %s isn't supported by the current ABI",
+ as_bad (_("relocation %s isn't supported by the current ABI"),
percent_op[i].str);
*reloc = BFD_RELOC_UNUSED;
}
crux_depth--;
if (crux_depth > 0)
- as_bad ("unclosed '('");
+ as_bad (_("unclosed '('"));
expr_end = str;
arch_info = mips_parse_cpu ("default CPU", MIPS_CPU_STRING_DEFAULT);
if (ABI_NEEDS_64BIT_REGS (mips_abi) && !ISA_HAS_64BIT_REGS (arch_info->isa))
- as_bad ("-march=%s is not compatible with the selected ABI",
+ as_bad (_("-march=%s is not compatible with the selected ABI"),
arch_info->name);
mips_set_architecture (arch_info);
if (mips_opts.ase_smartmips == -1)
mips_opts.ase_smartmips = (arch_info->flags & MIPS_CPU_ASE_SMARTMIPS) ? 1 : 0;
if (mips_opts.ase_smartmips && !ISA_SUPPORTS_SMARTMIPS)
- as_warn ("%s ISA does not support SmartMIPS",
- mips_cpu_info_from_isa (mips_opts.isa)->name);
+ as_warn (_("%s ISA does not support SmartMIPS"),
+ mips_cpu_info_from_isa (mips_opts.isa)->name);
if (mips_opts.ase_dsp == -1)
mips_opts.ase_dsp = (arch_info->flags & MIPS_CPU_ASE_DSP) ? 1 : 0;
if (mips_opts.ase_dsp && !ISA_SUPPORTS_DSP_ASE)
- as_warn ("%s ISA does not support DSP ASE",
- mips_cpu_info_from_isa (mips_opts.isa)->name);
+ as_warn (_("%s ISA does not support DSP ASE"),
+ mips_cpu_info_from_isa (mips_opts.isa)->name);
if (mips_opts.ase_dspr2 == -1)
{
mips_opts.ase_dsp = (arch_info->flags & MIPS_CPU_ASE_DSP) ? 1 : 0;
}
if (mips_opts.ase_dspr2 && !ISA_SUPPORTS_DSPR2_ASE)
- as_warn ("%s ISA does not support DSP R2 ASE",
- mips_cpu_info_from_isa (mips_opts.isa)->name);
+ as_warn (_("%s ISA does not support DSP R2 ASE"),
+ mips_cpu_info_from_isa (mips_opts.isa)->name);
if (mips_opts.ase_mt == -1)
mips_opts.ase_mt = (arch_info->flags & MIPS_CPU_ASE_MT) ? 1 : 0;
if (mips_opts.ase_mt && !ISA_SUPPORTS_MT_ASE)
- as_warn ("%s ISA does not support MT ASE",
- mips_cpu_info_from_isa (mips_opts.isa)->name);
+ as_warn (_("%s ISA does not support MT ASE"),
+ mips_cpu_info_from_isa (mips_opts.isa)->name);
file_mips_isa = mips_opts.isa;
file_ase_mips16 = mips_opts.mips16;
else if (strcmp (name, "gp=64") == 0)
{
if (!ISA_HAS_64BIT_REGS (mips_opts.isa))
- as_warn ("%s isa does not support 64-bit registers",
+ as_warn (_("%s isa does not support 64-bit registers"),
mips_cpu_info_from_isa (mips_opts.isa)->name);
mips_opts.gp32 = 0;
}
else if (strcmp (name, "fp=64") == 0)
{
if (!ISA_HAS_64BIT_FPRS (mips_opts.isa))
- as_warn ("%s isa does not support 64-bit floating point registers",
+ as_warn (_("%s isa does not support 64-bit floating point registers"),
mips_cpu_info_from_isa (mips_opts.isa)->name);
mips_opts.fp32 = 0;
}
else if (strcmp (name, "smartmips") == 0)
{
if (!ISA_SUPPORTS_SMARTMIPS)
- as_warn ("%s ISA does not support SmartMIPS ASE",
+ as_warn (_("%s ISA does not support SmartMIPS ASE"),
mips_cpu_info_from_isa (mips_opts.isa)->name);
mips_opts.ase_smartmips = 1;
}
else if (strcmp (name, "dsp") == 0)
{
if (!ISA_SUPPORTS_DSP_ASE)
- as_warn ("%s ISA does not support DSP ASE",
+ as_warn (_("%s ISA does not support DSP ASE"),
mips_cpu_info_from_isa (mips_opts.isa)->name);
mips_opts.ase_dsp = 1;
mips_opts.ase_dspr2 = 0;
else if (strcmp (name, "dspr2") == 0)
{
if (!ISA_SUPPORTS_DSPR2_ASE)
- as_warn ("%s ISA does not support DSP R2 ASE",
+ as_warn (_("%s ISA does not support DSP R2 ASE"),
mips_cpu_info_from_isa (mips_opts.isa)->name);
mips_opts.ase_dspr2 = 1;
mips_opts.ase_dsp = 1;
else if (strcmp (name, "mt") == 0)
{
if (!ISA_SUPPORTS_MT_ASE)
- as_warn ("%s ISA does not support MT ASE",
+ as_warn (_("%s ISA does not support MT ASE"),
mips_cpu_info_from_isa (mips_opts.isa)->name);
mips_opts.ase_mt = 1;
}
{
if (S_IS_DEFINED (symbolP))
{
- as_bad ("ignoring attempt to redefine symbol %s",
+ as_bad (_("ignoring attempt to redefine symbol %s"),
S_GET_NAME (symbolP));
ignore_rest_of_line ();
return;
expression (&exp);
if (exp.X_op != O_symbol)
{
- as_bad ("bad .weakext directive");
+ as_bad (_("bad .weakext directive"));
ignore_rest_of_line ();
return;
}
if (mips_matching_cpu_name_p (p->name, cpu_string))
return p;
- as_bad ("Bad value (%s) for %s", cpu_string, option);
+ as_bad (_("Bad value (%s) for %s"), cpu_string, option);
return 0;
}
if (*s != '$')
{
- as_bad ("expecting register");
+ as_bad (_("expecting register"));
ignore_rest_of_line ();
return -1;
}
reg = s[2] - '0';
if ((reg < 0) || (reg > 9))
{
- as_bad ("illegal register number");
+ as_bad (_("illegal register number"));
ignore_rest_of_line ();
return -1;
}
}
else
{
- as_bad ("illegal register number");
+ as_bad (_("illegal register number"));
ignore_rest_of_line ();
return -1;
}
reg = parse_register_operand (&op_end);
iword += (reg << 8);
if (*op_end != ',')
- as_warn ("expecting comma delimeted register operands");
+ as_warn (_("expecting comma delimeted register operands"));
op_end++;
op_end = parse_exp_save_ilp (op_end, &arg);
fix_new_exp (frag_now,
int dest, src;
dest = parse_register_operand (&op_end);
if (*op_end != ',')
- as_warn ("expecting comma delimeted register operands");
+ as_warn (_("expecting comma delimeted register operands"0);
op_end++;
src = parse_register_operand (&op_end);
iword += (dest << 4) + src;
while (ISSPACE (*op_end))
op_end++;
if (*op_end != 0)
- as_warn ("extra stuff on line ignored");
+ as_warn (_("extra stuff on line ignored"));
}
break;
case MOXIE_F1_A4:
if (*op_end != ',')
{
- as_bad ("expecting comma delimited operands");
+ as_bad (_("expecting comma delimited operands"));
ignore_rest_of_line ();
return;
}
while (ISSPACE (*op_end))
op_end++;
if (*op_end != 0)
- as_warn ("extra stuff on line ignored");
+ as_warn (_("extra stuff on line ignored"));
break;
case MOXIE_F1_A:
iword = opcode->opcode << 8;
while (ISSPACE (*op_end))
op_end++;
if (*op_end != 0)
- as_warn ("extra stuff on line ignored");
+ as_warn (_("extra stuff on line ignored"));
iword += (reg << 4);
}
break;
int a, b;
a = parse_register_operand (&op_end);
if (*op_end != ',')
- as_warn ("expecting comma delimeted register operands");
+ as_warn (_("expecting comma delimeted register operands"));
op_end++;
if (*op_end != '(')
{
- as_bad ("expecting indirect register `($rA)'");
+ as_bad (_("expecting indirect register `($rA)'"));
ignore_rest_of_line ();
return;
}
b = parse_register_operand (&op_end);
if (*op_end != ')')
{
- as_bad ("missing closing parenthesis");
+ as_bad (_("missing closing parenthesis"));
ignore_rest_of_line ();
return;
}
while (ISSPACE (*op_end))
op_end++;
if (*op_end != 0)
- as_warn ("extra stuff on line ignored");
+ as_warn (_("extra stuff on line ignored"));
}
break;
case MOXIE_F1_AiB:
int a, b;
if (*op_end != '(')
{
- as_bad ("expecting indirect register `($rA)'");
+ as_bad (_("expecting indirect register `($rA)'"));
ignore_rest_of_line ();
return;
}
a = parse_register_operand (&op_end);
if (*op_end != ')')
{
- as_bad ("missing closing parenthesis");
+ as_bad (_("missing closing parenthesis"));
ignore_rest_of_line ();
return;
}
op_end++;
if (*op_end != ',')
- as_warn ("expecting comma delimeted register operands");
+ as_warn (_("expecting comma delimeted register operands"));
op_end++;
b = parse_register_operand (&op_end);
iword += (a << 4) + b;
while (ISSPACE (*op_end))
op_end++;
if (*op_end != 0)
- as_warn ("extra stuff on line ignored");
+ as_warn (_("extra stuff on line ignored"));
}
break;
case MOXIE_F1_4A:
if (*op_end != ',')
{
- as_bad ("expecting comma delimited operands");
+ as_bad (_("expecting comma delimited operands"));
ignore_rest_of_line ();
return;
}
while (ISSPACE (*op_end))
op_end++;
if (*op_end != 0)
- as_warn ("extra stuff on line ignored");
+ as_warn (_("extra stuff on line ignored"));
iword += (a << 4);
}
if (*op_end != ',')
{
- as_bad ("expecting comma delimited operands");
+ as_bad (_("expecting comma delimited operands"));
ignore_rest_of_line ();
return;
}
if (*op_end != '(')
{
- as_bad ("expecting indirect register `($rX)'");
+ as_bad (_("expecting indirect register `($rX)'"));
ignore_rest_of_line ();
return;
}
b = parse_register_operand (&op_end);
if (*op_end != ')')
{
- as_bad ("missing closing parenthesis");
+ as_bad (_("missing closing parenthesis"));
ignore_rest_of_line ();
return;
}
while (ISSPACE (*op_end))
op_end++;
if (*op_end != 0)
- as_warn ("extra stuff on line ignored");
+ as_warn (_("extra stuff on line ignored"));
iword += (a << 4) + b;
}
if (*op_end != '(')
{
- as_bad ("expecting indirect register `($rX)'");
+ as_bad (_("expecting indirect register `($rX)'"));
ignore_rest_of_line ();
return;
}
a = parse_register_operand (&op_end);
if (*op_end != ')')
{
- as_bad ("missing closing parenthesis");
+ as_bad (_("missing closing parenthesis"));
ignore_rest_of_line ();
return;
}
if (*op_end != ',')
{
- as_bad ("expecting comma delimited operands");
+ as_bad (_("expecting comma delimited operands"));
ignore_rest_of_line ();
return;
}
while (ISSPACE (*op_end))
op_end++;
if (*op_end != 0)
- as_warn ("extra stuff on line ignored");
+ as_warn (_("extra stuff on line ignored"));
iword += (a << 4) + b;
}
while (ISSPACE (*op_end))
op_end++;
if (*op_end != 0)
- as_warn ("extra stuff on line ignored");
+ as_warn (_("extra stuff on line ignored"));
break;
case MOXIE_F3_PCREL:
iword = (3<<14) | (opcode->opcode << 10);
}
break;
default:
- abort();
+ abort ();
}
md_number_to_chars (p, iword, 2);
op_end++;
if (*op_end != 0)
- as_warn ("extra stuff on line ignored");
+ as_warn (_("extra stuff on line ignored"));
if (pending_reloc)
- as_bad ("Something forgot to clean up\n");
+ as_bad (_("Something forgot to clean up\n"));
}
/* Turn a string in input_line_pointer into a floating point constant
if (bin == 0x1200)
{
/* Remove warning as confusing.
- as_warn(_("Hardware push bug workaround")); */
+ as_warn (_("Hardware push bug workaround")); */
}
else
#endif
if (bin == 0x1200)
{
/* Remove warning as confusing.
- as_warn(_("Hardware push bug workaround")); */
+ as_warn (_("Hardware push bug workaround")); */
}
else
#endif
case 4: /* Extended jumps. */
if (!msp430_enable_polys)
{
- as_bad(_("polymorphs are not enabled. Use -mP option to enable."));
+ as_bad (_("polymorphs are not enabled. Use -mP option to enable."));
break;
}
case 5: /* Emulated extended branches. */
if (!msp430_enable_polys)
{
- as_bad(_("polymorphs are not enabled. Use -mP option to enable."));
+ as_bad (_("polymorphs are not enabled. Use -mP option to enable."));
break;
}
line = extract_operand (line, l1, sizeof (l1));
/* tc-openrisc.c -- Assembler for the OpenRISC family.
- Copyright 2001, 2002, 2003, 2005, 2006, 2007 Free Software Foundation.
+ Copyright 2001, 2002, 2003, 2005, 2006, 2007, 2009
+ Free Software Foundation.
Contributed by Johan Rydberg, jrydberg@opencores.org
This file is part of GAS, the GNU Assembler.
if (!insn.insn)
{
- as_bad (errmsg);
+ as_bad ("%s", errmsg);
return;
}
insn_hash = hash_new ();
if (insn_hash == NULL)
- as_fatal ("Virtual memory exhausted");
+ as_fatal (_("Virtual memory exhausted"));
for (i = 0; i < pdp11_num_opcodes; i++)
hash_insert (insn_hash, pdp11_opcodes[i].name, (void *) (pdp11_opcodes + i));
str++;
break;
default:
- operand->error = "Bad register name";
+ operand->error = _("Bad register name");
return str - 1;
}
}
}
else
{
- operand->error = "Bad register name";
+ operand->error = _("Bad register name");
return str;
}
str++;
break;
default:
- operand->error = "Bad register name";
+ operand->error = _("Bad register name");
return str - 2;
}
}
else
{
- operand->error = "Bad register name";
+ operand->error = _("Bad register name");
return str;
}
str = parse_ac5 (str, operand);
if (!operand->error && operand->code > 3)
{
- operand->error = "Bad register name";
+ operand->error = _("Bad register name");
return str - 3;
}
if (seg == NULL)
{
input_line_pointer = save_input_line_pointer;
- operand->error = "Error in expression";
+ operand->error = _("Error in expression");
return str;
}
str = skip_whitespace (str);
if (*str != ')')
{
- operand->error = "Missing ')'";
+ operand->error = _("Missing ')'");
return str;
}
str++;
case O_big:
if (operand->reloc.exp.X_add_number > 0)
{
- operand->error = "Error in expression";
+ operand->error = _("Error in expression");
break;
}
/* It's a floating literal... */
as_warn (_("Low order bits truncated in immediate float operand"));
break;
default:
- operand->error = "Error in expression";
+ operand->error = _("Error in expression");
break;
}
operand->code = 027;
str = skip_whitespace (str);
if (*str != ')')
{
- operand->error = "Missing ')'";
+ operand->error = _("Missing ')'");
return str;
}
operand->code |= 040;
{
if (operand->reloc.exp.X_op != O_symbol)
{
- operand->error = "Label expected";
+ operand->error = _("Label expected");
return old;
}
operand->code = 067;
if (*str != ')')
{
- operand->error = "Missing ')'";
+ operand->error = _("Missing ')'");
return str;
}
parse_ac5 (str, operand);
if (!operand->error)
{
- operand->error = "Float AC not legal as integer operand";
+ operand->error = _("Float AC not legal as integer operand");
return str;
}
parse_reg (str, operand);
if (!operand->error)
{
- operand->error = "General register not legal as float operand";
+ operand->error = _("General register not legal as float operand");
return str;
}
p = find_whitespace (str);
if (p - str == 0)
{
- as_bad ("No instruction found");
+ as_bad (_("No instruction found"));
return;
}
if (!pdp11_extension[op->extension])
{
- as_warn ("Unsupported instruction set extension: %s", op->name);
+ as_warn (_("Unsupported instruction set extension: %s"), op->name);
return;
}
break;
if (op1.reloc.exp.X_op != O_constant || op1.reloc.type != BFD_RELOC_NONE)
{
- op1.error = "operand is not an absolute constant";
+ op1.error = _("operand is not an absolute constant");
break;
}
switch (op->type)
case PDP11_OPCODE_IMM3:
if (op1.reloc.exp.X_add_number & ~7)
{
- op1.error = "3-bit immediate out of range";
+ op1.error = _("3-bit immediate out of range");
break;
}
break;
case PDP11_OPCODE_IMM6:
if (op1.reloc.exp.X_add_number & ~0x3f)
{
- op1.error = "6-bit immediate out of range";
+ op1.error = _("6-bit immediate out of range");
break;
}
break;
case PDP11_OPCODE_IMM8:
if (op1.reloc.exp.X_add_number & ~0xff)
{
- op1.error = "8-bit immediate out of range";
+ op1.error = _("8-bit immediate out of range");
break;
}
break;
op1.reloc.type = BFD_RELOC_PDP11_DISP_8_PCREL;
if (op1.reloc.exp.X_op != O_symbol)
{
- op1.error = "Symbol expected";
+ op1.error = _("Symbol expected");
break;
}
if (op1.code & ~0xff)
{
- err = "8-bit displacement out of range";
+ err = _("8-bit displacement out of range");
break;
}
str = new;
str = parse_separator (str, &error);
if (error)
{
- op2.error = "Missing ','";
+ op2.error = _("Missing ','");
break;
}
str = parse_op (str, &op1);
str = parse_separator (str, &error);
if (error)
{
- op2.error = "Missing ','";
+ op2.error = _("Missing ','");
break;
}
str = parse_reg (str, &op2);
str = parse_separator (str, &error);
if (error)
{
- op1.error = "Missing ','";
+ op1.error = _("Missing ','");
break;
}
str = parse_fop (str, &op1);
str = parse_separator (str, &error);
if (error)
{
- op1.error = "Missing ','";
+ op1.error = _("Missing ','");
break;
}
str = parse_ac (str, &op2);
str = parse_separator (str, &error);
if (error)
{
- op1.error = "Missing ','";
+ op1.error = _("Missing ','");
break;
}
str = parse_op (str, &op1);
str = parse_separator (str, &error);
if (error)
{
- op1.error = "Missing ','";
+ op1.error = _("Missing ','");
break;
}
str = parse_ac (str, &op2);
str = parse_separator (str, &error);
if (error)
{
- op2.error = "Missing ','";
+ op2.error = _("Missing ','");
break;
}
str = parse_op (str, &op2);
str = parse_separator (str, &error);
if (error)
{
- op1.error = "Missing ','";
+ op1.error = _("Missing ','");
break;
}
new = parse_expression (str, &op1);
op1.reloc.type = BFD_RELOC_PDP11_DISP_6_PCREL;
if (op1.reloc.exp.X_op != O_symbol)
{
- op1.error = "Symbol expected";
+ op1.error = _("Symbol expected");
break;
}
if (op1.code & ~0x3f)
{
- err = "6-bit displacement out of range";
+ err = _("6-bit displacement out of range");
break;
}
str = new;
{
str = skip_whitespace (str);
if (*str)
- err = "Too many operands";
+ err = _("Too many operands");
}
{
if (err)
{
- as_bad (err);
+ as_bad ("%s", err);
return;
}
if (reloc->howto == NULL)
{
as_bad_where (fixp->fx_file, fixp->fx_line,
- "Can not represent %s relocation in this object file format",
+ _("Can not represent %s relocation in this object file format"),
bfd_get_reloc_code_name (code));
return NULL;
}
op_end++;
if (*op_end == 0)
- as_bad ("expected expresssion");
+ as_bad (_("expected expresssion"));
op_end = parse_exp_save_ilp (op_end, &arg);
op_end++;
if (*op_end != 0)
- as_warn ("extra stuff on line ignored");
+ as_warn (_("extra stuff on line ignored"));
}
if (pending_reloc)
- as_bad ("Something forgot to clean up\n");
-
+ as_bad (_("Something forgot to clean up\n"));
}
char *
/* tc-s390.c -- Assemble for the S390
- Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
- Free Software Foundation, Inc.
+ Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
+ 2009 Free Software Foundation, Inc.
Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
This file is part of GAS, the GNU Assembler.
s390_arch_size = 64;
}
else
- as_fatal ("Invalid default architecture, broken assembler.");
+ as_fatal (_("Invalid default architecture, broken assembler."));
if (current_mode_mask == 0)
{
else if (arg != NULL && strcmp (arg, "esame") == 0)
current_cpu = S390_OPCODE_Z900;
else
- as_bad ("invalid architecture -A%s", arg);
+ as_bad (_("invalid architecture -A%s"), arg);
break;
/* -V: SVR4 argument to print version ID. */
/* Give a warning if the combination -m64-bit and -Aesa is used. */
if (s390_arch_size == 64 && current_cpu < S390_OPCODE_Z900)
- as_warn ("The 64 bit file format is used without esame instructions.");
+ as_warn (_("The 64 bit file format is used without esame instructions."));
s390_cie_data_alignment = -s390_arch_size / 8;
if (val < min || val > max)
{
const char *err =
- "operand out of range (%s not between %ld and %ld)";
+ _("operand out of range (%s not between %ld and %ld)");
char buf[100];
if (operand->flags & S390_OPERAND_PCREL)
if ((operand->flags & S390_OPERAND_INDEX)
&& ex.X_add_number == 0
&& warn_areg_zero)
- as_warn ("index register specified but zero");
+ as_warn (_("index register specified but zero"));
if ((operand->flags & S390_OPERAND_BASE)
&& ex.X_add_number == 0
&& warn_areg_zero)
- as_warn ("base register specified but zero");
+ as_warn (_("base register specified but zero"));
s390_insert_operand (insn, operand, ex.X_add_number, NULL, 0);
}
}
}
else if (!(opcode->modes & current_mode_mask))
{
- as_bad ("Opcode %s not available in this mode", str);
+ as_bad (_("Opcode %s not available in this mode"), str);
return;
}
memcpy (insn, opcode->opcode, sizeof (insn));
if (fixP->fx_subsy != NULL)
as_bad_where (fixP->fx_file, fixP->fx_line,
- "cannot emit relocation %s against subsy symbol %s",
+ _("cannot emit relocation %s against subsy symbol %s"),
bfd_get_reloc_code_name (fixP->fx_r_type),
S_GET_NAME (fixP->fx_subsy));
case BFD_RELOC_16_GOTOFF:
if (fixP->fx_pcrel)
as_bad_where (fixP->fx_file, fixP->fx_line,
- "cannot emit PC relative %s relocation%s%s",
+ _("cannot emit PC relative %s relocation%s%s"),
bfd_get_reloc_code_name (fixP->fx_r_type),
fixP->fx_addsy != NULL ? " against " : "",
(fixP->fx_addsy != NULL
const char *reloc_name = bfd_get_reloc_code_name (fixP->fx_r_type);
if (reloc_name != NULL)
- fprintf (stderr, "Gas failure, reloc type %s\n", reloc_name);
+ as_fatal (_("Gas failure, reloc type %s\n"), reloc_name);
else
- fprintf (stderr, "Gas failure, reloc type #%i\n", fixP->fx_r_type);
- fflush (stderr);
- abort ();
+ as_fatal (_("Gas failure, reloc type #%i\n"), fixP->fx_r_type);
}
}
}
if (!preset_target_arch)
- as_bad ("Invalid argument to --isa option: %s", arg);
+ as_bad (_("Invalid argument to --isa option: %s"), arg);
}
break;
sh64_abi = sh64_abi_64;
}
else
- as_bad ("Invalid argument to --abi option: %s", arg);
+ as_bad (_("Invalid argument to --abi option: %s"), arg);
break;
case OPTION_NO_MIX:
/* Don't allow complex expressions here. */
if (opjp->immediate.X_op_symbol != NULL)
{
- as_bad(_("invalid operand: expression in PT target"));
+ as_bad (_("invalid operand: expression in PT target"));
return 0;
}
/* Don't allow complex expressions here. */
if (opjp->immediate.X_op_symbol != NULL)
{
- as_bad(_("invalid operand: expression in PT target"));
+ as_bad (_("invalid operand: expression in PT target"));
return 0;
}
}
else
{
- as_warn ("Ignoring attempt to re-define symbol %s",
+ as_warn (_("Ignoring attempt to re-define symbol %s"),
S_GET_NAME (symbolP));
- } /* if not redefining. */
+ }
demand_empty_rest_of_line ();
}
int lo = arg_encode[fixP->tc_fix_data.arg_format].lo;
if (hi > lo && ((offsetT) val < lo || (offsetT) val > hi))
as_bad_where (fixP->fx_file, fixP->fx_line,
- "Relocation doesn't fit. (relocation value = 0x%lx)",
+ _("Relocation doesn't fit. (relocation value = 0x%lx)"),
(long) val);
}
it from the buffer so it can pass through hash_find(). */
if (found_ar)
{
- as_bad ("More than one AR register found in indirect reference");
+ as_bad (_("More than one AR register found in indirect reference"));
return NULL;
}
if (*(token + count + 1) < '0' || *(token + count + 1) > '7')
{
- as_bad ("Illegal AR register in indirect reference");
+ as_bad (_("Illegal AR register in indirect reference"));
return NULL;
}
ar_number = *(token + count + 1) - '0';
if (found_disp)
{
- as_bad ("More than one displacement found in indirect reference");
+ as_bad (_("More than one displacement found in indirect reference"));
return NULL;
}
count++;
{
if (!is_digit_char (*(token + count)))
{
- as_bad ("Invalid displacement in indirect reference");
+ as_bad (_("Invalid displacement in indirect reference"));
return NULL;
}
disp[disp_posn++] = *(token + (count++));
ind_buffer[buffer_posn] = '\0';
if (!found_ar)
{
- as_bad ("AR register not found in indirect reference");
+ as_bad (_("AR register not found in indirect reference"));
return NULL;
}
else if ((ind_addr_op->displacement == DISP_REQUIRED) && !found_disp)
{
/* Maybe an implied displacement of 1 again. */
- as_bad ("required displacement wasn't given in indirect reference");
+ as_bad (_("required displacement wasn't given in indirect reference"));
return 0;
}
}
else
{
- as_bad ("illegal indirect reference");
+ as_bad (_("illegal indirect reference"));
return NULL;
}
if (found_disp && (disp_number < 0 || disp_number > 255))
{
- as_bad ("displacement must be an unsigned 8-bit number");
+ as_bad (_("displacement must be an unsigned 8-bit number"));
return NULL;
}
if (!is_space_char (*current_posn)
&& *current_posn != PARALLEL_SEPARATOR)
{
- as_bad ("Invalid character %s before %s operand",
+ as_bad (_("Invalid character %s before %s operand"),
output_invalid (*current_posn),
ordinal_names[insn.operands]);
return 1;
{
if (paren_not_balanced)
{
- as_bad ("Unbalanced parenthesis in %s operand.",
+ as_bad (_("Unbalanced parenthesis in %s operand."),
ordinal_names[insn.operands]);
return 1;
}
else if (!is_operand_char (*current_posn)
&& !is_space_char (*current_posn))
{
- as_bad ("Invalid character %s in %s operand",
+ as_bad (_("Invalid character %s in %s operand"),
output_invalid (*current_posn),
ordinal_names[insn.operands]);
return 1;
p_insn.operands[found_separator]++;
if (p_insn.operands[found_separator] > MAX_OPERANDS)
{
- as_bad ("Spurious operands; (%d operands/instruction max)",
+ as_bad (_("Spurious operands; (%d operands/instruction max)"),
MAX_OPERANDS);
return 1;
}
{
if (expecting_operand)
{
- as_bad ("Expecting operand after ','; got nothing");
+ as_bad (_("Expecting operand after ','; got nothing"));
return 1;
}
if (*current_posn == ',')
{
- as_bad ("Expecting operand before ','; got nothing");
+ as_bad (_("Expecting operand before ','; got nothing"));
return 1;
}
}
if (*++current_posn == END_OF_INSN)
{
/* Just skip it, if it's \n complain. */
- as_bad ("Expecting operand after ','; got nothing");
+ as_bad (_("Expecting operand after ','; got nothing"));
return 1;
}
expecting_operand = 1;
if (p_insn.operands[0] != p_insn.tm->operands_1)
{
- as_bad ("incorrect number of operands given in the first instruction");
+ as_bad (_("incorrect number of operands given in the first instruction"));
return 1;
}
if (p_insn.operands[1] != p_insn.tm->operands_2)
{
- as_bad ("incorrect number of operands given in the second instruction");
+ as_bad (_("incorrect number of operands given in the second instruction"));
return 1;
}
if ((p_insn.operand_type[count][i]->op_type &
p_insn.tm->operand_types[count][i]) == 0)
{
- as_bad ("%s instruction, operand %d doesn't match",
+ as_bad (_("%s instruction, operand %d doesn't match"),
ordinal_names[count], i + 1);
return 1;
}
/* Check for the multiply instructions. */
if (num_rn != 2)
{
- as_bad ("incorrect format for multiply parallel instruction");
+ as_bad (_("incorrect format for multiply parallel instruction"));
return 1;
}
if (num_ind != 2)
{
/* Shouldn't get here. */
- as_bad ("incorrect format for multiply parallel instruction");
+ as_bad (_("incorrect format for multiply parallel instruction"));
return 1;
}
if ((p_insn.operand_type[0][2]->reg.opcode != 0x00)
&& (p_insn.operand_type[0][2]->reg.opcode != 0x01))
{
- as_bad ("destination for multiply can only be R0 or R1");
+ as_bad (_("destination for multiply can only be R0 or R1"));
return 1;
}
if ((p_insn.operand_type[1][2]->reg.opcode != 0x02)
&& (p_insn.operand_type[1][2]->reg.opcode != 0x03))
{
- as_bad ("destination for add/subtract can only be R2 or R3");
+ as_bad (_("destination for add/subtract can only be R2 or R3"));
return 1;
}
p_insn.opcode |= (p_insn.operand_type[1][1]->reg.opcode << 19);
p_insn.opcode |= (p_insn.operand_type[0][1]->reg.opcode << 22);
if (p_insn.operand_type[1][1]->reg.opcode == p_insn.operand_type[0][1]->reg.opcode)
- as_warn ("loading the same register in parallel operation");
+ as_warn (_("loading the same register in parallel operation"));
break;
case OO_4op3:
MAP (2, 1, BFD_RELOC_16_PCREL);
MAP (4, 0, BFD_RELOC_32);
default:
- as_bad ("Can not do %d byte %srelocation", fixP->fx_size,
- fixP->fx_pcrel ? "pc-relative " : "");
+ as_bad (_("Can not do %d byte %srelocation"), fixP->fx_size,
+ fixP->fx_pcrel ? _("pc-relative ") : "");
}
#undef MAP
#undef F
if (!is_opcode_char (*current_posn))
{
- as_bad ("Invalid character %s in opcode",
+ as_bad (_("Invalid character %s in opcode"),
output_invalid (*current_posn));
return;
}
else
{
debug ("Didn't find insn\n");
- as_bad ("Unknown TMS320C30 instruction: %s", token_start);
+ as_bad (_("Unknown TMS320C30 instruction: %s"), token_start);
return;
}
*current_posn = save_char;
{
if (!is_space_char (*current_posn))
{
- as_bad ("Invalid character %s before %s operand",
+ as_bad (_("Invalid character %s before %s operand"),
output_invalid (*current_posn),
ordinal_names[insn.operands]);
return;
{
if (paren_not_balanced)
{
- as_bad ("Unbalanced parenthesis in %s operand.",
+ as_bad (_("Unbalanced parenthesis in %s operand."),
ordinal_names[insn.operands]);
return;
}
else if (!is_operand_char (*current_posn)
&& !is_space_char (*current_posn))
{
- as_bad ("Invalid character %s in %s operand",
+ as_bad (_("Invalid character %s in %s operand"),
output_invalid (*current_posn),
ordinal_names[insn.operands]);
return;
this_operand = insn.operands++;
if (insn.operands > MAX_OPERANDS)
{
- as_bad ("Spurious operands; (%d operands/instruction max)",
+ as_bad (_("Spurious operands; (%d operands/instruction max)"),
MAX_OPERANDS);
return;
}
{
if (expecting_operand)
{
- as_bad ("Expecting operand after ','; got nothing");
+ as_bad (_("Expecting operand after ','; got nothing"));
return;
}
if (*current_posn == ',')
{
- as_bad ("Expecting operand before ','; got nothing");
+ as_bad (_("Expecting operand before ','; got nothing"));
return;
}
}
if (*++current_posn == END_OF_INSN)
{
/* Just skip it, if it's \n complain. */
- as_bad ("Expecting operand after ','; got nothing");
+ as_bad (_("Expecting operand after ','; got nothing"));
return;
}
expecting_operand = 1;
numops--;
if (insn.operands != numops)
{
- as_bad ("Incorrect number of operands given");
+ as_bad (_("Incorrect number of operands given"));
return;
}
}
}
else
{
- as_bad ("The %s operand doesn't match", ordinal_names[count]);
+ as_bad (_("The %s operand doesn't match"), ordinal_names[count]);
return;
}
}
else
{
/* Shouldn't make it to this stage. */
- as_bad ("Incompatible first and second operands in instruction");
+ as_bad (_("Incompatible first and second operands in instruction"));
return;
}
break;
else
{
/* Shouldn't make it to this stage. */
- as_bad ("Incompatible first and second operands in instruction");
+ as_bad (_("Incompatible first and second operands in instruction"));
return;
}
break;
if (md_atof ('f', p + 2, & size) != 0)
{
- as_bad ("invalid short form floating point immediate operand");
+ as_bad (_("invalid short form floating point immediate operand"));
return;
}
case Imm_UInt:
debug ("Unsigned int first operand\n");
if (insn.operand_type[0]->immediate.decimal_found)
- as_warn ("rounding down first operand float to unsigned int");
+ as_warn (_("rounding down first operand float to unsigned int"));
if (insn.operand_type[0]->immediate.u_number > 0xFFFF)
- as_warn ("only lower 16-bits of first operand are used");
+ as_warn (_("only lower 16-bits of first operand are used"));
insn.opcode |=
(insn.operand_type[0]->immediate.u_number & 0x0000FFFFL);
md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
debug ("Int first operand\n");
if (insn.operand_type[0]->immediate.decimal_found)
- as_warn ("rounding down first operand float to signed int");
+ as_warn (_("rounding down first operand float to signed int"));
if (insn.operand_type[0]->immediate.s_number < -32768 ||
insn.operand_type[0]->immediate.s_number > 32767)
{
- as_bad ("first operand is too large for 16-bit signed int");
+ as_bad (_("first operand is too large for 16-bit signed int"));
return;
}
insn.opcode |=
{
if (insn.operand_type[0]->immediate.decimal_found)
{
- as_bad ("first operand is floating point");
+ as_bad (_("first operand is floating point"));
return;
}
if (insn.operand_type[0]->immediate.s_number < -32768 ||
insn.operand_type[0]->immediate.s_number > 32767)
{
- as_bad ("first operand is too large for 16-bit signed int");
+ as_bad (_("first operand is too large for 16-bit signed int"));
return;
}
insn.opcode |= (insn.operand_type[1]->immediate.s_number);
else
{
/* Shouldn't get here. */
- as_bad ("interrupt vector for trap instruction out of range");
+ as_bad (_("interrupt vector for trap instruction out of range"));
return;
}
md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
/* Immediate addressing uses upper 8 bits of address. */
if (insn.operand_type[0]->immediate.u_number > 0x00FFFFFF)
{
- as_bad ("LDP instruction needs a 24-bit operand");
+ as_bad (_("LDP instruction needs a 24-bit operand"));
return;
}
insn.opcode |=
if (insn.operand_type[0]->immediate.resolved == 1)
{
if (insn.operand_type[0]->immediate.u_number > 0x00FFFFFF)
- as_warn ("first operand is too large for a 24-bit displacement");
+ as_warn (_("first operand is too large for a 24-bit displacement"));
insn.opcode |=
(insn.operand_type[0]->immediate.u_number & 0x00FFFFFF);
md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
/* tc-tic4x.c -- Assemble for the Texas Instruments TMS320C[34]x.
- Copyright (C) 1997,1998, 2002, 2003, 2005, 2006, 2007, 2008
+ Copyright (C) 1997,1998, 2002, 2003, 2005, 2006, 2007, 2008, 2009
Free Software Foundation. Inc.
Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz)
|| flonum.sign == 0) /* = NaN */
{
if(flonum.sign == 0)
- as_bad ("Nan, using zero.");
+ as_bad (_("Nan, using zero."));
words[0] = 0x8000;
return return_value;
}
}
if (abs (exponent) >= (1 << (exponent_bits - 1)))
- as_bad ("Cannot represent exponent in %d bits", exponent_bits);
+ as_bad (_("Cannot represent exponent in %d bits"), exponent_bits);
/* Force exponent to fit in desired field width. */
exponent &= (1 << (exponent_bits)) - 1;
break;
default:
- as_bad ("Invalid floating point number");
+ as_bad (_("Invalid floating point number"));
return (NULL);
}
if (atof_generic (&return_value, ".", EXP_CHARS,
&generic_floating_point_number))
{
- as_bad ("Invalid floating point number");
+ as_bad (_("Invalid floating point number"));
return (NULL);
}
input_line_pointer++;
if (*input_line_pointer != ',')
{
- as_bad ("Comma expected\n");
+ as_bad (_("Comma expected\n"));
return;
}
*input_line_pointer++ = '\0';
c = get_symbol_end (); /* Get terminator. */
if (c != ',')
{
- as_bad (".bss size argument missing\n");
+ as_bad (_(".bss size argument missing\n"));
return;
}
tic4x_expression_abs (++input_line_pointer, &size);
if (size < 0)
{
- as_bad (".bss size %ld < 0!", (long) size);
+ as_bad (_(".bss size %ld < 0!"), (long) size);
return;
}
subseg_set (bss_section, 0);
input_line_pointer = tic4x_expression (input_line_pointer, &exp);
if (exp.X_op != O_constant)
{
- as_bad("Non-constant symbols not allowed\n");
+ as_bad (_("Non-constant symbols not allowed\n"));
return;
}
exp.X_add_number &= 255; /* Limit numeber to 8-bit */
tic4x_expression_abs (input_line_pointer, &value);
if (*input_line_pointer++ != ',')
{
- as_bad ("Symbol missing\n");
+ as_bad (_("Symbol missing\n"));
return;
}
name = input_line_pointer;
subsection_name = input_line_pointer;
c = get_symbol_end (); /* Get terminator. */
input_line_pointer++; /* Skip null symbol terminator. */
- as_warn (".sect: subsection name ignored");
+ as_warn (_(".sect: subsection name ignored"));
}
/* We might still have a '"' to discard, but the character after a
if (bfd_get_section_flags (stdoutput, seg) == SEC_NO_FLAGS)
{
if (!bfd_set_section_flags (stdoutput, seg, SEC_DATA))
- as_warn ("Error setting flags for \"%s\": %s", name,
+ as_warn (_("Error setting flags for \"%s\": %s"), name,
bfd_errmsg (bfd_get_error ()));
}
c = get_symbol_end (); /* Get terminator. */
if (c != ',')
{
- as_bad (".set syntax invalid\n");
+ as_bad (_(".set syntax invalid\n"));
ignore_rest_of_line ();
return;
}
else
alignment_flag = 0;
if (alignment_flag)
- as_warn (".usect: non-zero alignment flag ignored");
+ as_warn (_(".usect: non-zero alignment flag ignored"));
seg = subseg_new (name, 0);
if (line_label != NULL)
}
seg_info (seg)->bss = 1; /* Uninitialised data. */
if (!bfd_set_section_flags (stdoutput, seg, SEC_ALLOC))
- as_warn ("Error setting flags for \"%s\": %s", name,
+ as_warn (_("Error setting flags for \"%s\": %s"), name,
bfd_errmsg (bfd_get_error ()));
tic4x_seg_alloc (name, seg, size, line_label);
input_line_pointer =
tic4x_expression_abs (input_line_pointer, &temp);
if (!IS_CPU_TIC3X (temp) && !IS_CPU_TIC4X (temp))
- as_bad ("This assembler does not support processor generation %ld",
+ as_bad (_("This assembler does not support processor generation %ld"),
(long) temp);
if (tic4x_cpu && temp != (offsetT) tic4x_cpu)
- as_warn ("Changing processor generation on fly not supported...");
+ as_warn (_("Changing processor generation on fly not supported..."));
tic4x_cpu = temp;
demand_empty_rest_of_line ();
}
if (operand->aregno >= REG_AR0 && operand->aregno <= REG_AR7)
break;
- as_bad ("Auxiliary register AR0--AR7 required for indirect");
+ as_bad (_("Auxiliary register AR0--AR7 required for indirect"));
return -1;
case 'd': /* Need to match constant for disp. */
operand->disp = operand->expr.X_add_number;
if (operand->disp < 0 || operand->disp > 255)
{
- as_bad ("Bad displacement %d (require 0--255)\n",
+ as_bad (_("Bad displacement %d (require 0--255)\n"),
operand->disp);
return -1;
}
if (operand->expr.X_add_number != REG_IR0
&& operand->expr.X_add_number != REG_IR1)
{
- as_bad ("Index register IR0,IR1 required for displacement");
+ as_bad (_("Index register IR0,IR1 required for displacement"));
return -1;
}
case '%':
input_line_pointer = tic4x_expression (++input_line_pointer, exp);
if (exp->X_op != O_register)
- as_bad ("Expecting a register name");
+ as_bad (_("Expecting a register name"));
operand->mode = M_REGISTER;
break;
else if (exp->X_op == O_big)
{
if (exp->X_add_number)
- as_bad ("Number too large"); /* bignum required */
+ as_bad (_("Number too large")); /* bignum required */
else
{
tic4x_gen_to_words (generic_floating_point_number,
else if (exp->X_op == O_big)
{
if (exp->X_add_number > 0)
- as_bad ("Number too large"); /* bignum required. */
+ as_bad (_("Number too large")); /* bignum required. */
else
{
tic4x_gen_to_words (generic_floating_point_number,
}
else
- as_bad ("Expecting a constant value");
+ as_bad (_("Expecting a constant value"));
break;
case '\\':
#endif
case '@':
input_line_pointer = tic4x_expression (++input_line_pointer, exp);
if (exp->X_op != O_constant && exp->X_op != O_symbol)
- as_bad ("Bad direct addressing construct %s", s);
+ as_bad (_("Bad direct addressing construct %s"), s);
if (exp->X_op == O_constant)
{
if (exp->X_add_number < 0)
- as_bad ("Direct value of %ld is not suitable",
+ as_bad (_("Direct value of %ld is not suitable"),
(long) exp->X_add_number);
}
operand->mode = M_DIRECT;
operand->expr.X_add_number = 0x18;
}
else
- as_bad ("Unknown indirect addressing mode");
+ as_bad (_("Unknown indirect addressing mode"));
break;
default:
else if (exp->X_op == O_big)
{
if (exp->X_add_number > 0)
- as_bad ("Number too large"); /* bignum required. */
+ as_bad (_("Number too large")); /* bignum required. */
else
{
tic4x_gen_to_words (generic_floating_point_number,
else
{
if (!check)
- as_bad ("Immediate value of %ld is too large for ldf",
+ as_bad (_("Immediate value of %ld is too large for ldf"),
(long) exp->X_add_number);
ret = -1;
continue;
else
{
if (!check)
- as_bad ("Destination register must be ARn");
+ as_bad (_("Destination register must be ARn"));
ret = -1;
}
continue;
else
{
if (!check)
- as_bad ("Immediate value of %ld is too large",
+ as_bad (_("Immediate value of %ld is too large"),
(long) exp->X_add_number);
ret = -1;
continue;
&& operand->expr.X_add_number != 0x18)
{
if (!check)
- as_bad ("Invalid indirect addressing mode");
+ as_bad (_("Invalid indirect addressing mode"));
ret = -1;
continue;
}
else
{
if (!check)
- as_bad ("Register must be Rn");
+ as_bad (_("Register must be Rn"));
ret = -1;
}
continue;
else
{
if (!check)
- as_bad ("Register must be Rn");
+ as_bad (_("Register must be Rn"));
ret = -1;
}
continue;
else
{
if (!check)
- as_bad ("Register must be R0--R7");
+ as_bad (_("Register must be R0--R7"));
ret = -1;
}
continue;
if (IS_CPU_TIC4X (tic4x_cpu))
break;
if (!check)
- as_bad ("Invalid indirect addressing mode displacement %d",
+ as_bad (_("Invalid indirect addressing mode displacement %d"),
operand->disp);
ret = -1;
continue;
if (IS_CPU_TIC4X (tic4x_cpu))
break;
if (!check)
- as_bad ("Invalid indirect addressing mode displacement %d",
+ as_bad (_("Invalid indirect addressing mode displacement %d"),
operand->disp);
ret = -1;
continue;
else
{
if (!check)
- as_bad ("Register must be R0--R7");
+ as_bad (_("Register must be R0--R7"));
ret = -1;
}
continue;
else
{
if (!check)
- as_bad ("Register must be R0--R7");
+ as_bad (_("Register must be R0--R7"));
ret = -1;
}
continue;
else
{
if (!check)
- as_bad ("Destination register must be R2 or R3");
+ as_bad (_("Destination register must be R2 or R3"));
ret = -1;
}
continue;
else
{
if (!check)
- as_bad ("Destination register must be R0 or R1");
+ as_bad (_("Destination register must be R0 or R1"));
ret = -1;
}
continue;
&& operand->expr.X_add_number != 0x18)
{
if (!check)
- as_bad ("Invalid indirect addressing mode");
+ as_bad (_("Invalid indirect addressing mode"));
ret = -1;
continue;
}
else
{
if (!check)
- as_bad ("Displacement value of %ld is too large",
+ as_bad (_("Displacement value of %ld is too large"),
(long) exp->X_add_number);
ret = -1;
continue;
else
{
if (!check)
- as_bad ("Register must be Rn");
+ as_bad (_("Register must be Rn"));
ret = -1;
}
continue;
else
{
if (!check)
- as_bad ("Register must be Rn");
+ as_bad (_("Register must be Rn"));
ret = -1;
}
continue;
if (exp->X_op == O_big)
{
if (!check)
- as_bad ("Floating point number not valid in expression");
+ as_bad (_("Floating point number not valid in expression"));
ret = -1;
continue;
}
else
{
if (!check)
- as_bad ("Signed immediate value %ld too large",
+ as_bad (_("Signed immediate value %ld too large"),
(long) exp->X_add_number);
ret = -1;
continue;
else
{
if (!check)
- as_bad ("Immediate value of %ld is too large",
+ as_bad (_("Immediate value of %ld is too large"),
(long) exp->X_add_number);
ret = -1;
continue;
else
{
if (!check)
- as_bad ("Unsigned immediate value %ld too large",
+ as_bad (_("Unsigned immediate value %ld too large"),
(long) exp->X_add_number);
ret = -1;
continue;
else
{
if (!check)
- as_bad ("Immediate value of %ld is too large",
+ as_bad (_("Immediate value of %ld is too large"),
(long) exp->X_add_number);
ret = -1;
continue;
if (exp->X_op == O_big)
{
if (!check)
- as_bad ("Floating point number not valid in expression");
+ as_bad (_("Floating point number not valid in expression"));
ret = -1;
continue;
}
else
{
if (!check)
- as_bad ("Immediate value %ld too large",
+ as_bad (_("Immediate value %ld too large"),
(long) exp->X_add_number);
ret = -1;
continue;
else
{
if (!check)
- as_bad ("Register must be ivtp or tvtp");
+ as_bad (_("Register must be ivtp or tvtp"));
ret = -1;
}
continue;
else
{
if (!check)
- as_bad ("Register must be address register");
+ as_bad (_("Register must be address register"));
ret = -1;
}
continue;
else
{
if (!check)
- as_bad ("Register must be ivtp or tvtp");
+ as_bad (_("Register must be ivtp or tvtp"));
ret = -1;
}
continue;
if ( insn->operands[0].mode == M_REGISTER
&& insn->operands[1].mode == M_REGISTER
&& insn->operands[0].expr.X_add_number == insn->operands[1].expr.X_add_number )
- as_bad ("Source and destination register should not be equal");
+ as_bad (_("Source and destination register should not be equal"));
}
else if( !strcmp(insn->name, "ldi_ldi")
|| !strcmp(insn->name, "ldi1_ldi2")
if ( insn->operands[1].mode == M_REGISTER
&& insn->operands[insn->num_operands-1].mode == M_REGISTER
&& insn->operands[1].expr.X_add_number == insn->operands[insn->num_operands-1].expr.X_add_number )
- as_warn ("Equal parallell destination registers, one result will be discarded");
+ as_warn (_("Equal parallell destination registers, one result will be discarded"));
}
}
if (num_operands > TIC4X_OPERANDS_MAX)
{
- as_bad ("Too many operands scanned");
+ as_bad (_("Too many operands scanned"));
return -1;
}
return num_operands;
{
if(insn->parallel)
{
- as_bad ("Parallel opcode cannot contain more than two instructions");
+ as_bad (_("Parallel opcode cannot contain more than two instructions"));
insn->parallel = 0;
insn->in_use = 0;
return;
if ((insn->inst = (struct tic4x_inst *)
hash_find (tic4x_op_hash, insn->name)) == NULL)
{
- as_bad ("Unknown opcode `%s'.", insn->name);
+ as_bad (_("Unknown opcode `%s'."), insn->name);
insn->parallel = 0;
insn->in_use = 0;
return;
{
if (first_inst)
tic4x_operands_match (first_inst, insn, 0);
- as_bad ("Invalid operands for %s", insn->name);
+ as_bad (_("Invalid operands for %s"), insn->name);
}
else
- as_bad ("Invalid instruction %s", insn->name);
+ as_bad (_("Invalid instruction %s"), insn->name);
}
if (str && !parsed)
case NO_RELOC:
default:
- as_bad ("Bad relocation type: 0x%02x", fixP->fx_r_type);
+ as_bad (_("Bad relocation type: 0x%02x"), fixP->fx_r_type);
break;
}
arg++;
tic4x_cpu = atoi (arg);
if (!IS_CPU_TIC3X (tic4x_cpu) && !IS_CPU_TIC4X (tic4x_cpu))
- as_warn ("Unsupported processor generation %d", tic4x_cpu);
+ as_warn (_("Unsupported processor generation %d"), tic4x_cpu);
break;
case OPTION_REV: /* cpu revision */
break;
case 'b':
- as_warn ("Option -b is depreciated, please use -mbig");
+ as_warn (_("Option -b is depreciated, please use -mbig"));
case OPTION_BIG: /* big model */
tic4x_big_model = 1;
break;
case 'p':
- as_warn ("Option -p is depreciated, please use -mmemparm");
+ as_warn (_("Option -p is depreciated, please use -mmemparm"));
case OPTION_MEMPARM: /* push args */
tic4x_reg_args = 0;
break;
case 'r':
- as_warn ("Option -r is depreciated, please use -mregparm");
+ as_warn (_("Option -r is depreciated, please use -mregparm"));
case OPTION_REGPARM: /* register args */
tic4x_reg_args = 1;
break;
case 's':
- as_warn ("Option -s is depreciated, please use -msmall");
+ as_warn (_("Option -s is depreciated, please use -msmall"));
case OPTION_SMALL: /* small model */
tic4x_big_model = 0;
break;
if (dollar_label_defined (lab))
{
- as_bad ("Label \"$%d\" redefined", lab);
+ as_bad (_("Label \"$%d\" redefined"), lab);
return 0;
}
if (reloc->howto == (reloc_howto_type *) NULL)
{
as_bad_where (fixP->fx_file, fixP->fx_line,
- "Reloc %d not supported by object file format",
+ _("Reloc %d not supported by object file format"),
(int) fixP->fx_r_type);
return NULL;
}
/* tc-tic54x.c -- Assembly code for the Texas Instruments TMS320C54X
- Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
- Free Software Foundation, Inc.
+ Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
+ 2009 Free Software Foundation, Inc.
Contributed by Timothy Wall (twall@cygnus.com)
This file is part of GAS, the GNU Assembler.
c = get_symbol_end (); /* Get terminator. */
if (!ISALPHA (*name))
{
- as_bad ("symbols assigned with .asg must begin with a letter");
+ as_bad (_("symbols assigned with .asg must begin with a letter"));
ignore_rest_of_line ();
return;
}
c = get_symbol_end (); /* Get terminator. */
if (c != ',')
{
- as_bad (".bss size argument missing\n");
+ as_bad (_(".bss size argument missing\n"));
ignore_rest_of_line ();
return;
}
words = get_absolute_expression ();
if (words < 0)
{
- as_bad (".bss size %d < 0!", words);
+ as_bad (_(".bss size %d < 0!"), words);
ignore_rest_of_line ();
return;
}
case 1:
if ((value > 0 && value > 0xFF)
|| (value < 0 && value < - 0x100))
- as_warn ("Overflow in expression, truncated to 8 bits");
+ as_warn (_("Overflow in expression, truncated to 8 bits"));
break;
case 2:
if ((value > 0 && value > 0xFFFF)
|| (value < 0 && value < - 0x10000))
- as_warn ("Overflow in expression, truncated to 16 bits");
+ as_warn (_("Overflow in expression, truncated to 16 bits"));
break;
}
}
flags |= SEC_TIC54X_BLOCK;
if (!bfd_set_section_flags (stdoutput, seg, flags))
- as_warn ("Error setting flags for \"%s\": %s", name,
+ as_warn (_("Error setting flags for \"%s\": %s"), name,
bfd_errmsg (bfd_get_error ()));
subseg_set (current_seg, current_subseg); /* Restore current seg. */
{
if (paren_not_balanced)
{
- as_bad ("Unbalanced parenthesis in operand %d", numexp);
+ as_bad (_("Unbalanced parenthesis in operand %d"), numexp);
return -1;
}
else
{
if (expecting_operand || *lptr == ',')
{
- as_bad ("Expecting operand after ','");
+ as_bad (_("Expecting operand after ','"));
return -1;
}
}
{
if (*++lptr == '\0')
{
- as_bad ("Expecting operand after ','");
+ as_bad (_("Expecting operand after ','"));
return -1;
}
expecting_operand = 1;
;
if (!is_end_of_line[(int) *lptr])
{
- as_bad ("Extra junk on line");
+ as_bad (_("Extra junk on line"));
return -1;
}
/* tc-v850.c -- Assembler code for the NEC V850
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
- 2006, 2007 Free Software Foundation, Inc.
+ 2006, 2007, 2009 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
if (! v850_relax)
{
if (type == 1)
- as_warn (".longcall pseudo-op seen when not relaxing");
+ as_warn (_(".longcall pseudo-op seen when not relaxing"));
else
- as_warn (".longjump pseudo-op seen when not relaxing");
+ as_warn (_(".longjump pseudo-op seen when not relaxing"));
}
expression (&ex);
if (ex.X_op != O_symbol || ex.X_add_number != 0)
{
- as_bad ("bad .longcall format");
+ as_bad (_("bad .longcall format"));
ignore_rest_of_line ();
return;
else
{
if (file == (char *) NULL)
- as_warn (message);
+ as_warn ("%s", message);
else
- as_warn_where (file, line, message);
+ as_warn_where (file, line, "%s", message);
}
}
}
/* tc-xc16x.c -- Assembler for the Infineon XC16X.
- Copyright 2006, 2007 Free Software Foundation, Inc.
+ Copyright 2006, 2007, 2009 Free Software Foundation, Inc.
Contributed by KPIT Cummins Infosystems
This file is part of GAS, the GNU Assembler.
if (!insn.insn)
{
- as_bad (errmsg);
+ as_bad ("%s", errmsg);
return;
}
/* tc-xstormy16.c -- Assembler for the Sanyo XSTORMY16.
- Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
+ Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009
Free Software Foundation.
This file is part of GAS, the GNU Assembler.
if (!insn.insn)
{
- as_bad (errmsg);
+ as_bad ("%s", errmsg);
return;
}
SKIP_WHITESPACE ();
if (*input_line_pointer != '(')
{
- as_bad ("Expected '('");
+ as_bad (_("Expected '('"));
goto err;
}
input_line_pointer++;
if (*input_line_pointer != ')')
{
- as_bad ("Missing ')'");
+ as_bad (_("Missing ')'"));
goto err;
}
input_line_pointer++;
SKIP_WHITESPACE ();
if (e->X_op != O_symbol)
- as_bad ("Not a symbolic expression");
+ as_bad (_("Not a symbolic expression"));
else if (* input_line_pointer == '-')
/* We are computing the difference of two function pointers
like this:
break;
default:
- as_bad ("unsupported fptr fixup size %d", nbytes);
+ as_bad (_("unsupported fptr fixup size %d"), nbytes);
return;
}
}
code = BFD_RELOC_32;
else
{
- as_bad ("unsupported fixup size %d", nbytes);
+ as_bad (_("unsupported fixup size %d"), nbytes);
return;
}
if (op == O_fptr_symbol)
{
if (operand->type != XSTORMY16_OPERAND_IMM16)
- as_bad ("unsupported fptr fixup");
+ as_bad (_("unsupported fptr fixup"));
else
{
fixP->fx_r_type = BFD_RELOC_XSTORMY16_FPTR16;
static void
error (const char * message)
{
- as_bad (message);
+ as_bad ("%s", message);
err_flag = 1;
}
*p = val->X_add_number;
if ((r_type == BFD_RELOC_8_PCREL) && (val->X_op == O_constant))
{
- as_bad(_("cannot make a relative jump to an absolute location"));
+ as_bad (_("cannot make a relative jump to an absolute location"));
}
else if (val->X_op == O_constant)
{
return reloc;
}
-
if (! reloc->howto)
{
as_bad_where (fixp->fx_file, fixp->fx_line,
- "Cannot represent %s relocation in object file",
+ _("Cannot represent %s relocation in object file"),
bfd_get_reloc_code_name (fixp->fx_r_type));
abort ();
}
projects / external / binutils.git / commitdiff