lcd: set default hw_filter_time config [1/1]
authorshaochan.liu <shaochan.liu@amlogic.com>
Fri, 26 Jul 2019 03:23:49 +0000 (11:23 +0800)
committerTao Zeng <tao.zeng@amlogic.com>
Mon, 5 Aug 2019 02:49:51 +0000 (19:49 -0700)
PD#SWPL-8848

Problem:
need set a better compatible filter config

Solution:
set a better compatible filter config

Verify:
t962x2_x301

Change-Id: I298d22dff1185653ceac7e05633de3704b2fdb2f
Signed-off-by: shaochan.liu <shaochan.liu@amlogic.com>
arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi
arch/arm/boot/dts/amlogic/mesontl1_t309-panel.dtsi
arch/arm/boot/dts/amlogic/mesontl1_x301-panel.dtsi
arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi
arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi
arch/arm64/boot/dts/amlogic/mesontl1_skt-panel.dtsi
arch/arm64/boot/dts/amlogic/mesontl1_t309-panel.dtsi
arch/arm64/boot/dts/amlogic/mesontl1_x301-panel.dtsi
arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi
arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi
drivers/amlogic/media/vout/lcd/lcd_tv/lcd_drv.c

index 99acef3..82d46b5 100644 (file)
                                1 /*vbyone_intr_enable */
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
index 04ac124..97aa1c3 100644 (file)
                                1 /*vbyone_intr_enable */
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <0 0 1 50 /*panel power on*/
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
index 00b4c73..9aed4b1 100644 (file)
                                1 /*vbyone_intr_enable */
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <0 0 1 50 /*panel power on*/
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
index 46c9426..94f59e9 100644 (file)
                                1 /*vbyone_intr_enable */
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <0 0 1 50 /*panel power on*/
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
index 5e89bb3..e6102d7 100644 (file)
                                1 /*vbyone_intr_enable */
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
index e30e2e0..70d44e0 100644 (file)
@@ -80,6 +80,7 @@
                                0  /*port_swap*/
                                0>; /*lane_reverse*/
                        phy_attr=<0xf 0>; /*vswing_level, preem_level*/
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1 /*vbyone_intr_enable */
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
index 906c6c5..f998af6 100644 (file)
                                1 /*vbyone_intr_enable */
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <0 0 1 50 /*panel power on*/
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
index c75c6c7..8f4c55d 100644 (file)
                                1 /*vbyone_intr_enable */
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <0 0 1 50 /*panel power on*/
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
index 41948f8..198d0a0 100644 (file)
                                1 /*vbyone_intr_enable */
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <0 0 1 50 /*panel power on*/
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
index 97f4f30..1795ab1 100644 (file)
                                1 /*vbyone_intr_enable */
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
                                1   /*vbyone_intr_enable*/
                                3>; /*vbyone_vsync_intr_enable*/
                        phy_attr=<0xf 1>; /* vswing_level, preem_level */
+                       hw_filter=<0 0>;  /* filter_time, filter_cnt*/
 
                        /* power step: type, index, value, delay(ms) */
                        power_on_step = <
index f3cd86c..facd9d8 100644 (file)
@@ -526,7 +526,7 @@ static void lcd_vbyone_hw_filter(int flag)
        struct vbyone_config_s *vx1_conf;
        unsigned int temp, period;
        unsigned int tick_period[] = {
-               0xfffff,
+               0xfff,
                0xff,    /* 1: 0.8us */
                0x1ff,   /* 2: 1.7us */
                0x3ff,   /* 3: 3.4us */