1 /*vbyone_intr_enable */
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable */
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <0 0 1 50 /*panel power on*/
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable */
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <0 0 1 50 /*panel power on*/
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable */
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <0 0 1 50 /*panel power on*/
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable */
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
0 /*port_swap*/
0>; /*lane_reverse*/
phy_attr=<0xf 0>; /*vswing_level, preem_level*/
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable */
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable */
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <0 0 1 50 /*panel power on*/
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable */
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <0 0 1 50 /*panel power on*/
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable */
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <0 0 1 50 /*panel power on*/
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable */
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
1 /*vbyone_intr_enable*/
3>; /*vbyone_vsync_intr_enable*/
phy_attr=<0xf 1>; /* vswing_level, preem_level */
+ hw_filter=<0 0>; /* filter_time, filter_cnt*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
struct vbyone_config_s *vx1_conf;
unsigned int temp, period;
unsigned int tick_period[] = {
- 0xfffff,
+ 0xfff,
0xff, /* 1: 0.8us */
0x1ff, /* 2: 1.7us */
0x3ff, /* 3: 3.4us */