bnx2: Dump some state during tx timeout.
authorMichael Chan <mchan@broadcom.com>
Thu, 3 Dec 2009 09:46:32 +0000 (09:46 +0000)
committerDavid S. Miller <davem@davemloft.net>
Thu, 3 Dec 2009 21:18:11 +0000 (13:18 -0800)
To help debug the problem.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/bnx2.c
drivers/net/bnx2.h

index 03eb51f..665253a 100644 (file)
@@ -6279,10 +6279,33 @@ bnx2_reset_task(struct work_struct *work)
 }
 
 static void
+bnx2_dump_state(struct bnx2 *bp)
+{
+       struct net_device *dev = bp->dev;
+
+       printk(KERN_ERR PFX "%s DEBUG: intr_sem[%x]\n", dev->name,
+               atomic_read(&bp->intr_sem));
+       printk(KERN_ERR PFX "%s DEBUG: EMAC_TX_STATUS[%08x] "
+                           "RPM_MGMT_PKT_CTRL[%08x]\n", dev->name,
+               REG_RD(bp, BNX2_EMAC_TX_STATUS),
+               REG_RD(bp, BNX2_RPM_MGMT_PKT_CTRL));
+       printk(KERN_ERR PFX "%s DEBUG: MCP_STATE_P0[%08x] MCP_STATE_P1[%08x]\n",
+               dev->name, bnx2_reg_rd_ind(bp, BNX2_MCP_STATE_P0),
+               bnx2_reg_rd_ind(bp, BNX2_MCP_STATE_P1));
+       printk(KERN_ERR PFX "%s DEBUG: HC_STATS_INTERRUPT_STATUS[%08x]\n",
+               dev->name, REG_RD(bp, BNX2_HC_STATS_INTERRUPT_STATUS));
+       if (bp->flags & BNX2_FLAG_USING_MSIX)
+               printk(KERN_ERR PFX "%s DEBUG: PBA[%08x]\n", dev->name,
+                       REG_RD(bp, BNX2_PCI_GRC_WINDOW3_BASE));
+}
+
+static void
 bnx2_tx_timeout(struct net_device *dev)
 {
        struct bnx2 *bp = netdev_priv(dev);
 
+       bnx2_dump_state(bp);
+
        /* This allows the netif to be shutdown gracefully before resetting */
        schedule_work(&bp->reset_task);
 }
index 4908b9f..939dc44 100644 (file)
@@ -6345,6 +6345,8 @@ struct l2_fhdr {
 
 #define BNX2_MCP_ROM                                   0x00150000
 #define BNX2_MCP_SCRATCH                               0x00160000
+#define BNX2_MCP_STATE_P1                               0x0016f9c8
+#define BNX2_MCP_STATE_P0                               0x0016fdc8
 
 #define BNX2_SHM_HDR_SIGNATURE                         BNX2_MCP_SCRATCH
 #define BNX2_SHM_HDR_SIGNATURE_SIG_MASK                         0xffff0000