arm64: tegra: Drop unused properties for Tegra194 PCIe
authorThierry Reding <treding@nvidia.com>
Tue, 7 Dec 2021 13:47:47 +0000 (14:47 +0100)
committerThierry Reding <treding@nvidia.com>
Thu, 16 Dec 2021 15:51:02 +0000 (16:51 +0100)
The num-viewport property is never used and can be dropped, whereas the
"iommus" property is not needed since we use "iommu-map-mask" and
"iommu-map" already.

Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra194.dtsi

index d7fd6bd..bb51ccd 100644 (file)
                #size-cells = <2>;
                device_type = "pci";
                num-lanes = <1>;
-               num-viewport = <8>;
                linux,pci-domain = <1>;
 
                clocks = <&bpmp TEGRA194_CLK_PEX0_CORE_1>;
                interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE1R &emc>,
                                <&mc TEGRA194_MEMORY_CLIENT_PCIE1W &emc>;
                interconnect-names = "dma-mem", "write";
-               iommus = <&smmu TEGRA194_SID_PCIE1>;
                iommu-map = <0x0 &smmu TEGRA194_SID_PCIE1 0x1000>;
                iommu-map-mask = <0x0>;
                dma-coherent;
                #size-cells = <2>;
                device_type = "pci";
                num-lanes = <1>;
-               num-viewport = <8>;
                linux,pci-domain = <2>;
 
                clocks = <&bpmp TEGRA194_CLK_PEX0_CORE_2>;
                interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE2AR &emc>,
                                <&mc TEGRA194_MEMORY_CLIENT_PCIE2AW &emc>;
                interconnect-names = "dma-mem", "write";
-               iommus = <&smmu TEGRA194_SID_PCIE2>;
                iommu-map = <0x0 &smmu TEGRA194_SID_PCIE2 0x1000>;
                iommu-map-mask = <0x0>;
                dma-coherent;
                #size-cells = <2>;
                device_type = "pci";
                num-lanes = <1>;
-               num-viewport = <8>;
                linux,pci-domain = <3>;
 
                clocks = <&bpmp TEGRA194_CLK_PEX0_CORE_3>;
                interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE3R &emc>,
                                <&mc TEGRA194_MEMORY_CLIENT_PCIE3W &emc>;
                interconnect-names = "dma-mem", "write";
-               iommus = <&smmu TEGRA194_SID_PCIE3>;
                iommu-map = <0x0 &smmu TEGRA194_SID_PCIE3 0x1000>;
                iommu-map-mask = <0x0>;
                dma-coherent;
                #size-cells = <2>;
                device_type = "pci";
                num-lanes = <4>;
-               num-viewport = <8>;
                linux,pci-domain = <4>;
 
                clocks = <&bpmp TEGRA194_CLK_PEX0_CORE_4>;
                interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE4R &emc>,
                                <&mc TEGRA194_MEMORY_CLIENT_PCIE4W &emc>;
                interconnect-names = "dma-mem", "write";
-               iommus = <&smmu TEGRA194_SID_PCIE4>;
                iommu-map = <0x0 &smmu TEGRA194_SID_PCIE4 0x1000>;
                iommu-map-mask = <0x0>;
                dma-coherent;
                #size-cells = <2>;
                device_type = "pci";
                num-lanes = <8>;
-               num-viewport = <8>;
                linux,pci-domain = <0>;
 
                clocks = <&bpmp TEGRA194_CLK_PEX0_CORE_0>;
                interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE0R &emc>,
                                <&mc TEGRA194_MEMORY_CLIENT_PCIE0W &emc>;
                interconnect-names = "dma-mem", "write";
-               iommus = <&smmu TEGRA194_SID_PCIE0>;
                iommu-map = <0x0 &smmu TEGRA194_SID_PCIE0 0x1000>;
                iommu-map-mask = <0x0>;
                dma-coherent;
                #size-cells = <2>;
                device_type = "pci";
                num-lanes = <8>;
-               num-viewport = <8>;
                linux,pci-domain = <5>;
 
                pinctrl-names = "default";
                interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE5R &emc>,
                                <&mc TEGRA194_MEMORY_CLIENT_PCIE5W &emc>;
                interconnect-names = "dma-mem", "write";
-               iommus = <&smmu TEGRA194_SID_PCIE5>;
                iommu-map = <0x0 &smmu TEGRA194_SID_PCIE5 0x1000>;
                iommu-map-mask = <0x0>;
                dma-coherent;
                interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE4R &emc>,
                                <&mc TEGRA194_MEMORY_CLIENT_PCIE4W &emc>;
                interconnect-names = "dma-mem", "write";
-               iommus = <&smmu TEGRA194_SID_PCIE4>;
                iommu-map = <0x0 &smmu TEGRA194_SID_PCIE4 0x1000>;
                iommu-map-mask = <0x0>;
                dma-coherent;
                interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE0R &emc>,
                                <&mc TEGRA194_MEMORY_CLIENT_PCIE0W &emc>;
                interconnect-names = "dma-mem", "write";
-               iommus = <&smmu TEGRA194_SID_PCIE0>;
                iommu-map = <0x0 &smmu TEGRA194_SID_PCIE0 0x1000>;
                iommu-map-mask = <0x0>;
                dma-coherent;
                interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE5R &emc>,
                                <&mc TEGRA194_MEMORY_CLIENT_PCIE5W &emc>;
                interconnect-names = "dma-mem", "write";
-               iommus = <&smmu TEGRA194_SID_PCIE5>;
                iommu-map = <0x0 &smmu TEGRA194_SID_PCIE5 0x1000>;
                iommu-map-mask = <0x0>;
                dma-coherent;