arm64: zynqmp: Add missing #dma-cells property
authorMichael Tretter <m.tretter@pengutronix.de>
Wed, 12 Jan 2022 15:15:40 +0000 (16:15 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 24 Jan 2022 12:15:40 +0000 (13:15 +0100)
Requesting the dma controllers fails if #dma-cells is not defined. Add
the missing property.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Link: https://lore.kernel.org/r/20220112151541.1328732-3-m.tretter@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm64/boot/dts/xilinx/zynqmp.dtsi

index 493719f..6d96b6b 100644 (file)
                        interrupt-parent = <&gic>;
                        interrupts = <0 124 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <128>;
                        iommus = <&smmu 0x14e8>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 125 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <128>;
                        iommus = <&smmu 0x14e9>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 126 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <128>;
                        iommus = <&smmu 0x14ea>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 127 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <128>;
                        iommus = <&smmu 0x14eb>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 128 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <128>;
                        iommus = <&smmu 0x14ec>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 129 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <128>;
                        iommus = <&smmu 0x14ed>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 130 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <128>;
                        iommus = <&smmu 0x14ee>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 131 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <128>;
                        iommus = <&smmu 0x14ef>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 77 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <64>;
                        iommus = <&smmu 0x868>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 78 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <64>;
                        iommus = <&smmu 0x869>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 79 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <64>;
                        iommus = <&smmu 0x86a>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 80 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <64>;
                        iommus = <&smmu 0x86b>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 81 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <64>;
                        iommus = <&smmu 0x86c>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 82 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <64>;
                        iommus = <&smmu 0x86d>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 83 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <64>;
                        iommus = <&smmu 0x86e>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 84 4>;
                        clock-names = "clk_main", "clk_apb";
+                       #dma-cells = <1>;
                        xlnx,bus-width = <64>;
                        iommus = <&smmu 0x86f>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;