drm/amd/display/dm: Add vega20 support
authorFeifei Xu <Feifei.Xu@amd.com>
Fri, 20 Apr 2018 11:50:01 +0000 (19:50 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 17 May 2018 15:13:18 +0000 (10:13 -0500)
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

index f2f54a9..6f5cb26 100644 (file)
@@ -1115,6 +1115,7 @@ static int dce110_register_irq_handlers(struct amdgpu_device *adev)
 
        if (adev->asic_type == CHIP_VEGA10 ||
            adev->asic_type == CHIP_VEGA12 ||
+           adev->asic_type == CHIP_VEGA20 ||
            adev->asic_type == CHIP_RAVEN)
                client_id = SOC15_IH_CLIENTID_DCE;
 
@@ -1518,6 +1519,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
 #endif
        case CHIP_VEGA10:
        case CHIP_VEGA12:
+       case CHIP_VEGA20:
                if (dce110_register_irq_handlers(dm->adev)) {
                        DRM_ERROR("DM: Failed to initialize IRQ\n");
                        goto fail;
@@ -1718,6 +1720,7 @@ static int dm_early_init(void *handle)
                break;
        case CHIP_VEGA10:
        case CHIP_VEGA12:
+       case CHIP_VEGA20:
                adev->mode_info.num_crtc = 6;
                adev->mode_info.num_hpd = 6;
                adev->mode_info.num_dig = 6;
@@ -1966,6 +1969,7 @@ static int fill_plane_attributes_from_fb(struct amdgpu_device *adev,
 
        if (adev->asic_type == CHIP_VEGA10 ||
            adev->asic_type == CHIP_VEGA12 ||
+           adev->asic_type == CHIP_VEGA20 ||
            adev->asic_type == CHIP_RAVEN) {
                /* Fill GFX9 params */
                plane_state->tiling_info.gfx9.num_pipes =