pinctrl: sh-pfc: r8a7795: Add group for QSPI0 and QSPI1 pins
authorNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Fri, 11 Nov 2016 20:33:41 +0000 (21:33 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 16 Nov 2016 09:29:14 +0000 (10:29 +0100)
Group the QSPI0 and QSPI1 pins into similar groups found in other sh-pfc
drivers. The pins can not be muxed between functions other than QSPI,
but their drive strength can be controlled.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/sh-pfc/pfc-r8a7795.c

index d9923c6..135ed5c 100644 (file)
@@ -3720,6 +3720,55 @@ static const unsigned int usb2_mux[] = {
        USB2_PWEN_MARK, USB2_OVC_MARK,
 };
 
+/* - QSPI0 ------------------------------------------------------------------ */
+static const unsigned int qspi0_ctrl_pins[] = {
+       /* QSPI0_SPCLK, QSPI0_SSL */
+       PIN_NUMBER('W', 3), PIN_NUMBER('Y', 3),
+};
+static const unsigned int qspi0_ctrl_mux[] = {
+       QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
+};
+static const unsigned int qspi0_data2_pins[] = {
+       /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
+       PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
+};
+static const unsigned int qspi0_data2_mux[] = {
+       QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
+};
+static const unsigned int qspi0_data4_pins[] = {
+       /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1, QSPI0_IO2, QSPI0_IO3 */
+       PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
+       PIN_NUMBER('Y', 6), PIN_A_NUMBER('B', 6),
+};
+static const unsigned int qspi0_data4_mux[] = {
+       QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
+       QSPI0_IO2_MARK, QSPI0_IO3_MARK,
+};
+/* - QSPI1 ------------------------------------------------------------------ */
+static const unsigned int qspi1_ctrl_pins[] = {
+       /* QSPI1_SPCLK, QSPI1_SSL */
+       PIN_NUMBER('V', 3), PIN_NUMBER('V', 5),
+};
+static const unsigned int qspi1_ctrl_mux[] = {
+       QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
+};
+static const unsigned int qspi1_data2_pins[] = {
+       /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
+       PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
+};
+static const unsigned int qspi1_data2_mux[] = {
+       QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
+};
+static const unsigned int qspi1_data4_pins[] = {
+       /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1, QSPI1_IO2, QSPI1_IO3 */
+       PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
+       PIN_A_NUMBER('E', 4), PIN_A_NUMBER('C', 3),
+};
+static const unsigned int qspi1_data4_mux[] = {
+       QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
+       QSPI1_IO2_MARK, QSPI1_IO3_MARK,
+};
+
 static const struct sh_pfc_pin_group pinmux_groups[] = {
        SH_PFC_PIN_GROUP(audio_clk_a_a),
        SH_PFC_PIN_GROUP(audio_clk_a_b),
@@ -4020,6 +4069,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
        SH_PFC_PIN_GROUP(usb0),
        SH_PFC_PIN_GROUP(usb1),
        SH_PFC_PIN_GROUP(usb2),
+       SH_PFC_PIN_GROUP(qspi0_ctrl),
+       SH_PFC_PIN_GROUP(qspi0_data2),
+       SH_PFC_PIN_GROUP(qspi0_data4),
+       SH_PFC_PIN_GROUP(qspi1_ctrl),
+       SH_PFC_PIN_GROUP(qspi1_data2),
+       SH_PFC_PIN_GROUP(qspi1_data4),
 };
 
 static const char * const audio_clk_groups[] = {
@@ -4465,6 +4520,18 @@ static const char * const usb2_groups[] = {
        "usb2",
 };
 
+static const char * const qspi0_groups[] = {
+       "qspi0_ctrl",
+       "qspi0_data2",
+       "qspi0_data4",
+};
+
+static const char * const qspi1_groups[] = {
+       "qspi1_ctrl",
+       "qspi1_data2",
+       "qspi1_data4",
+};
+
 static const struct sh_pfc_function pinmux_functions[] = {
        SH_PFC_FUNCTION(audio_clk),
        SH_PFC_FUNCTION(avb),
@@ -4514,6 +4581,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
        SH_PFC_FUNCTION(usb0),
        SH_PFC_FUNCTION(usb1),
        SH_PFC_FUNCTION(usb2),
+       SH_PFC_FUNCTION(qspi0),
+       SH_PFC_FUNCTION(qspi1),
 };
 
 static const struct pinmux_cfg_reg pinmux_config_regs[] = {