; CHECK-LABEL: v_urem_i64_pow2k_denom:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; CHECK-NEXT: v_cvt_f32_u32_e32 v2, 0x1000
-; CHECK-NEXT: v_cvt_f32_ubyte0_e32 v3, 0
-; CHECK-NEXT: s_movk_i32 s6, 0xf000
-; CHECK-NEXT: s_movk_i32 s7, 0x1000
-; CHECK-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3
-; CHECK-NEXT: v_rcp_iflag_f32_e32 v2, v2
-; CHECK-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2
-; CHECK-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2
-; CHECK-NEXT: v_trunc_f32_e32 v3, v3
-; CHECK-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3
-; CHECK-NEXT: v_cvt_u32_f32_e32 v3, v3
-; CHECK-NEXT: v_cvt_u32_f32_e32 v2, v2
-; CHECK-NEXT: v_mul_lo_u32 v4, s6, v3
-; CHECK-NEXT: v_mul_lo_u32 v5, s6, v2
-; CHECK-NEXT: v_mul_lo_u32 v6, -1, v2
-; CHECK-NEXT: v_mul_hi_u32 v7, s6, v2
-; CHECK-NEXT: v_add_i32_e32 v4, vcc, v6, v4
-; CHECK-NEXT: v_mul_lo_u32 v6, v3, v5
-; CHECK-NEXT: v_mul_hi_u32 v8, v2, v5
-; CHECK-NEXT: v_mul_hi_u32 v5, v3, v5
-; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v7
-; CHECK-NEXT: v_mul_lo_u32 v7, v2, v4
-; CHECK-NEXT: v_mul_lo_u32 v9, v3, v4
-; CHECK-NEXT: v_mul_hi_u32 v10, v2, v4
-; CHECK-NEXT: v_mul_hi_u32 v4, v3, v4
-; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v7
-; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc
-; CHECK-NEXT: v_add_i32_e32 v5, vcc, v9, v5
-; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc
-; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v8
-; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc
-; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v10
-; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc
-; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6
-; CHECK-NEXT: v_add_i32_e32 v7, vcc, v9, v8
-; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v6
-; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc
-; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6
-; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v6
-; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v5
-; CHECK-NEXT: v_addc_u32_e64 v5, s[4:5], v3, v4, vcc
-; CHECK-NEXT: v_add_i32_e64 v3, s[4:5], v3, v4
-; CHECK-NEXT: v_mul_lo_u32 v4, s6, v2
-; CHECK-NEXT: v_mul_lo_u32 v6, -1, v2
-; CHECK-NEXT: v_mul_hi_u32 v7, s6, v2
-; CHECK-NEXT: v_mul_lo_u32 v8, s6, v5
-; CHECK-NEXT: v_mul_lo_u32 v9, v5, v4
-; CHECK-NEXT: v_mul_hi_u32 v10, v2, v4
-; CHECK-NEXT: v_mul_hi_u32 v4, v5, v4
-; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v8
-; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v7
-; CHECK-NEXT: v_mul_lo_u32 v7, v2, v6
-; CHECK-NEXT: v_mul_lo_u32 v8, v5, v6
-; CHECK-NEXT: v_mul_hi_u32 v11, v2, v6
-; CHECK-NEXT: v_mul_hi_u32 v5, v5, v6
-; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v9, v7
-; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[4:5]
-; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v8, v4
-; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5]
-; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v10
-; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, s[4:5]
-; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v4, v11
-; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5]
-; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v7, v6
-; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v8, v9
-; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v4, v6
-; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, s[4:5]
-; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v7, v6
-; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v5, v6
-; CHECK-NEXT: v_addc_u32_e32 v3, vcc, v3, v5, vcc
-; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v4
-; CHECK-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
-; CHECK-NEXT: v_mul_lo_u32 v4, v1, v2
-; CHECK-NEXT: v_mul_hi_u32 v5, v0, v2
-; CHECK-NEXT: v_mul_hi_u32 v2, v1, v2
-; CHECK-NEXT: v_mul_lo_u32 v6, v0, v3
-; CHECK-NEXT: v_mul_lo_u32 v7, v1, v3
-; CHECK-NEXT: v_mul_hi_u32 v8, v0, v3
-; CHECK-NEXT: v_mul_hi_u32 v3, v1, v3
-; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v6
-; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc
-; CHECK-NEXT: v_add_i32_e32 v2, vcc, v7, v2
-; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc
-; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v5
-; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc
-; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v8
-; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc
-; CHECK-NEXT: v_add_i32_e32 v4, vcc, v6, v4
-; CHECK-NEXT: v_add_i32_e32 v5, vcc, v7, v5
-; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v4
-; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc
-; CHECK-NEXT: v_add_i32_e32 v4, vcc, v5, v4
-; CHECK-NEXT: v_mul_lo_u32 v5, s7, v2
-; CHECK-NEXT: v_mul_lo_u32 v6, 0, v2
-; CHECK-NEXT: v_mul_hi_u32 v2, s7, v2
-; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v4
-; CHECK-NEXT: v_mul_lo_u32 v3, s7, v3
-; CHECK-NEXT: v_add_i32_e32 v3, vcc, v6, v3
-; CHECK-NEXT: v_add_i32_e32 v2, vcc, v3, v2
-; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v0, v5
-; CHECK-NEXT: v_subb_u32_e64 v3, s[4:5], v1, v2, vcc
-; CHECK-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v2
-; CHECK-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v0
-; CHECK-NEXT: v_cndmask_b32_e64 v2, 0, -1, s[4:5]
-; CHECK-NEXT: v_cmp_le_u32_e64 s[4:5], 0, v3
-; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5]
-; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
-; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3
-; CHECK-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc
-; CHECK-NEXT: v_subrev_i32_e32 v4, vcc, s7, v0
-; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
-; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s7, v4
-; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
-; CHECK-NEXT: v_cmp_le_u32_e32 vcc, 0, v1
-; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc
-; CHECK-NEXT: v_subrev_i32_e32 v7, vcc, s7, v4
-; CHECK-NEXT: v_subbrev_u32_e32 v8, vcc, 0, v1, vcc
-; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1
-; CHECK-NEXT: v_cndmask_b32_e32 v5, v6, v5, vcc
-; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5
-; CHECK-NEXT: v_cndmask_b32_e32 v4, v4, v7, vcc
-; CHECK-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc
-; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2
-; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc
-; CHECK-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
+; CHECK-NEXT: s_add_u32 s4, 0x1000, -1
+; CHECK-NEXT: s_cselect_b32 s5, 1, 0
+; CHECK-NEXT: s_and_b32 s5, s5, 1
+; CHECK-NEXT: s_cmp_lg_u32 s5, 0
+; CHECK-NEXT: s_addc_u32 s5, 0, -1
+; CHECK-NEXT: v_and_b32_e32 v0, s4, v0
+; CHECK-NEXT: v_and_b32_e32 v1, s5, v1
; CHECK-NEXT: s_setpc_b64 s[30:31]
%result = urem i64 %num, 4096
ret i64 %result
; CGP-LABEL: v_urem_v2i64_pow2k_denom:
; CGP: ; %bb.0:
; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; CGP-NEXT: v_cvt_f32_u32_e32 v4, 0x1000
-; CGP-NEXT: v_cvt_f32_ubyte0_e32 v5, 0
-; CGP-NEXT: s_movk_i32 s8, 0xf000
-; CGP-NEXT: s_movk_i32 s10, 0x1000
-; CGP-NEXT: v_mov_b32_e32 v6, v4
-; CGP-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5
-; CGP-NEXT: v_mac_f32_e32 v6, 0x4f800000, v5
-; CGP-NEXT: v_rcp_iflag_f32_e32 v4, v4
-; CGP-NEXT: v_rcp_iflag_f32_e32 v5, v6
-; CGP-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4
-; CGP-NEXT: v_mul_f32_e32 v5, 0x5f7ffffc, v5
-; CGP-NEXT: v_mul_f32_e32 v6, 0x2f800000, v4
-; CGP-NEXT: v_mul_f32_e32 v7, 0x2f800000, v5
-; CGP-NEXT: v_trunc_f32_e32 v6, v6
-; CGP-NEXT: v_trunc_f32_e32 v7, v7
-; CGP-NEXT: v_mac_f32_e32 v4, 0xcf800000, v6
-; CGP-NEXT: v_cvt_u32_f32_e32 v6, v6
-; CGP-NEXT: v_mac_f32_e32 v5, 0xcf800000, v7
-; CGP-NEXT: v_cvt_u32_f32_e32 v7, v7
-; CGP-NEXT: v_cvt_u32_f32_e32 v4, v4
-; CGP-NEXT: v_mul_lo_u32 v8, s8, v6
-; CGP-NEXT: v_cvt_u32_f32_e32 v5, v5
-; CGP-NEXT: v_mul_lo_u32 v9, s8, v7
-; CGP-NEXT: v_mul_lo_u32 v10, s8, v4
-; CGP-NEXT: v_mul_lo_u32 v11, -1, v4
-; CGP-NEXT: v_mul_hi_u32 v12, s8, v4
-; CGP-NEXT: v_mul_lo_u32 v13, s8, v5
-; CGP-NEXT: v_mul_lo_u32 v14, -1, v5
-; CGP-NEXT: v_mul_hi_u32 v15, s8, v5
-; CGP-NEXT: v_add_i32_e32 v8, vcc, v11, v8
-; CGP-NEXT: v_mul_lo_u32 v11, v6, v10
-; CGP-NEXT: v_mul_hi_u32 v16, v4, v10
-; CGP-NEXT: v_mul_hi_u32 v10, v6, v10
-; CGP-NEXT: v_add_i32_e32 v9, vcc, v14, v9
-; CGP-NEXT: v_mul_lo_u32 v14, v7, v13
-; CGP-NEXT: v_mul_hi_u32 v17, v5, v13
-; CGP-NEXT: v_mul_hi_u32 v13, v7, v13
-; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v12
-; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v15
-; CGP-NEXT: v_mul_lo_u32 v12, v4, v8
-; CGP-NEXT: v_mul_lo_u32 v15, v6, v8
-; CGP-NEXT: v_mul_hi_u32 v18, v4, v8
-; CGP-NEXT: v_mul_hi_u32 v8, v6, v8
-; CGP-NEXT: v_mul_lo_u32 v19, v5, v9
-; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v19
-; CGP-NEXT: v_cndmask_b32_e64 v19, 0, 1, vcc
-; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v17
-; CGP-NEXT: v_mul_lo_u32 v14, v7, v9
-; CGP-NEXT: v_mul_hi_u32 v17, v5, v9
-; CGP-NEXT: v_mul_hi_u32 v9, v7, v9
-; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12
-; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5]
-; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v15, v10
-; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5]
-; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13
-; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5]
-; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v16
-; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5]
-; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v18
-; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[4:5]
-; CGP-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc
-; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v17
-; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc
-; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11
-; CGP-NEXT: v_add_i32_e32 v12, vcc, v15, v16
-; CGP-NEXT: v_add_i32_e32 v15, vcc, v19, v18
-; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v17
-; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v11
-; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc
-; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v15
-; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc
-; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11
-; CGP-NEXT: v_add_i32_e32 v12, vcc, v14, v15
-; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v11
-; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v12
-; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v10
-; CGP-NEXT: v_addc_u32_e64 v10, s[4:5], v6, v8, vcc
-; CGP-NEXT: v_add_i32_e64 v6, s[4:5], v6, v8
-; CGP-NEXT: v_mul_lo_u32 v8, s8, v4
-; CGP-NEXT: v_mul_lo_u32 v11, -1, v4
-; CGP-NEXT: v_mul_hi_u32 v12, s8, v4
-; CGP-NEXT: v_add_i32_e64 v5, s[4:5], v5, v13
-; CGP-NEXT: v_addc_u32_e64 v13, s[6:7], v7, v9, s[4:5]
-; CGP-NEXT: v_add_i32_e64 v7, s[6:7], v7, v9
-; CGP-NEXT: v_mul_lo_u32 v9, s8, v5
-; CGP-NEXT: v_mul_lo_u32 v14, -1, v5
-; CGP-NEXT: v_mul_hi_u32 v15, s8, v5
-; CGP-NEXT: v_mul_lo_u32 v16, s8, v10
-; CGP-NEXT: v_mul_lo_u32 v17, v10, v8
-; CGP-NEXT: v_mul_hi_u32 v18, v4, v8
-; CGP-NEXT: v_mul_hi_u32 v8, v10, v8
-; CGP-NEXT: v_mul_lo_u32 v19, s8, v13
-; CGP-NEXT: v_add_i32_e64 v11, s[6:7], v11, v16
-; CGP-NEXT: v_mul_lo_u32 v16, v13, v9
-; CGP-NEXT: v_add_i32_e64 v14, s[6:7], v14, v19
-; CGP-NEXT: v_mul_hi_u32 v19, v5, v9
-; CGP-NEXT: v_mul_hi_u32 v9, v13, v9
-; CGP-NEXT: v_add_i32_e64 v11, s[6:7], v11, v12
-; CGP-NEXT: v_add_i32_e64 v12, s[6:7], v14, v15
-; CGP-NEXT: v_mul_lo_u32 v14, v4, v11
-; CGP-NEXT: v_mul_lo_u32 v15, v5, v12
-; CGP-NEXT: v_add_i32_e64 v15, s[6:7], v16, v15
-; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[6:7]
-; CGP-NEXT: v_add_i32_e64 v15, s[6:7], v15, v19
-; CGP-NEXT: v_mul_lo_u32 v15, v10, v11
-; CGP-NEXT: v_mul_hi_u32 v19, v4, v11
-; CGP-NEXT: v_mul_hi_u32 v10, v10, v11
-; CGP-NEXT: v_mul_lo_u32 v11, v13, v12
-; CGP-NEXT: v_mul_hi_u32 v13, v13, v12
-; CGP-NEXT: v_mul_hi_u32 v12, v5, v12
-; CGP-NEXT: v_add_i32_e64 v14, s[8:9], v17, v14
-; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, s[8:9]
-; CGP-NEXT: v_add_i32_e64 v8, s[8:9], v15, v8
-; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[8:9]
-; CGP-NEXT: v_add_i32_e64 v9, s[8:9], v11, v9
-; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[8:9]
-; CGP-NEXT: v_add_i32_e64 v14, s[8:9], v14, v18
-; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[8:9]
-; CGP-NEXT: v_add_i32_e64 v8, s[8:9], v8, v19
-; CGP-NEXT: v_cndmask_b32_e64 v18, 0, 1, s[8:9]
-; CGP-NEXT: v_cndmask_b32_e64 v19, 0, 1, s[6:7]
-; CGP-NEXT: v_add_i32_e64 v9, s[6:7], v9, v12
-; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[6:7]
-; CGP-NEXT: v_add_i32_e64 v14, s[6:7], v17, v14
-; CGP-NEXT: v_add_i32_e64 v15, s[6:7], v15, v18
-; CGP-NEXT: v_add_i32_e64 v16, s[6:7], v16, v19
-; CGP-NEXT: v_add_i32_e64 v11, s[6:7], v11, v12
-; CGP-NEXT: v_add_i32_e64 v8, s[6:7], v8, v14
-; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[6:7]
-; CGP-NEXT: v_add_i32_e64 v9, s[6:7], v9, v16
-; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[6:7]
-; CGP-NEXT: v_add_i32_e64 v12, s[6:7], v15, v12
-; CGP-NEXT: v_add_i32_e64 v11, s[6:7], v11, v14
-; CGP-NEXT: v_add_i32_e64 v10, s[6:7], v10, v12
-; CGP-NEXT: v_add_i32_e64 v11, s[6:7], v13, v11
-; CGP-NEXT: v_addc_u32_e32 v6, vcc, v6, v10, vcc
-; CGP-NEXT: v_addc_u32_e64 v7, vcc, v7, v11, s[4:5]
-; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v8
-; CGP-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc
-; CGP-NEXT: v_mul_lo_u32 v8, v3, v4
-; CGP-NEXT: v_mul_hi_u32 v10, v2, v4
-; CGP-NEXT: v_mul_hi_u32 v4, v3, v4
-; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v9
-; CGP-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc
-; CGP-NEXT: v_mul_lo_u32 v9, v1, v5
-; CGP-NEXT: v_mul_hi_u32 v11, v0, v5
-; CGP-NEXT: v_mul_hi_u32 v5, v1, v5
-; CGP-NEXT: v_mul_lo_u32 v12, v2, v6
-; CGP-NEXT: v_mul_lo_u32 v13, v3, v6
-; CGP-NEXT: v_mul_hi_u32 v14, v2, v6
-; CGP-NEXT: v_mul_hi_u32 v6, v3, v6
-; CGP-NEXT: v_mul_lo_u32 v15, v0, v7
-; CGP-NEXT: v_mul_lo_u32 v16, v1, v7
-; CGP-NEXT: v_mul_hi_u32 v17, v0, v7
-; CGP-NEXT: v_mul_hi_u32 v7, v1, v7
-; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v12
-; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc
-; CGP-NEXT: v_add_i32_e32 v4, vcc, v13, v4
-; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc
-; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v15
-; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc
-; CGP-NEXT: v_add_i32_e32 v5, vcc, v16, v5
-; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc
-; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v10
-; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc
-; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v14
-; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc
-; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11
-; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc
-; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v17
-; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc
-; CGP-NEXT: v_add_i32_e32 v8, vcc, v12, v8
-; CGP-NEXT: v_add_i32_e32 v10, vcc, v13, v10
-; CGP-NEXT: v_add_i32_e32 v9, vcc, v15, v9
-; CGP-NEXT: v_add_i32_e32 v11, vcc, v16, v11
-; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v8
-; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc
-; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v9
-; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc
-; CGP-NEXT: v_add_i32_e32 v8, vcc, v10, v8
-; CGP-NEXT: v_mul_lo_u32 v10, s10, v4
-; CGP-NEXT: v_mul_lo_u32 v12, 0, v4
-; CGP-NEXT: v_mul_hi_u32 v4, s10, v4
-; CGP-NEXT: v_add_i32_e32 v9, vcc, v11, v9
-; CGP-NEXT: v_mul_lo_u32 v11, s10, v5
-; CGP-NEXT: v_mul_lo_u32 v13, 0, v5
-; CGP-NEXT: v_mul_hi_u32 v5, s10, v5
-; CGP-NEXT: v_add_i32_e32 v6, vcc, v6, v8
-; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v9
-; CGP-NEXT: v_mul_lo_u32 v6, s10, v6
-; CGP-NEXT: v_mul_lo_u32 v7, s10, v7
-; CGP-NEXT: v_add_i32_e32 v6, vcc, v12, v6
-; CGP-NEXT: v_add_i32_e32 v7, vcc, v13, v7
-; CGP-NEXT: v_add_i32_e32 v4, vcc, v6, v4
-; CGP-NEXT: v_add_i32_e32 v5, vcc, v7, v5
-; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v10
-; CGP-NEXT: v_subb_u32_e64 v6, s[4:5], v3, v4, vcc
-; CGP-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v4
-; CGP-NEXT: v_cmp_le_u32_e64 s[4:5], s10, v2
-; CGP-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5]
-; CGP-NEXT: v_sub_i32_e64 v0, s[4:5], v0, v11
-; CGP-NEXT: v_subb_u32_e64 v7, s[6:7], v1, v5, s[4:5]
-; CGP-NEXT: v_sub_i32_e64 v1, s[6:7], v1, v5
-; CGP-NEXT: v_cmp_le_u32_e64 s[6:7], s10, v0
-; CGP-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[6:7]
-; CGP-NEXT: v_cmp_le_u32_e64 s[6:7], 0, v6
-; CGP-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[6:7]
-; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
-; CGP-NEXT: v_cmp_le_u32_e32 vcc, 0, v7
-; CGP-NEXT: v_cndmask_b32_e64 v9, 0, -1, vcc
-; CGP-NEXT: v_subbrev_u32_e64 v1, vcc, 0, v1, s[4:5]
-; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v6
-; CGP-NEXT: v_cndmask_b32_e32 v4, v8, v4, vcc
-; CGP-NEXT: v_subrev_i32_e32 v8, vcc, s10, v2
-; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
-; CGP-NEXT: v_cmp_le_u32_e32 vcc, s10, v8
-; CGP-NEXT: v_cndmask_b32_e64 v10, 0, -1, vcc
-; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v7
-; CGP-NEXT: v_cndmask_b32_e32 v5, v9, v5, vcc
-; CGP-NEXT: v_subrev_i32_e32 v9, vcc, s10, v0
-; CGP-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
-; CGP-NEXT: v_cmp_le_u32_e32 vcc, s10, v9
-; CGP-NEXT: v_cndmask_b32_e64 v11, 0, -1, vcc
-; CGP-NEXT: v_cmp_le_u32_e32 vcc, 0, v3
-; CGP-NEXT: v_cndmask_b32_e64 v12, 0, -1, vcc
-; CGP-NEXT: v_subrev_i32_e32 v13, vcc, s10, v8
-; CGP-NEXT: v_subbrev_u32_e32 v14, vcc, 0, v3, vcc
-; CGP-NEXT: v_cmp_le_u32_e32 vcc, 0, v1
-; CGP-NEXT: v_cndmask_b32_e64 v15, 0, -1, vcc
-; CGP-NEXT: v_subrev_i32_e32 v16, vcc, s10, v9
-; CGP-NEXT: v_subbrev_u32_e32 v17, vcc, 0, v1, vcc
-; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3
-; CGP-NEXT: v_cndmask_b32_e32 v10, v12, v10, vcc
-; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1
-; CGP-NEXT: v_cndmask_b32_e32 v11, v15, v11, vcc
-; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10
-; CGP-NEXT: v_cndmask_b32_e32 v8, v8, v13, vcc
-; CGP-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v11
-; CGP-NEXT: v_cndmask_b32_e64 v9, v9, v16, s[4:5]
-; CGP-NEXT: v_cndmask_b32_e32 v3, v3, v14, vcc
-; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4
-; CGP-NEXT: v_cndmask_b32_e32 v2, v2, v8, vcc
-; CGP-NEXT: v_cndmask_b32_e64 v1, v1, v17, s[4:5]
-; CGP-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v5
-; CGP-NEXT: v_cndmask_b32_e64 v0, v0, v9, s[4:5]
-; CGP-NEXT: v_cndmask_b32_e64 v1, v7, v1, s[4:5]
-; CGP-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc
+; CGP-NEXT: s_movk_i32 s4, 0x1000
+; CGP-NEXT: s_add_u32 s5, s4, -1
+; CGP-NEXT: s_cselect_b32 s6, 1, 0
+; CGP-NEXT: s_and_b32 s6, s6, 1
+; CGP-NEXT: s_cmp_lg_u32 s6, 0
+; CGP-NEXT: s_addc_u32 s6, 0, -1
+; CGP-NEXT: s_add_u32 s4, s4, -1
+; CGP-NEXT: s_cselect_b32 s7, 1, 0
+; CGP-NEXT: v_and_b32_e32 v0, s5, v0
+; CGP-NEXT: s_and_b32 s5, s7, 1
+; CGP-NEXT: v_and_b32_e32 v1, s6, v1
+; CGP-NEXT: s_cmp_lg_u32 s5, 0
+; CGP-NEXT: s_addc_u32 s5, 0, -1
+; CGP-NEXT: v_and_b32_e32 v2, s4, v2
+; CGP-NEXT: v_and_b32_e32 v3, s5, v3
; CGP-NEXT: s_setpc_b64 s[30:31]
%result = urem <2 x i64> %num, <i64 4096, i64 4096>
ret <2 x i64> %result