ARM: Enhance the hardfloat support

The "simple" function with inline assembly for detecting hardfloat have been changed to handle compiling without VFP and with thumb.

The SCons setting for the float abi now follows then naming used by the GCC -mfloat-abi and soft has been added.

R=karlklose@chromium.org

BUG=none
TEST=none

Review URL: http://codereview.chromium.org//6904126

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7725 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

diff --git a/SConstruct b/SConstruct
index c731276aee0dd07d1afb7710e1d8de9c554d2090..fb780a22a67dd7cf20c49656c459f8329f87abc4 100644 (file)
--- a/SConstruct
+++ b/SConstruct
@@ -1,4 +1,4 @@
-# Copyright 2010 the V8 project authors. All rights reserved.
+# Copyright 2011 the V8 project authors. All rights reserved.
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are
 # met:
@@ -155,13 +155,19 @@ LIBRARY_FLAGS = {
       'unalignedaccesses:off' : {
         'CPPDEFINES' : ['CAN_USE_UNALIGNED_ACCESSES=0']
       },
-      'armeabi:softfloat' : {
+      'armeabi:soft' : {
+        'CPPDEFINES' : ['USE_EABI_HARDFLOAT=0'],
+        'simulator:none': {
+          'CCFLAGS':     ['-mfloat-abi=soft'],
+        }
+      },
+      'armeabi:softfp' : {
         'CPPDEFINES' : ['USE_EABI_HARDFLOAT=0'],
         'simulator:none': {
           'CCFLAGS':     ['-mfloat-abi=softfp'],
         }
       },
-      'armeabi:hardfloat' : {
+      'armeabi:hard' : {
         'CPPDEFINES' : ['USE_EABI_HARDFLOAT=1', 'CAN_USE_VFP_INSTRUCTIONS'],
         'simulator:none': {
           'CCFLAGS':     ['-mfloat-abi=hard'],
@@ -476,13 +482,19 @@ SAMPLE_FLAGS = {
     },
     'arch:arm': {
       'LINKFLAGS':   ARM_LINK_FLAGS,
-      'armeabi:softfloat' : {
+      'armeabi:soft' : {
+        'CPPDEFINES' : ['USE_EABI_HARDFLOAT=0'],
+        'simulator:none': {
+          'CCFLAGS':     ['-mfloat-abi=soft'],
+        }
+      },
+      'armeabi:softfp' : {
         'CPPDEFINES' : ['USE_EABI_HARDFLOAT=0'],
         'simulator:none': {
           'CCFLAGS':     ['-mfloat-abi=softfp'],
         }
       },
-      'armeabi:hardfloat' : {
+      'armeabi:hard' : {
         'CPPDEFINES' : ['USE_EABI_HARDFLOAT=1', 'CAN_USE_VFP_INSTRUCTIONS'],
         'simulator:none': {
           'CCFLAGS':     ['-mfloat-abi=hard'],
@@ -605,12 +617,18 @@ PREPARSER_FLAGS = {
     },
     'arch:arm': {
       'LINKFLAGS':   ARM_LINK_FLAGS,
-      'armeabi:softfloat' : {
+      'armeabi:soft' : {
+        'CPPDEFINES' : ['USE_EABI_HARDFLOAT=0'],
+        'simulator:none': {
+          'CCFLAGS':     ['-mfloat-abi=soft'],
+        }
+      },
+      'armeabi:softfp' : {
         'simulator:none': {
           'CCFLAGS':     ['-mfloat-abi=softfp'],
         }
       },
-      'armeabi:hardfloat' : {
+      'armeabi:hard' : {
         'simulator:none': {
           'CCFLAGS':     ['-mfloat-abi=hard'],
         }
@@ -976,8 +994,8 @@ SIMPLE_OPTIONS = {
     'help': 'select profile guided optimization variant',
   },
   'armeabi': {
-    'values': ['hardfloat', 'softfloat'],
-    'default': 'softfloat',
+    'values': ['hard', 'softfp', 'soft'],
+    'default': 'softfp',
     'help': 'generate calling conventiont according to selected ARM EABI variant'
   },
   'mipsabi': {

diff --git a/src/platform-linux.cc b/src/platform-linux.cc
index d857cd90590dd74db84a6df1bebc2bffad42f930..db6c80ed5df1e22cbdbd0e9d40f7e88e3b3885fd 100644 (file)
--- a/src/platform-linux.cc
+++ b/src/platform-linux.cc
@@ -1,4 +1,4 @@
-// Copyright 2006-2008 the V8 project authors. All rights reserved.
+// Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
@@ -205,10 +205,32 @@ bool OS::ArmCpuHasFeature(CpuFeature feature) {
 // calling this will return 1.0 and otherwise 0.0.
 static void ArmUsingHardFloatHelper() {
   asm("mov r0, #0");
-  asm("mov r1, #0");
-  asm("movt r1, #16368");
+#if defined(__VFP_FP__) && !defined(__SOFTFP__)
+  // Load 0x3ff00000 into r1 using instructions available in both ARM
+  // and Thumb mode.
+  asm("mov r1, #3");
+  asm("mov r2, #255");
+  asm("lsl r1, r1, #8");
+  asm("orr r1, r1, r2");
+  asm("lsl r1, r1, #16");
+  // For vmov d0, r0, r1 use ARM mode.
+#ifdef __thumb__
+  asm volatile(
+    "@   Enter ARM Mode  \n\t"
+    "    adr r3, 1f      \n\t"
+    "    bx  r3          \n\t"
+    "    .ALIGN 4        \n\t"
+    "    .ARM            \n"
+    "1:  vmov d0, r0, r1 \n\t"
+    "@   Enter THUMB Mode\n\t"
+    "    adr r3, 2f+1    \n\t"
+    "    bx  r3          \n\t"
+    "    .THUMB          \n"
+    "2:                  \n\t");
+#else
   asm("vmov d0, r0, r1");
-  asm("mov r0, #0");
+#endif  // __thumb__
+#endif  // defined(__VFP_FP__) && !defined(__SOFTFP__)
   asm("mov r1, #0");
 }