genxml: Drop bit 27 from RENDER_SURFACE_STATE::Surface Format

Bit 27 is the "ASTC Format" bit in the PRMs but we just extended the
Surface Format field by one bit and made sure all the ASTC formats have
that bit set.  Since Gfx12.5 doesn't support ASTC, we can drop that bit
from the field and this will cause GenXML packing functions to assert if
it's ever set.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13206>

diff --git a/src/intel/genxml/gen125.xml b/src/intel/genxml/gen125.xml
index a1b2484..c894fd6 100644 (file)
--- a/src/intel/genxml/gen125.xml
+++ b/src/intel/genxml/gen125.xml
@@ -758,7 +758,7 @@
       <value name="VALIGN_8" value="2"/>
       <value name="VALIGN_16" value="3"/>
     </field>
-    <field name="Surface Format" start="18" end="27" type="uint"/>
+    <field name="Surface Format" start="18" end="26" type="uint"/>
     <field name="Surface Array" start="28" end="28" type="bool"/>
     <field name="Surface Type" start="29" end="31" type="uint">
       <value name="SURFTYPE_1D" value="0"/>