thermal: stm32: Disable interrupts at probe

In case of CPU reset, the interrupts could be enabled at boot time.
Disable interrupts and clear flags.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200110101605.24984-4-p.paillet@st.com

diff --git a/drivers/thermal/st/stm_thermal.c b/drivers/thermal/st/stm_thermal.c
index a21fa7e..679d388 100644 (file)
--- a/drivers/thermal/st/stm_thermal.c
+++ b/drivers/thermal/st/stm_thermal.c
@@ -51,6 +51,12 @@
 /* DTS_DR register mask definitions */
 #define TS1_MFREQ_MASK         GENMASK(15, 0)
 
+/* DTS_ITENR register mask definitions */
+#define ITENR_MASK             (GENMASK(2, 0) | GENMASK(6, 4))
+
+/* DTS_ICIFR register mask definitions */
+#define ICIFR_MASK             (GENMASK(2, 0) | GENMASK(6, 4))
+
 /* Less significant bit position definitions */
 #define TS1_T0_POS             16
 #define TS1_SMP_TIME_POS       16
@@ -330,12 +336,10 @@ static int stm_disable_irq(struct stm_thermal_sensor *sensor)
 {
        u32 value;
 
-       /* Disable IT generation for low and high thresholds */
+       /* Disable IT generation */
        value = readl_relaxed(sensor->base + DTS_ITENR_OFFSET);
-       writel_relaxed(value & ~(LOW_THRESHOLD | HIGH_THRESHOLD),
-                      sensor->base + DTS_ITENR_OFFSET);
-
-       dev_dbg(sensor->dev, "%s: IT disabled on sensor side", __func__);
+       value &= ~ITENR_MASK;
+       writel_relaxed(value, sensor->base + DTS_ITENR_OFFSET);
 
        return 0;
 }
@@ -645,6 +649,11 @@ static int stm_thermal_probe(struct platform_device *pdev)
                return PTR_ERR(sensor->clk);
        }
 
+       stm_disable_irq(sensor);
+
+       /* Clear irq flags */
+       writel_relaxed(ICIFR_MASK, sensor->base + DTS_ICIFR_OFFSET);
+
        /* Register IRQ into GIC */
        ret = stm_register_irq(sensor);
        if (ret)