ath9k: set correct peak detect threshold

Set QCA9561 peak detect threshold to 11.

Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
index e1573ab..518e649 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
@@ -1203,12 +1203,12 @@ static void ar9003_hw_tx_iq_cal_reload(struct ath_hw *ah)
 static void ar9003_hw_manual_peak_cal(struct ath_hw *ah, u8 chain, bool is_2g)
 {
        int offset[8] = {0}, total = 0, test;
-       int agc_out, i, peak_detect_threshold;
+       int agc_out, i, peak_detect_threshold = 0;
 
        if (AR_SREV_9550(ah) || AR_SREV_9531(ah))
                peak_detect_threshold = 8;
-       else
-               peak_detect_threshold = 0;
+       else if (AR_SREV_9561(ah))
+               peak_detect_threshold = 11;
 
        /*
         * Turn off LNA/SW.
@@ -1249,17 +1249,14 @@ static void ar9003_hw_manual_peak_cal(struct ath_hw *ah, u8 chain, bool is_2g)
                REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
                              AR_PHY_65NM_RXRF_AGC_AGC2G_CALDAC_OVR, 0x0);
 
-       if (AR_SREV_9003_PCOEM(ah) || AR_SREV_9550(ah) || AR_SREV_9531(ah) ||
-           AR_SREV_9561(ah)) {
-               if (is_2g)
-                       REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
-                                     AR_PHY_65NM_RXRF_AGC_AGC2G_DBDAC_OVR,
-                                     peak_detect_threshold);
-               else
-                       REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
-                                     AR_PHY_65NM_RXRF_AGC_AGC5G_DBDAC_OVR,
-                                     peak_detect_threshold);
-       }
+       if (is_2g)
+               REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
+                             AR_PHY_65NM_RXRF_AGC_AGC2G_DBDAC_OVR,
+                             peak_detect_threshold);
+       else
+               REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
+                             AR_PHY_65NM_RXRF_AGC_AGC5G_DBDAC_OVR,
+                             peak_detect_threshold);
 
        for (i = 6; i > 0; i--) {
                offset[i] = BIT(i - 1);