* asan.c (asan_emit_stack_protection): Use full-sized mask to align

	the base address on 64-bit strict-alignment platforms.

(cherry picked from 724165bd22886d1fa486513c1b695302b307726e)

Change-Id: I52f5266e8336b7959b655226ae8619afc35b2692
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@268949 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ffa65a3..ecad014 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2019-02-15  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * asan.c (asan_emit_stack_protection): Use full-sized mask to align
+       the base address on 64-bit strict-alignment platforms.
+
 2019-02-12  Eric Botcazou  <ebotcazou@adacore.com>
 
        * asan.c (asan_expand_mark_ifn): Take into account the alignment of

diff --git a/gcc/asan.c b/gcc/asan.c
index b32dbc9..ae83c69 100644 (file)
--- a/gcc/asan.c
+++ b/gcc/asan.c
@@ -1256,13 +1256,15 @@ asan_emit_stack_protection (rtx base, rtx pbase, unsigned int alignb,
        base_align_bias = ((asan_frame_size + alignb - 1)
                           & ~(alignb - HOST_WIDE_INT_1)) - asan_frame_size;
     }
+
   /* Align base if target is STRICT_ALIGNMENT.  */
   if (STRICT_ALIGNMENT)
-    base = expand_binop (Pmode, and_optab, base,
-                        gen_int_mode (-((GET_MODE_ALIGNMENT (SImode)
-                                         << ASAN_SHADOW_SHIFT)
-                                        / BITS_PER_UNIT), Pmode), NULL_RTX,
-                        1, OPTAB_DIRECT);
+    {
+      const HOST_WIDE_INT align
+       = (GET_MODE_ALIGNMENT (SImode) / BITS_PER_UNIT) << ASAN_SHADOW_SHIFT;
+      base = expand_binop (Pmode, and_optab, base, gen_int_mode (-align, Pmode),
+                          NULL_RTX, 1, OPTAB_DIRECT);
+    }
 
   if (use_after_return_class == -1 && pbase)
     emit_move_insn (pbase, base);