SDIO:starfive:Add the starfive private driver for SDIO
authorWilliam Qiu <william.qiu@starfivetech.com>
Fri, 9 Sep 2022 04:39:12 +0000 (12:39 +0800)
committerWilliam Qiu <william.qiu@starfivetech.com>
Fri, 9 Sep 2022 04:39:12 +0000 (12:39 +0800)
Add the starfive private driver for SDIO

Signed-off-by: William Qiu <william.qiu@starfivetech.com>
drivers/mmc/host/Kconfig
drivers/mmc/host/Makefile
drivers/mmc/host/dw_mmc-starfive.c [new file with mode: 0644]

index ccc148c..be3bab2 100644 (file)
@@ -837,6 +837,15 @@ config MMC_DW_HI3798CV200
          Synopsys DesignWare Memory Card Interface driver. Select this option
          for platforms based on HiSilicon Hi3798CV200 SoC.
 
+config MMC_DW_STARFIVE
+       tristate "StarFive specific extensions for Synopsys DW Memory Card Interface"
+       depends on MMC_DW
+       select MMC_DW_PLTFM
+       help
+         This selects support for StarFive JH7110 SoC specific extensions to the
+         Synopsys DesignWare Memory Card Interface driver. Select this option
+         for platforms based on Starfive JH7110 SoC.
+
 config MMC_DW_K3
        tristate "K3 specific extensions for Synopsys DW Memory Card Interface"
        depends on MMC_DW
index 14004cc..d5270e9 100644 (file)
@@ -51,6 +51,7 @@ thunderx-mmc-objs := cavium.o cavium-thunderx.o
 obj-$(CONFIG_MMC_CAVIUM_THUNDERX) += thunderx-mmc.o
 obj-$(CONFIG_MMC_DW)           += dw_mmc.o
 obj-$(CONFIG_MMC_DW_PLTFM)     += dw_mmc-pltfm.o
+obj-$(CONFIG_MMC_DW_STARFIVE)  += dw_mmc-starfive.o
 obj-$(CONFIG_MMC_DW_BLUEFIELD) += dw_mmc-bluefield.o
 obj-$(CONFIG_MMC_DW_EXYNOS)    += dw_mmc-exynos.o
 obj-$(CONFIG_MMC_DW_HI3798CV200) += dw_mmc-hi3798cv200.o
diff --git a/drivers/mmc/host/dw_mmc-starfive.c b/drivers/mmc/host/dw_mmc-starfive.c
new file mode 100644 (file)
index 0000000..b328e23
--- /dev/null
@@ -0,0 +1,225 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 StarFive, Inc <clivia.cai@starfivetech.com>
+ *
+ * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING
+ * CUSTOMERS WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER
+ * FOR THEM TO SAVE TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE
+ * FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY
+ * CLAIMS ARISING FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE
+ * BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION
+ * WITH THEIR PRODUCTS.
+ */
+
+
+#include <linux/clk.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mmc/host.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
+#include <linux/regulator/consumer.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+
+#include "dw_mmc.h"
+#include "dw_mmc-pltfm.h"
+
+#define ALL_INT_CLR            0x1ffff
+#define MAX_DELAY_CHAIN                32
+struct starfive_priv {
+       struct device *dev;
+       struct regmap *reg_syscon;
+       u32 syscon_offset;
+       u32 syscon_shift;
+       u32 syscon_mask;
+};
+
+static unsigned long dw_mci_starfive_caps[] = {
+       MMC_CAP_CMD23,
+       MMC_CAP_CMD23,
+       MMC_CAP_CMD23
+};
+
+static void dw_mci_starfive_set_ios(struct dw_mci *host, struct mmc_ios *ios)
+{
+       int ret;
+       unsigned int clock;
+
+       if (ios->timing == MMC_TIMING_MMC_DDR52 || ios->timing == MMC_TIMING_UHS_DDR50) {
+               clock = (ios->clock > 50000000 && ios->clock <= 52000000) ? 100000000 : ios->clock;
+               ret = clk_set_rate(host->ciu_clk, clock);
+               if (ret)
+                       dev_dbg(host->dev, "Use an external frequency divider %uHz\n", ios->clock);
+               host->bus_hz = clk_get_rate(host->ciu_clk);
+       } else {
+               dev_dbg(host->dev, "Using the internal divider\n");
+       }
+}
+
+static int dw_mci_starfive_execute_tuning(struct dw_mci_slot *slot,
+                                            u32 opcode)
+{
+       static const int grade  = MAX_DELAY_CHAIN;
+       struct dw_mci *host = slot->host;
+       struct starfive_priv *priv = host->priv;
+       int raise_point = -1, fall_point = -1;
+       int err, prev_err = -1;
+       int found = 0;
+       int i;
+       u32 regval;
+
+       for (i = 0; i < grade; i++) {
+               regval = i << priv->syscon_shift;
+               err = regmap_update_bits(priv->reg_syscon, priv->syscon_offset, priv->syscon_mask, regval);
+               if (err)
+                       return err;
+               mci_writel(host, RINTSTS, ALL_INT_CLR);
+
+               err = mmc_send_tuning(slot->mmc, opcode, NULL);
+               if (!err)
+                       found = 1;
+
+               if (i > 0) {
+                       if (err && !prev_err)
+                               fall_point = i - 1;
+                       if (!err && prev_err)
+                               raise_point = i;
+               }
+
+               if (raise_point != -1 && fall_point != -1)
+                       goto tuning_out;
+
+               prev_err = err;
+               err = 0;
+       }
+
+tuning_out:
+       if (found) {
+               if (raise_point == -1)
+                       raise_point = 0;
+               if (fall_point == -1)
+                       fall_point = grade - 1;
+               if (fall_point < raise_point) {
+                       if ((raise_point + fall_point) >
+                           (grade - 1))
+                               i = fall_point / 2;
+                       else
+                               i = (raise_point + grade - 1) / 2;
+               } else {
+                       i = (raise_point + fall_point) / 2;
+               }
+
+               regval = i << priv->syscon_shift;
+               err = regmap_update_bits(priv->reg_syscon, priv->syscon_offset, priv->syscon_mask, regval);
+               if (err)
+                       return err;
+               dev_dbg(host->dev, "Found valid delay chain! use it [delay=%d]\n", i);
+       } else {
+               dev_err(host->dev, "No valid delay chain! use default\n");
+               err = -EINVAL;
+       }
+
+       mci_writel(host, RINTSTS, ALL_INT_CLR);
+       return err;
+}
+
+static int dw_mci_starfive_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
+{
+
+       struct dw_mci_slot *slot = mmc_priv(mmc);
+       struct dw_mci *host = slot->host;
+       u32 ret;
+
+       if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330)
+               ret = gpio_direction_output(25, 0);
+       else if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180)
+               ret = gpio_direction_output(25, 1);
+       if (ret)
+               return ret;
+
+       if (!IS_ERR(mmc->supply.vqmmc)) {
+               ret = mmc_regulator_set_vqmmc(mmc, ios);
+               if (ret < 0) {
+                       dev_err(host->dev, "Regulator set error %d\n", ret);
+                       return ret;
+               }
+       }
+
+       /* We should delay 20ms wait for timing setting finished. */
+       mdelay(20);
+       return 0;
+}
+
+static int dw_mci_starfive_parse_dt(struct dw_mci *host)
+{
+       struct of_phandle_args args;
+       struct starfive_priv *priv;
+       int ret;
+
+       priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL);
+       if (!priv)
+               return -ENOMEM;
+
+       ret = of_parse_phandle_with_fixed_args(host->dev->of_node,
+                                               "starfive,sys-syscon", 3, 0, &args);
+       if (ret) {
+               dev_err(host->dev, "Failed to parse starfive,sys-syscon\n");
+               return -EINVAL;
+       }
+
+       priv->reg_syscon = syscon_node_to_regmap(args.np);
+       of_node_put(args.np);
+       if (IS_ERR(priv->reg_syscon))
+               return PTR_ERR(priv->reg_syscon);
+
+       priv->syscon_offset = args.args[0];
+       priv->syscon_shift  = args.args[1];
+       priv->syscon_mask   = args.args[2];
+
+       host->priv = priv;
+
+       return 0;
+}
+
+static const struct dw_mci_drv_data starfive_data = {
+       .caps = dw_mci_starfive_caps,
+       .num_caps = ARRAY_SIZE(dw_mci_starfive_caps),
+       .set_ios = dw_mci_starfive_set_ios,
+       .parse_dt = dw_mci_starfive_parse_dt,
+       .execute_tuning = dw_mci_starfive_execute_tuning,
+       .switch_voltage  = dw_mci_starfive_switch_voltage,
+};
+
+static int dw_mci_starfive_probe(struct platform_device *pdev)
+{
+       return dw_mci_pltfm_register(pdev, &starfive_data);
+}
+
+static int dw_mci_starfive_remove(struct platform_device *pdev)
+{
+       return dw_mci_pltfm_remove(pdev);
+}
+
+static const struct of_device_id dw_mci_starfive_match[] = {
+       { .compatible = "starfive,jh7110-sdio", },
+       {},
+};
+
+MODULE_DEVICE_TABLE(of, dw_mci_starfive_match);
+static struct platform_driver dw_mci_starfive_driver = {
+       .probe = dw_mci_starfive_probe,
+       .remove = dw_mci_starfive_remove,
+       .driver = {
+               .name = "dwmmc_starfive",
+               .probe_type = PROBE_PREFER_ASYNCHRONOUS,
+               .of_match_table = dw_mci_starfive_match,
+       },
+};
+module_platform_driver(dw_mci_starfive_driver);
+
+MODULE_DESCRIPTION("StarFive JH7110 Specific DW-MSHC Driver Extension");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:dwmmc_starfive");