arm/arm64: dts: Enable CP0 GPIOs for CN9130-CRB
authorChris Packham <chris.packham@alliedtelesis.co.nz>
Sun, 5 Dec 2021 22:56:17 +0000 (11:56 +1300)
committerGregory CLEMENT <gregory.clement@bootlin.com>
Fri, 17 Dec 2021 17:04:30 +0000 (18:04 +0100)
Enable the CP0 GPIO devices for the CN9130-CRB. This is needed for a
number of the peripheral devices to function.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
arch/arm64/boot/dts/marvell/cn9130-crb.dtsi

index 505ae69..c491e33 100644 (file)
@@ -17,6 +17,8 @@
                ethernet0 = &cp0_eth0;
                ethernet1 = &cp0_eth1;
                ethernet2 = &cp0_eth2;
+               gpio1 = &cp0_gpio1;
+               gpio2 = &cp0_gpio2;
        };
 
        memory@0 {
        };
 };
 
+&cp0_gpio1 {
+       status = "okay";
+};
+
+&cp0_gpio2 {
+       status = "okay";
+};
+
 &cp0_i2c0 {
        pinctrl-names = "default";
        pinctrl-0 = <&cp0_i2c0_pins>;