drm/i915: Fix FEC state dump

[ Upstream commit 3dfeb80b308882cc6e1f5f6c36fd9a7f4cae5fc6 ]

Stop dumping state while reading it out. We have a proper
place for that stuff.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230502143906.2401-7-ville.syrjala@linux.intel.com
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Stable-dep-of: e6861d8264cd ("drm/i915/edp: don't write to DP_LINK_BW_SET when using rate select")
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index 8d4640d0fd346b51fdb599ff79759a7ceebdf49c..8b34fa55fa1bdb71e309a130d4f8b525a25e2d36 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -258,6 +258,8 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
                intel_dump_m_n_config(pipe_config, "dp m2_n2",
                                      pipe_config->lane_count,
                                      &pipe_config->dp_m2_n2);
+               drm_dbg_kms(&i915->drm, "fec: %s\n",
+                           str_enabled_disabled(pipe_config->fec_enable));
        }
 
        drm_dbg_kms(&i915->drm, "framestart delay: %d, MSA timing delay: %d\n",

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 84bbf854337aa74a4c801575ddf0f14470cceb5a..85e2263e688deb0b1ada1ac4c6cdaff24c7270ea 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3724,17 +3724,10 @@ static void intel_ddi_read_func_ctl(struct intel_encoder *encoder,
                intel_cpu_transcoder_get_m2_n2(crtc, cpu_transcoder,
                                               &pipe_config->dp_m2_n2);
 
-               if (DISPLAY_VER(dev_priv) >= 11) {
-                       i915_reg_t dp_tp_ctl = dp_tp_ctl_reg(encoder, pipe_config);
-
+               if (DISPLAY_VER(dev_priv) >= 11)
                        pipe_config->fec_enable =
-                               intel_de_read(dev_priv, dp_tp_ctl) & DP_TP_CTL_FEC_ENABLE;
-
-                       drm_dbg_kms(&dev_priv->drm,
-                                   "[ENCODER:%d:%s] Fec status: %u\n",
-                                   encoder->base.base.id, encoder->base.name,
-                                   pipe_config->fec_enable);
-               }
+                               intel_de_read(dev_priv,
+                                             dp_tp_ctl_reg(encoder, pipe_config)) & DP_TP_CTL_FEC_ENABLE;
 
                if (dig_port->lspcon.active && intel_dp_has_hdmi_sink(&dig_port->dp))
                        pipe_config->infoframes.enable |=