hwmon: (tps23861) fix byte order in resistance register
authorAlexandru Gagniuc <mr.nuke.me@gmail.com>
Mon, 5 Sep 2022 14:28:04 +0000 (09:28 -0500)
committerGuenter Roeck <linux@roeck-us.net>
Mon, 5 Sep 2022 22:15:13 +0000 (15:15 -0700)
The tps23861 registers are little-endian, and regmap_read_bulk() does
not do byte order conversion. On BE machines, the bytes were swapped,
and the interpretation of the resistance value was incorrect.

To make it work on both big and little-endian machines, use
le16_to_cpu() to convert the resitance register to host byte order.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Fixes: fff7b8ab22554 ("hwmon: add Texas Instruments TPS23861 driver")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220905142806.110598-1-mr.nuke.me@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
drivers/hwmon/tps23861.c

index 42762e8..f7c59ff 100644 (file)
@@ -493,18 +493,20 @@ static char *tps23861_port_poe_plus_status(struct tps23861_data *data, int port)
 
 static int tps23861_port_resistance(struct tps23861_data *data, int port)
 {
-       u16 regval;
+       unsigned int raw_val;
+       __le16 regval;
 
        regmap_bulk_read(data->regmap,
                         PORT_1_RESISTANCE_LSB + PORT_N_RESISTANCE_LSB_OFFSET * (port - 1),
                         &regval,
                         2);
 
-       switch (FIELD_GET(PORT_RESISTANCE_RSN_MASK, regval)) {
+       raw_val = le16_to_cpu(regval);
+       switch (FIELD_GET(PORT_RESISTANCE_RSN_MASK, raw_val)) {
        case PORT_RESISTANCE_RSN_OTHER:
-               return (FIELD_GET(PORT_RESISTANCE_MASK, regval) * RESISTANCE_LSB) / 10000;
+               return (FIELD_GET(PORT_RESISTANCE_MASK, raw_val) * RESISTANCE_LSB) / 10000;
        case PORT_RESISTANCE_RSN_LOW:
-               return (FIELD_GET(PORT_RESISTANCE_MASK, regval) * RESISTANCE_LSB_LOW) / 10000;
+               return (FIELD_GET(PORT_RESISTANCE_MASK, raw_val) * RESISTANCE_LSB_LOW) / 10000;
        case PORT_RESISTANCE_RSN_SHORT:
        case PORT_RESISTANCE_RSN_OPEN:
        default: