arm64: dts: imx8m: Add ddr-pmu nodes
authorLeonard Crestez <leonard.crestez@nxp.com>
Thu, 4 Jul 2019 08:53:21 +0000 (11:53 +0300)
committerShawn Guo <shawnguo@kernel.org>
Sat, 3 Aug 2019 10:28:16 +0000 (12:28 +0200)
The same ddr perfomance counter IP from 8qxp is also available on imx8m
series so add it to dts.

Tested with `perf stat` and `memtester` on imx8mm-evk and obtained
plausible results.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Frank Li <frank.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mm.dtsi
arch/arm64/boot/dts/freescale/imx8mq.dtsi

index a4cefae..7e92717 100644 (file)
                        interrupt-controller;
                        interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
                };
+
+               ddr-pmu@3d800000 {
+                       compatible = "fsl,imx8mm-ddr-pmu", "fsl,imx8m-ddr-pmu";
+                       reg = <0x3d800000 0x400000>;
+                       interrupt-parent = <&gic>;
+                       interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+               };
        };
 };
index 9b82e94..19805b1 100644 (file)
                        interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-parent = <&gic>;
                };
+
+               ddr-pmu@3d800000 {
+                       compatible = "fsl,imx8mq-ddr-pmu", "fsl,imx8m-ddr-pmu";
+                       reg = <0x3d800000 0x400000>;
+                       interrupt-parent = <&gic>;
+                       interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+               };
        };
 };