arm: ls1021a: Adjust sata register default values

Updated the default sata register values to enhance the
performance and stability.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>

diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c
index deeb674..144f2c3 100644 (file)
--- a/arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c
+++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c
@@ -11,11 +11,11 @@
 
 /* port register default value */
 #define AHCI_PORT_PHY_1_CFG    0xa003fffe
-#define AHCI_PORT_PHY_2_CFG    0x28183411
-#define AHCI_PORT_PHY_3_CFG    0x0e081004
-#define AHCI_PORT_PHY_4_CFG    0x00480811
-#define AHCI_PORT_PHY_5_CFG    0x192c96a4
-#define AHCI_PORT_TRANS_CFG    0x08000025
+#define AHCI_PORT_PHY_2_CFG    0x28183414
+#define AHCI_PORT_PHY_3_CFG    0x0e080e06
+#define AHCI_PORT_PHY_4_CFG    0x064a080b
+#define AHCI_PORT_PHY_5_CFG    0x2aa86470
+#define AHCI_PORT_TRANS_CFG    0x08000029
 
 #define SATA_ECC_REG_ADDR      0x20220520
 #define SATA_ECC_DISABLE       0x00020000