setTargetDAGCombine(ISD::ADD);
setTargetDAGCombine(ISD::AssertZext);
+ if (ABI.IsO32()) {
+ // These libcalls are not available in 32-bit.
+ setLibcallName(RTLIB::SHL_I128, nullptr);
+ setLibcallName(RTLIB::SRL_I128, nullptr);
+ setLibcallName(RTLIB::SRA_I128, nullptr);
+ }
+
setMinFunctionAlignment(Subtarget.isGP64bit() ? 3 : 2);
// The arguments on the stack are defined in terms of 4-byte slots on O32
entry:
; ALL-LABEL: ashr_i128:
- ; GP32: lw $25, %call16(__ashrti3)($gp)
+ ; o32 shouldn't use TImode helpers.
+ ; GP32-NOT: lw $25, %call16(__ashrti3)($gp)
+ ; MM-NOT: lw $25, %call16(__ashrti3)($2)
; M3: sll $[[T0:[0-9]+]], $7, 0
; M3: dsrav $[[T1:[0-9]+]], $4, $7
; 64R6: jr $ra
; 64R6: or $3, $[[T13]], $[[T12]]
- ; MM: lw $25, %call16(__ashrti3)($2)
-
%r = ashr i128 %a, %b
ret i128 %r
}
entry:
; ALL-LABEL: lshr_i128:
- ; GP32: lw $25, %call16(__lshrti3)($gp)
+ ; o32 shouldn't use TImode helpers.
+ ; GP32-NOT: lw $25, %call16(__lshrti3)($gp)
+ ; MM-NOT: lw $25, %call16(__lshrti3)($2)
; M3: sll $[[T0:[0-9]+]], $7, 0
; M3: dsrlv $[[T1:[0-9]+]], $4, $7
; 64R6: jr $ra
; 64R6: seleqz $2, $[[T9]], $[[T7]]
- ; MM: lw $25, %call16(__lshrti3)($2)
-
%r = lshr i128 %a, %b
ret i128 %r
}
entry:
; ALL-LABEL: shl_i128:
- ; GP32: lw $25, %call16(__ashlti3)($gp)
+ ; o32 shouldn't use TImode helpers.
+ ; GP32-NOT: lw $25, %call16(__ashlti3)($gp)
+ ; MM-NOT: lw $25, %call16(__ashlti3)($2)
; M3: sll $[[T0:[0-9]+]], $7, 0
; M3: dsllv $[[T1:[0-9]+]], $5, $7
; 64R6: jr $ra
; 64R6: seleqz $3, $[[T9]], $[[T7]]
- ; MM: lw $25, %call16(__ashlti3)($2)
-
%r = shl i128 %a, %b
ret i128 %r
}