irqchip/loongson-pch-pic: Add suspend/resume support

Add suspend/resume support for PCH-PIC irqchip, which is needed for
upcoming suspend/hibernation.

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221020073527.541845-4-chenhuacai@loongson.cn

diff --git a/drivers/irqchip/irq-loongson-pch-pic.c b/drivers/irqchip/irq-loongson-pch-pic.c
index a26a3f5..1fd015e 100644 (file)
--- a/drivers/irqchip/irq-loongson-pch-pic.c
+++ b/drivers/irqchip/irq-loongson-pch-pic.c
@@ -15,6 +15,7 @@
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
+#include <linux/syscore_ops.h>
 
 /* Registers */
 #define PCH_PIC_MASK           0x20
@@ -42,6 +43,9 @@ struct pch_pic {
        raw_spinlock_t          pic_lock;
        u32                     vec_count;
        u32                     gsi_base;
+       u32                     saved_vec_en[PIC_REG_COUNT];
+       u32                     saved_vec_pol[PIC_REG_COUNT];
+       u32                     saved_vec_edge[PIC_REG_COUNT];
 };
 
 static struct pch_pic *pch_pic_priv[MAX_IO_PICS];
@@ -145,6 +149,7 @@ static struct irq_chip pch_pic_irq_chip = {
        .irq_ack                = pch_pic_ack_irq,
        .irq_set_affinity       = irq_chip_set_affinity_parent,
        .irq_set_type           = pch_pic_set_type,
+       .flags                  = IRQCHIP_SKIP_SET_WAKE,
 };
 
 static int pch_pic_domain_translate(struct irq_domain *d,
@@ -234,6 +239,46 @@ static void pch_pic_reset(struct pch_pic *priv)
        }
 }
 
+static int pch_pic_suspend(void)
+{
+       int i, j;
+
+       for (i = 0; i < nr_pics; i++) {
+               for (j = 0; j < PIC_REG_COUNT; j++) {
+                       pch_pic_priv[i]->saved_vec_pol[j] =
+                               readl(pch_pic_priv[i]->base + PCH_PIC_POL + 4 * j);
+                       pch_pic_priv[i]->saved_vec_edge[j] =
+                               readl(pch_pic_priv[i]->base + PCH_PIC_EDGE + 4 * j);
+                       pch_pic_priv[i]->saved_vec_en[j] =
+                               readl(pch_pic_priv[i]->base + PCH_PIC_MASK + 4 * j);
+               }
+       }
+
+       return 0;
+}
+
+static void pch_pic_resume(void)
+{
+       int i, j;
+
+       for (i = 0; i < nr_pics; i++) {
+               pch_pic_reset(pch_pic_priv[i]);
+               for (j = 0; j < PIC_REG_COUNT; j++) {
+                       writel(pch_pic_priv[i]->saved_vec_pol[j],
+                                       pch_pic_priv[i]->base + PCH_PIC_POL + 4 * j);
+                       writel(pch_pic_priv[i]->saved_vec_edge[j],
+                                       pch_pic_priv[i]->base + PCH_PIC_EDGE + 4 * j);
+                       writel(pch_pic_priv[i]->saved_vec_en[j],
+                                       pch_pic_priv[i]->base + PCH_PIC_MASK + 4 * j);
+               }
+       }
+}
+
+static struct syscore_ops pch_pic_syscore_ops = {
+       .suspend =  pch_pic_suspend,
+       .resume =  pch_pic_resume,
+};
+
 static int pch_pic_init(phys_addr_t addr, unsigned long size, int vec_base,
                        struct irq_domain *parent_domain, struct fwnode_handle *domain_handle,
                        u32 gsi_base)
@@ -266,6 +311,8 @@ static int pch_pic_init(phys_addr_t addr, unsigned long size, int vec_base,
        pch_pic_handle[nr_pics] = domain_handle;
        pch_pic_priv[nr_pics++] = priv;
 
+       register_syscore_ops(&pch_pic_syscore_ops);
+
        return 0;
 
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