Trivial simplification of many patterns.

(subsi3): Don't handle CONST_INT for operand 2.
(ashiftrt, op2 > 8): New pattern.
(lshiftrt, op2 > 8): New pattern.

From-SVN: r7479

diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 7e4d89e..c082d98 100644 (file)
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -598,7 +598,7 @@
                            (const_int 1)
                            (minus:SI (const_int 7)
                                      (and:SI
-                                      (match_operand:SI 1 "general_operand" "d")
+                                      (match_operand:SI 1 "register_operand" "d")
                                       (const_int 7)))))]
   ""
   "* { return output_btst (operands, operands[1], operands[0], insn, 7); }")
@@ -608,7 +608,7 @@
                            (const_int 1)
                            (minus:SI (const_int 31)
                                      (and:SI
-                                      (match_operand:SI 1 "general_operand" "d")
+                                      (match_operand:SI 1 "register_operand" "d")
                                       (const_int 31)))))]
   ""
   "* { return output_btst (operands, operands[1], operands[0], insn, 31); }")
@@ -618,9 +618,8 @@
 (define_insn ""
   [(set (cc0) (zero_extract (match_operand:QI 0 "nonimmediate_operand" "md")
                            (const_int 1)
-                           (match_operand:SI 1 "general_operand" "i")))]
-  "GET_CODE (operands[1]) == CONST_INT
-   && (unsigned) INTVAL (operands[1]) < 8"
+                           (match_operand:SI 1 "const_int_operand" "n")))]
+  "(unsigned) INTVAL (operands[1]) < 8"
   "*
 {
   operands[1] = gen_rtx (CONST_INT, VOIDmode, 7 - INTVAL (operands[1]));
@@ -630,8 +629,8 @@
 (define_insn ""
   [(set (cc0) (zero_extract (match_operand:SI 0 "nonimmediate_operand" "do")
                            (const_int 1)
-                           (match_operand:SI 1 "general_operand" "i")))]
-  "GET_CODE (operands[1]) == CONST_INT"
+                           (match_operand:SI 1 "const_int_operand" "n")))]
+  ""
   "*
 {
   if (GET_CODE (operands[0]) == MEM)
@@ -654,10 +653,8 @@
 ;; to reload the constant into a data register.
 (define_insn ""
   [(set (match_operand:SI 0 "push_operand" "=m")
-       (match_operand:SI 1 "general_operand" "J"))]
-  "GET_CODE (operands[1]) == CONST_INT
-   && INTVAL (operands[1]) >= -0x8000
-   && INTVAL (operands[1]) < 0x8000"
+       (match_operand:SI 1 "const_int_operand" "J"))]
+  "INTVAL (operands[1]) >= -0x8000 && INTVAL (operands[1]) < 0x8000"
   "*
 {
   if (operands[1] == const0_rtx)
@@ -2257,65 +2254,11 @@
 ;; subtract instructions
 
 (define_insn "subsi3"
-  [(set (match_operand:SI 0 "general_operand" "=m,r,!a,?d")
-       (minus:SI (match_operand:SI 1 "general_operand" "0,0,a,mrIKs")
-                 (match_operand:SI 2 "general_operand" "dIKs,mrIKs,J,0")))]
+  [(set (match_operand:SI 0 "general_operand" "=m,r")
+       (minus:SI (match_operand:SI 1 "general_operand" "0,0")
+                 (match_operand:SI 2 "general_operand" "ds,mrs")))]
   ""
-  "*
-{
-  if (! operands_match_p (operands[0], operands[1]))
-    {
-      if (operands_match_p (operands[0], operands[2]))
-       {
-#ifndef NO_ADDSUB_Q
-         if (GET_CODE (operands[1]) == CONST_INT)
-           {
-             if (INTVAL (operands[1]) > 0
-                 && INTVAL (operands[1]) <= 8)
-               return \"subq%.l %1,%0\;neg%.l %0\";
-           }
-#endif
-         return \"sub%.l %1,%0\;neg%.l %0\";
-       }
-      /* This case is matched by J, but negating -0x8000
-         in an lea would give an invalid displacement.
-        So do this specially.  */
-      if (INTVAL (operands[2]) == -0x8000)
-       return \"move%.l %1,%0\;sub%.l %2,%0\";
-#ifdef SGS
-      return \"lea %n2(%1),%0\";
-#else
-#ifdef MOTOROLA
-      return \"lea (%n2,%1),%0\";
-#else /* not MOTOROLA (MIT syntax) */
-      return \"lea %1@(%n2),%0\";
-#endif /* not MOTOROLA */
-#endif /* not SGS */
-    }
-  if (GET_CODE (operands[2]) == CONST_INT)
-    {
-#ifndef NO_ADDSUB_Q
-      if (INTVAL (operands[2]) > 0
-         && INTVAL (operands[2]) <= 8)
-       return \"subq%.l %2,%0\";
-      /* Using two subqw for 8 < N <= 16 being subtracted from an
-        address register is faster on all but 68000 */
-      if (INTVAL (operands[2]) > 8
-         && INTVAL (operands[2]) <= 16
-         && ADDRESS_REG_P (operands[0])
-         && TARGET_68020)
-       {
-         operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 8);
-         return \"subq%.w %#8,%0\;subq%.w %2,%0\";
-       }
-#endif
-      if (ADDRESS_REG_P (operands[0])
-         && INTVAL (operands[2]) >= -0x8000
-         && INTVAL (operands[2]) < 0x8000)
-       return \"sub%.w %2,%0\";
-    }
-  return \"sub%.l %2,%0\";
-}")
+  "sub%.l %2,%0")
 
 (define_insn ""
   [(set (match_operand:SI 0 "general_operand" "=a")
@@ -3029,7 +2972,8 @@
         }
       else
         {
-          operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8));          operands[1] = gen_rtx (CONST_INT, VOIDmode, logval % 8);
+         operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8));
+         operands[1] = gen_rtx (CONST_INT, VOIDmode, logval % 8);
         }
       /* This does not set condition codes in a standard way.  */
       CC_STATUS_INIT;
@@ -3418,8 +3362,8 @@
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=d")
        (ashift:SI (match_operand:SI 1 "register_operand" "0")
-                  (match_operand:SI 2 "immediate_operand" "i")))]
-  "(GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 16)"
+                  (const_int 16)))]
+  ""
   "*
 {
   CC_STATUS_INIT;
@@ -3431,8 +3375,8 @@
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=d")
        (ashift:SI (match_operand:SI 1 "register_operand" "0")
-                  (match_operand:SI 2 "immediate_operand" "i")))]
-  "(! TARGET_68020 && GET_CODE (operands[2]) == CONST_INT
+                  (match_operand:SI 2 "const_int_operand" "n")))]
+  "(! TARGET_68020
     && INTVAL (operands[2]) > 16 && INTVAL (operands[2]) <= 24)"
   "*
 {
@@ -3487,8 +3431,8 @@
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=d")
        (ashiftrt:SI (match_operand:SI 1 "register_operand" "0")
-                    (match_operand:SI 2 "immediate_operand" "i")))]
-  "(GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 16)" 
+                    (const_int 16)))]
+  ""
   "swap %0\;ext%.l %0")
 
 ;; On the 68000, this makes faster code in a special case.
@@ -3496,8 +3440,8 @@
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=d")
        (ashiftrt:SI (match_operand:SI 1 "register_operand" "0")
-                    (match_operand:SI 2 "immediate_operand" "i")))]
-  "(! TARGET_68020 && GET_CODE (operands[2]) == CONST_INT
+                    (match_operand:SI 2 "const_int_operand" "n")))]
+  "(! TARGET_68020
     && INTVAL (operands[2]) > 16 && INTVAL (operands[2]) <= 24)"
   "*
 {
@@ -3505,15 +3449,23 @@
   return \"swap %0\;asr%.w %2,%0\;ext%.l %0\";
 }")
 
+(define_insn ""
+  [(set (match_operand:SI 0 "register_operand" "=d")
+       (ashiftrt:SI (match_operand:SI 1 "register_operand" "d")
+                    (match_operand:SI 2 "const_int_operand" "M")))]
+  "TARGET_68020 && operands[0] != operands[1] && INTVAL (operands[2]) > 8"
+  "*
+{
+  operands[2] = GEN_INT (32 - INTVAL (operands[2]));
+  return \"bfexts %1{%#0:%b2},%0\";
+}")
+
 (define_insn "ashrsi3"
   [(set (match_operand:SI 0 "register_operand" "=d")
        (ashiftrt:SI (match_operand:SI 1 "register_operand" "0")
                     (match_operand:SI 2 "general_operand" "dI")))]
   ""
-  "*
-{
-  return \"asr%.l %2,%0\";
-}")
+  "asr%.l %2,%0")
 
 (define_insn "ashrhi3"
   [(set (match_operand:HI 0 "register_operand" "=d")
@@ -3545,13 +3497,14 @@
 \f
 ;; logical shift instructions
 
+
 ;; On all 68k models, this makes faster code in a special case.
 
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=d")
        (lshiftrt:SI (match_operand:SI 1 "register_operand" "0")
-                    (match_operand:SI 2 "immediate_operand" "i")))]
-  "(GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 16)" 
+                    (const_int 16)))]
+  ""
   "*
 {
   CC_STATUS_INIT;
@@ -3563,8 +3516,8 @@
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=d")
        (lshiftrt:SI (match_operand:SI 1 "register_operand" "0")
-                    (match_operand:SI 2 "immediate_operand" "i")))]
-  "(! TARGET_68020 && GET_CODE (operands[2]) == CONST_INT
+                    (match_operand:SI 2 "const_int_operand" "n")))]
+  "(! TARGET_68020
     && INTVAL (operands[2]) > 16 && INTVAL (operands[2]) <= 24)"
   "*
 {
@@ -3573,15 +3526,23 @@
   return \"clr%.w %0\;swap %0\;lsr%.w %2,%0\";
 }")
 
+(define_insn ""
+  [(set (match_operand:SI 0 "register_operand" "=d")
+       (lshiftrt:SI (match_operand:SI 1 "register_operand" "d")
+                    (match_operand:SI 2 "const_int_operand" "M")))]
+  "TARGET_68020 && operands[0] != operands[1] && INTVAL (operands[2]) > 8"
+  "*
+{
+  operands[2] = GEN_INT (32 - INTVAL (operands[2]));
+  return \"bfextu %1{%#0:%b2},%0\";
+}")
+
 (define_insn "lshrsi3"
   [(set (match_operand:SI 0 "register_operand" "=d")
        (lshiftrt:SI (match_operand:SI 1 "register_operand" "0")
                     (match_operand:SI 2 "general_operand" "dI")))]
   ""
-  "*
-{
-  return \"lsr%.l %2,%0\";
-}")
+  "lsr%.l %2,%0")
 
 (define_insn "lshrhi3"
   [(set (match_operand:HI 0 "register_operand" "=d")
@@ -3698,13 +3659,10 @@
 ;
 (define_insn ""
   [(set (zero_extract:SI (match_operand:QI 0 "nonimmediate_operand" "+o")
-                        (match_operand:SI 1 "immediate_operand" "i")
-                        (match_operand:SI 2 "immediate_operand" "i"))
+                        (const_int 32)
+                        (match_operand:SI 2 "const_int_operand" "n"))
        (match_operand:SI 3 "general_operand" "rmi"))]
   "TARGET_68020 && TARGET_BITFIELD
-   && GET_CODE (operands[1]) == CONST_INT
-   && (INTVAL (operands[1]) == 32)
-   && GET_CODE (operands[2]) == CONST_INT
    && (INTVAL (operands[2]) % 8) == 0
    && ! mode_dependent_address_p (XEXP (operands[0], 0))"
   "*
@@ -3717,13 +3675,11 @@
 
 (define_insn ""
   [(set (zero_extract:SI (match_operand:SI 0 "nonimmediate_operand" "+do")
-                        (match_operand:SI 1 "immediate_operand" "i")
-                        (match_operand:SI 2 "immediate_operand" "i"))
-       (match_operand:SI 3 "general_operand" "d"))]
+                        (match_operand:SI 1 "const_int_operand" "n")
+                        (match_operand:SI 2 "const_int_operand" "n"))
+       (match_operand:SI 3 "register_operand" "d"))]
   "TARGET_68020 && TARGET_BITFIELD
-   && GET_CODE (operands[1]) == CONST_INT
    && (INTVAL (operands[1]) == 8 || INTVAL (operands[1]) == 16)
-   && GET_CODE (operands[2]) == CONST_INT
    && INTVAL (operands[2]) % INTVAL (operands[1]) == 0
    && (GET_CODE (operands[0]) == REG
        || ! mode_dependent_address_p (XEXP (operands[0], 0)))"
@@ -3757,12 +3713,9 @@
 (define_insn ""
   [(set (match_operand:SI 0 "general_operand" "=rm")
        (zero_extract:SI (match_operand:QI 1 "nonimmediate_operand" "o")
-                        (match_operand:SI 2 "immediate_operand" "i")
-                        (match_operand:SI 3 "immediate_operand" "i")))]
+                        (const_int 32)
+                        (match_operand:SI 3 "const_int_operand" "n")))]
   "TARGET_68020 && TARGET_BITFIELD
-   && GET_CODE (operands[2]) == CONST_INT
-   && (INTVAL (operands[2]) == 32)
-   && GET_CODE (operands[3]) == CONST_INT
    && (INTVAL (operands[3]) % 8) == 0
    && ! mode_dependent_address_p (XEXP (operands[1], 0))"
   "*
@@ -3776,12 +3729,9 @@
 (define_insn ""
   [(set (match_operand:SI 0 "general_operand" "=&d")
        (zero_extract:SI (match_operand:SI 1 "nonimmediate_operand" "do")
-                        (match_operand:SI 2 "immediate_operand" "i")
-                        (match_operand:SI 3 "immediate_operand" "i")))]
+                        (match_operand:SI 2 "const_int_operand" "n")
+                        (match_operand:SI 3 "const_int_operand" "n")))]
   "TARGET_68020 && TARGET_BITFIELD
-   && GET_CODE (operands[2]) == CONST_INT
-   && (INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16)
-   && GET_CODE (operands[3]) == CONST_INT
    && INTVAL (operands[3]) % INTVAL (operands[2]) == 0
    && (GET_CODE (operands[1]) == REG
        || ! mode_dependent_address_p (XEXP (operands[1], 0)))"
@@ -3816,12 +3766,9 @@
 (define_insn ""
   [(set (match_operand:SI 0 "general_operand" "=rm")
        (sign_extract:SI (match_operand:QI 1 "nonimmediate_operand" "o")
-                        (match_operand:SI 2 "immediate_operand" "i")
-                        (match_operand:SI 3 "immediate_operand" "i")))]
+                        (const_int 32)
+                        (match_operand:SI 3 "const_int_operand" "n")))]
   "TARGET_68020 && TARGET_BITFIELD
-   && GET_CODE (operands[2]) == CONST_INT
-   && (INTVAL (operands[2]) == 32)
-   && GET_CODE (operands[3]) == CONST_INT
    && (INTVAL (operands[3]) % 8) == 0
    && ! mode_dependent_address_p (XEXP (operands[1], 0))"
   "*
@@ -3835,12 +3782,9 @@
 (define_insn ""
   [(set (match_operand:SI 0 "general_operand" "=d")
        (sign_extract:SI (match_operand:SI 1 "nonimmediate_operand" "do")
-                        (match_operand:SI 2 "immediate_operand" "i")
-                        (match_operand:SI 3 "immediate_operand" "i")))]
+                        (match_operand:SI 2 "const_int_operand" "n")
+                        (match_operand:SI 3 "const_int_operand" "n")))]
   "TARGET_68020 && TARGET_BITFIELD
-   && GET_CODE (operands[2]) == CONST_INT
-   && (INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16)
-   && GET_CODE (operands[3]) == CONST_INT
    && INTVAL (operands[3]) % INTVAL (operands[2]) == 0
    && (GET_CODE (operands[1]) == REG
        || ! mode_dependent_address_p (XEXP (operands[1], 0)))"
@@ -3897,9 +3841,8 @@
                         (match_operand:SI 1 "general_operand" "di,di")
                         (match_operand:SI 2 "general_operand" "di,di"))
         (xor:SI (zero_extract:SI (match_dup 0) (match_dup 1) (match_dup 2))
-               (match_operand 3 "immediate_operand" "i,i")))]
+               (match_operand 3 "const_int_operand" "n,n")))]
   "TARGET_68020 && TARGET_BITFIELD
-   && GET_CODE (operands[3]) == CONST_INT
    && (INTVAL (operands[3]) == -1
        || (GET_CODE (operands[1]) == CONST_INT
            && (~ INTVAL (operands[3]) & ((1 << INTVAL (operands[1]))- 1)) == 0))"
@@ -3937,7 +3880,7 @@
   [(set (zero_extract:SI (match_operand:QI 0 "nonimmediate_operand" "+o,d")
                         (match_operand:SI 1 "general_operand" "di,di")
                         (match_operand:SI 2 "general_operand" "di,di"))
-       (match_operand:SI 3 "general_operand" "d,d"))]
+       (match_operand:SI 3 "register_operand" "d,d"))]
   "TARGET_68020 && TARGET_BITFIELD"
   "bfins %3,%0{%b2:%b1}")
 
@@ -4000,7 +3943,7 @@
   [(set (zero_extract:SI (match_operand:SI 0 "nonimmediate_operand" "+d")
                         (match_operand:SI 1 "general_operand" "di")
                         (match_operand:SI 2 "general_operand" "di"))
-       (match_operand:SI 3 "general_operand" "d"))]
+       (match_operand:SI 3 "register_operand" "d"))]
   "TARGET_68020 && TARGET_BITFIELD"
   "*
 {
@@ -4021,10 +3964,9 @@
 (define_insn ""
   [(set (cc0)
        (zero_extract:SI (match_operand:QI 0 "memory_operand" "o")
-                        (match_operand:SI 1 "general_operand" "di")
+                        (match_operand:SI 1 "const_int_operand" "n")
                         (match_operand:SI 2 "general_operand" "di")))]
-  "TARGET_68020 && TARGET_BITFIELD
-   && GET_CODE (operands[1]) == CONST_INT"
+  "TARGET_68020 && TARGET_BITFIELD"
   "*
 {
   if (operands[1] == const1_rtx
@@ -4050,10 +3992,9 @@
 (define_insn ""
   [(set (cc0)
        (zero_extract:SI (match_operand:SI 0 "nonimmediate_operand" "d")
-                        (match_operand:SI 1 "general_operand" "di")
+                        (match_operand:SI 1 "const_int_operand" "n")
                         (match_operand:SI 2 "general_operand" "di")))]
-  "TARGET_68020 && TARGET_BITFIELD
-   && GET_CODE (operands[1]) == CONST_INT"
+  "TARGET_68020 && TARGET_BITFIELD"
   "*
 {
   if (operands[1] == const1_rtx
@@ -5004,10 +4945,10 @@
 
 (define_peephole
   [(set (reg:SI 15) (plus:SI (reg:SI 15)
-                            (match_operand:SI 0 "immediate_operand" "n")))
+                            (match_operand:SI 0 "const_int_operand" "n")))
    (set (match_operand:SF 1 "push_operand" "=m")
        (match_operand:SF 2 "general_operand" "rmfF"))]
-  "GET_CODE (operands[0]) == CONST_INT && INTVAL (operands[0]) >= 4
+  "INTVAL (operands[0]) >= 4
    && ! reg_mentioned_p (stack_pointer_rtx, operands[2])"
   "*
 {
@@ -5041,10 +4982,10 @@
 
 (define_peephole
   [(set (reg:SI 15) (plus:SI (reg:SI 15)
-                            (match_operand:SI 0 "immediate_operand" "n")))
+                            (match_operand:SI 0 "const_int_operand" "n")))
    (set (match_operand:SI 1 "push_operand" "=m")
        (match_operand:SI 2 "general_operand" "g"))]
-  "GET_CODE (operands[0]) == CONST_INT && INTVAL (operands[0]) >= 4
+  "INTVAL (operands[0]) >= 4
    && ! reg_mentioned_p (stack_pointer_rtx, operands[2])"
   "*
 {