+2010-03-23 Mischa Jonker <mischa.jonker@viragelogic.com>
+
+ [BZ #11291]
+ * sysdeps/mips/bits/atomic.h
+ (__arch_compare_and_exchange_xxx_32_int,
+ __arch_compare_and_exchange_xxx_64_int,
+ __arch_exchange_xxx_32_int, __arch_exchange_xxx_64_int,
+ __arch_exchange_and_add_32_int, __arch_exchange_and_add_64_int):
+ Specify *mem as asm output as well as input.
+
2010-02-10 Joseph Myers <joseph@codesourcery.com>
* sysdeps/mips/fpu/fegetenv.c: Add hidden alias.
MIPS_PUSH_MIPS2 \
rel "\n" \
"1:\t" \
- "ll %0,%4\n\t" \
+ "ll %0,%5\n\t" \
"move %1,$0\n\t" \
- "bne %0,%2,2f\n\t" \
- "move %1,%3\n\t" \
- "sc %1,%4\n\t" \
+ "bne %0,%3,2f\n\t" \
+ "move %1,%4\n\t" \
+ "sc %1,%2\n\t" \
"beqz %1,1b\n" \
acq "\n\t" \
".set pop\n" \
"2:\n\t" \
- : "=&r" (__prev), "=&r" (__cmp) \
+ : "=&r" (__prev), "=&r" (__cmp), "=m" (*mem) \
: "r" (oldval), "r" (newval), "m" (*mem) \
: "memory")
MIPS_PUSH_MIPS2 \
rel "\n" \
"1:\t" \
- "lld %0,%4\n\t" \
+ "lld %0,%5\n\t" \
"move %1,$0\n\t" \
- "bne %0,%2,2f\n\t" \
- "move %1,%3\n\t" \
- "scd %1,%4\n\t" \
+ "bne %0,%3,2f\n\t" \
+ "move %1,%4\n\t" \
+ "scd %1,%2\n\t" \
"beqz %1,1b\n" \
acq "\n\t" \
".set pop\n" \
"2:\n\t" \
- : "=&r" (__prev), "=&r" (__cmp) \
+ : "=&r" (__prev), "=&r" (__cmp), "=m" (*mem) \
: "r" (oldval), "r" (newval), "m" (*mem) \
: "memory")
#endif
MIPS_PUSH_MIPS2 \
rel "\n" \
"1:\t" \
- "ll %0,%3\n\t" \
- "move %1,%2\n\t" \
- "sc %1,%3\n\t" \
+ "ll %0,%4\n\t" \
+ "move %1,%3\n\t" \
+ "sc %1,%2\n\t" \
"beqz %1,1b\n" \
acq "\n\t" \
".set pop\n" \
"2:\n\t" \
- : "=&r" (__prev), "=&r" (__cmp) \
+ : "=&r" (__prev), "=&r" (__cmp), "=m" (*mem) \
: "r" (newval), "m" (*mem) \
: "memory"); \
__prev; })
MIPS_PUSH_MIPS2 \
rel "\n" \
"1:\n" \
- "lld %0,%3\n\t" \
- "move %1,%2\n\t" \
- "scd %1,%3\n\t" \
+ "lld %0,%4\n\t" \
+ "move %1,%3\n\t" \
+ "scd %1,%2\n\t" \
"beqz %1,1b\n" \
acq "\n\t" \
".set pop\n" \
"2:\n\t" \
- : "=&r" (__prev), "=&r" (__cmp) \
+ : "=&r" (__prev), "=&r" (__cmp), "=m" (*mem) \
: "r" (newval), "m" (*mem) \
: "memory"); \
__prev; })
MIPS_PUSH_MIPS2 \
rel "\n" \
"1:\t" \
- "ll %0,%3\n\t" \
- "addu %1,%0,%2\n\t" \
- "sc %1,%3\n\t" \
+ "ll %0,%4\n\t" \
+ "addu %1,%0,%3\n\t" \
+ "sc %1,%2\n\t" \
"beqz %1,1b\n" \
acq "\n\t" \
".set pop\n" \
"2:\n\t" \
- : "=&r" (__prev), "=&r" (__cmp) \
+ : "=&r" (__prev), "=&r" (__cmp), "=m" (*mem) \
: "r" (value), "m" (*mem) \
: "memory"); \
__prev; })
MIPS_PUSH_MIPS2 \
rel "\n" \
"1:\t" \
- "lld %0,%3\n\t" \
- "daddu %1,%0,%2\n\t" \
- "scd %1,%3\n\t" \
+ "lld %0,%4\n\t" \
+ "daddu %1,%0,%3\n\t" \
+ "scd %1,%2\n\t" \
"beqz %1,1b\n" \
acq "\n\t" \
".set pop\n" \
"2:\n\t" \
- : "=&r" (__prev), "=&r" (__cmp) \
+ : "=&r" (__prev), "=&r" (__cmp), "=m" (*mem) \
: "r" (value), "m" (*mem) \
: "memory"); \
__prev; })