reset: sunxi: document sunxi's reset controllers bindings
authorBoris BREZILLON <boris.brezillon@free-electrons.com>
Wed, 14 May 2014 12:38:15 +0000 (14:38 +0200)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Thu, 15 May 2014 08:30:53 +0000 (10:30 +0200)
Add DT bindings documentation for sunxi's reset controllers.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt b/Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt
new file mode 100644 (file)
index 0000000..c8f7757
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@@ -0,0 +1,21 @@
+Allwinner sunxi Peripheral Reset Controller
+===========================================
+
+Please also refer to reset.txt in this directory for common reset
+controller binding usage.
+
+Required properties:
+- compatible: Should be one of the following:
+  "allwinner,sun6i-a31-ahb1-reset"
+  "allwinner,sun6i-a31-clock-reset"
+- reg: should be register base and length as documented in the
+  datasheet
+- #reset-cells: 1, see below
+
+example:
+
+ahb1_rst: reset@01c202c0 {
+       #reset-cells = <1>;
+       compatible = "allwinner,sun6i-a31-ahb1-reset";
+       reg = <0x01c202c0 0xc>;
+};