ARM: dts: at91: Map MCLK for wm8731 on at91sam9g20ek

[ Upstream commit 0e486fe341fabd8e583f3d601a874cd394979c45 ]

The MCLK of the WM8731 on the AT91SAM9G20-EK board is connected to the
PCK0 output of the SoC and is expected to be set to 12MHz. Previously
this was mapped using pre-common clock API calls in the audio machine
driver but the conversion to the common clock framework broke that so
describe things in the DT instead.

Fixes: ff78a189b0ae55f ("ARM: at91: remove old at91-specific clock driver")
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220404102806.581374-2-broonie@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index 87bb39060e8becd02c140e5d5effde8fef8295f0..ca03685f0f0867237d30d473d695ec46b6b687e7 100644 (file)
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -219,6 +219,12 @@
                wm8731: wm8731@1b {
                        compatible = "wm8731";
                        reg = <0x1b>;
+
+                       /* PCK0 at 12MHz */
+                       clocks = <&pmc PMC_TYPE_SYSTEM 8>;
+                       clock-names = "mclk";
+                       assigned-clocks = <&pmc PMC_TYPE_SYSTEM 8>;
+                       assigned-clock-rates = <12000000>;
                };
        };