[VTA] [APPS] Update README on tsim example (#3409)
authorLuis Vega <vegaluisjose@users.noreply.github.com>
Fri, 21 Jun 2019 18:45:16 +0000 (11:45 -0700)
committerJared Roesch <roeschinc@gmail.com>
Fri, 21 Jun 2019 18:45:16 +0000 (11:45 -0700)
* update README

* fix typo

vta/apps/tsim_example/README.md

index 56696fe..2089166 100644 (file)
@@ -49,7 +49,9 @@ sudo apt install verilator sbt
 ## Setup in TVM
 
 1. Install `verilator` and `sbt` as described above
-2. Build [tvm](https://docs.tvm.ai/install/from_source.html#build-the-shared-library)
+2. Get tvm `git clone https://github.com/dmlc/tvm.git`
+3. Change VTA target in `tvm/vta/config/vta_config.json` from `sim` to `tsim`
+4. Build [tvm](https://docs.tvm.ai/install/from_source.html#build-the-shared-library)
 
 ## How to run VTA TSIM examples
 
@@ -62,7 +64,7 @@ how to run both of them:
     * Run `make`
 
 * Test Chisel3 backend
-    * Open `<tvm-root>/vta/apps/tsim_example`
+    * Go to `<tvm-root>/vta/apps/tsim_example`
     * Run `make run_chisel`
 
 * Some pointers