lib: sbi: Reset the mhpmevent value upon counter reset
authorAtish Patra <atish.patra@wdc.com>
Mon, 8 Nov 2021 18:53:03 +0000 (10:53 -0800)
committerAnup Patel <anup@brainfault.org>
Thu, 11 Nov 2021 12:20:32 +0000 (17:50 +0530)
The hardware solely relies on the event selector value in mhpmevent
to figure out what event to monitor using that counter. It should be
reset when counter reset happens.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
lib/sbi/sbi_pmu.c

index 818b875..1bb3e49 100644 (file)
@@ -369,6 +369,20 @@ static int pmu_ctr_stop_fw(uint32_t cidx, uint32_t fw_evt_code)
        return 0;
 }
 
+static int pmu_reset_hw_mhpmevent(int ctr_idx)
+{
+       if (ctr_idx < 3 || ctr_idx >= SBI_PMU_HW_CTR_MAX)
+               return SBI_EFAIL;
+#if __riscv_xlen == 32
+       csr_write_num(CSR_MHPMEVENT3 + ctr_idx - 3, 0);
+       csr_write_num(CSR_MHPMEVENT3H + ctr_idx - 3, 0);
+#else
+       csr_write_num(CSR_MHPMEVENT3 + ctr_idx - 3, 0);
+#endif
+
+       return 0;
+}
+
 int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
                     unsigned long flag)
 {
@@ -392,8 +406,10 @@ int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
                else
                        ret = pmu_ctr_stop_hw(cbase);
 
-               if (!ret && (flag & SBI_PMU_STOP_FLAG_RESET))
+               if (flag & SBI_PMU_STOP_FLAG_RESET) {
                        active_events[hartid][cbase] = SBI_PMU_EVENT_IDX_INVALID;
+                       pmu_reset_hw_mhpmevent(cbase);
+               }
        }
 
        return ret;