radv: merge si_write_viewport into radv_emit_viewport
authorMike Blumenkrantz <michael.blumenkrantz@gmail.com>
Fri, 9 Jul 2021 18:30:02 +0000 (14:30 -0400)
committerMarge Bot <eric+marge@anholt.net>
Fri, 16 Jul 2021 15:22:46 +0000 (15:22 +0000)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>

src/amd/vulkan/radv_cmd_buffer.c
src/amd/vulkan/radv_private.h
src/amd/vulkan/si_cmd_buffer.c

index b68e079..63c78d9 100644 (file)
@@ -1372,8 +1372,34 @@ radv_emit_graphics_pipeline(struct radv_cmd_buffer *cmd_buffer)
 static void
 radv_emit_viewport(struct radv_cmd_buffer *cmd_buffer)
 {
-   si_write_viewport(cmd_buffer->cs, 0, cmd_buffer->state.dynamic.viewport.count,
-                     cmd_buffer->state.dynamic.viewport.viewports);
+   const struct radv_viewport_state *viewport = &cmd_buffer->state.dynamic.viewport;
+   int i;
+   const unsigned count = viewport->count;
+   const unsigned first_vp = 0;
+   const VkViewport *viewports = viewport->viewports;
+
+   assert(count);
+   radeon_set_context_reg_seq(cmd_buffer->cs, R_02843C_PA_CL_VPORT_XSCALE + first_vp * 4 * 6, count * 6);
+
+   for (i = 0; i < count; i++) {
+      float scale[3], translate[3];
+
+      radv_get_viewport_xform(&viewports[i], scale, translate);
+      radeon_emit(cmd_buffer->cs, fui(scale[0]));
+      radeon_emit(cmd_buffer->cs, fui(translate[0]));
+      radeon_emit(cmd_buffer->cs, fui(scale[1]));
+      radeon_emit(cmd_buffer->cs, fui(translate[1]));
+      radeon_emit(cmd_buffer->cs, fui(scale[2]));
+      radeon_emit(cmd_buffer->cs, fui(translate[2]));
+   }
+
+   radeon_set_context_reg_seq(cmd_buffer->cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + first_vp * 4 * 2, count * 2);
+   for (i = 0; i < count; i++) {
+      float zmin = MIN2(viewports[i].minDepth, viewports[i].maxDepth);
+      float zmax = MAX2(viewports[i].minDepth, viewports[i].maxDepth);
+      radeon_emit(cmd_buffer->cs, fui(zmin));
+      radeon_emit(cmd_buffer->cs, fui(zmax));
+   }
 }
 
 static void
index b98b5cc..d15f7ba 100644 (file)
@@ -1514,8 +1514,6 @@ void si_emit_compute(struct radv_device *device, struct radeon_cmdbuf *cs);
 
 void cik_create_gfx_config(struct radv_device *device);
 
-void si_write_viewport(struct radeon_cmdbuf *cs, int first_vp, int count,
-                       const VkViewport *viewports);
 void si_write_scissors(struct radeon_cmdbuf *cs, int first, int count, const VkRect2D *scissors,
                        const VkViewport *viewports, bool can_use_guardband);
 uint32_t si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer, bool instanced_draw,
index ad4968d..b04ee11 100644 (file)
@@ -667,35 +667,6 @@ radv_get_viewport_xform(const VkViewport *viewport, float scale[3], float transl
    translate[2] = n;
 }
 
-void
-si_write_viewport(struct radeon_cmdbuf *cs, int first_vp, int count, const VkViewport *viewports)
-{
-   int i;
-
-   assert(count);
-   radeon_set_context_reg_seq(cs, R_02843C_PA_CL_VPORT_XSCALE + first_vp * 4 * 6, count * 6);
-
-   for (i = 0; i < count; i++) {
-      float scale[3], translate[3];
-
-      radv_get_viewport_xform(&viewports[i], scale, translate);
-      radeon_emit(cs, fui(scale[0]));
-      radeon_emit(cs, fui(translate[0]));
-      radeon_emit(cs, fui(scale[1]));
-      radeon_emit(cs, fui(translate[1]));
-      radeon_emit(cs, fui(scale[2]));
-      radeon_emit(cs, fui(translate[2]));
-   }
-
-   radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + first_vp * 4 * 2, count * 2);
-   for (i = 0; i < count; i++) {
-      float zmin = MIN2(viewports[i].minDepth, viewports[i].maxDepth);
-      float zmax = MAX2(viewports[i].minDepth, viewports[i].maxDepth);
-      radeon_emit(cs, fui(zmin));
-      radeon_emit(cs, fui(zmax));
-   }
-}
-
 static VkRect2D
 si_scissor_from_viewport(const VkViewport *viewport)
 {