It is preferred to use typed property access functions (i.e.
of_property_read_<type> functions) rather than low-level
of_get_property/of_find_property functions for reading properties. As
part of this, convert of_get_property/of_find_property calls to the
recently added of_property_present() helper when we just want to test
for presence of a property and nothing more.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230310144732.1546328-1-robh@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
struct lpass_macro *l_pds;
int ret;
- if (!of_find_property(dev->of_node, "power-domains", NULL))
+ if (!of_property_present(dev->of_node, "power-domains"))
return NULL;
l_pds = devm_kzalloc(dev, sizeof(*l_pds), GFP_KERNEL);
* only of_graph_parse_endpoint().
* We need to check "reg" property
*/
- if (of_get_property(ep, "reg", NULL))
+ if (of_property_present(ep, "reg"))
return info.id;
node = of_get_parent(ep);
* only of_graph_parse_endpoint().
* We need to check "reg" property
*/
- if (of_get_property(ep, "reg", NULL))
+ if (of_property_present(ep, "reg"))
return info.id;
node = of_get_parent(ep);
card->dev = &pdev->dev;
- if (of_find_property(np, "audio-routing", NULL)) {
+ if (of_property_present(np, "audio-routing")) {
card->dapm_widgets = mxs_sgtl5000_dapm_widgets;
card->num_dapm_widgets = ARRAY_SIZE(mxs_sgtl5000_dapm_widgets);
int ret, i;
/* Register the clock provider only if it's expected in the DTB */
- if (!of_find_property(dev->of_node, "#clock-cells", NULL))
+ if (!of_property_present(dev->of_node, "#clock-cells"))
return 0;
/* Get the RCLKSRC mux clock parent clock names */
for (i = 0; i < ARRAY_SIZE(of_parse_property); i++) {
sprintf(prop, "%s,%s", name, of_parse_property[i].name);
- if (of_get_property(np, prop, NULL))
+ if (of_property_present(np, prop))
flags |= of_parse_property[i].val;
}
info->flags = flags;
"Could not get x11k parent clock\n");
/* Register mclk provider if requested */
- if (of_find_property(np, "#clock-cells", NULL)) {
+ if (of_property_present(np, "#clock-cells")) {
ret = stm32_i2s_add_mclk_provider(i2s);
if (ret < 0)
return ret;
/* Get spdif iec60958 property */
sai->spdif = false;
- if (of_get_property(np, "st,iec60958", NULL)) {
+ if (of_property_present(np, "st,iec60958")) {
if (!STM_SAI_HAS_SPDIF(sai) ||
sai->dir == SNDRV_PCM_STREAM_CAPTURE) {
dev_err(&pdev->dev, "S/PDIF IEC60958 not supported\n");
return 0;
/* Register mclk provider if requested */
- if (of_find_property(np, "#clock-cells", NULL)) {
+ if (of_property_present(np, "#clock-cells")) {
ret = stm32_sai_add_mclk_provider(sai);
if (ret < 0)
return ret;
* If clock parents are not set in DT, configure here to use clk_out_1
* as mclk and extern1 as parent for Tegra30 and higher.
*/
- if (!of_find_property(dev->of_node, "assigned-clock-parents", NULL) &&
+ if (!of_property_present(dev->of_node, "assigned-clock-parents") &&
!of_machine_is_compatible("nvidia,tegra20")) {
struct clk *clk_out_1, *clk_extern1;