[AMDGPU] Reserve ELF code
authorTony <Tony.Tye@amd.com>
Mon, 22 Mar 2021 22:28:11 +0000 (22:28 +0000)
committerTony <Tony.Tye@amd.com>
Tue, 23 Mar 2021 04:30:38 +0000 (04:30 +0000)
Reserve AMD GPU ELF machine code 0x040.

Minor AMDGPUUsage format consistency change.

Reviewed By: kzhuravl

Differential Revision: https://reviews.llvm.org/D99122

llvm/docs/AMDGPUUsage.rst
llvm/include/llvm/BinaryFormat/ELF.h

index 9205c79..8926d6b 100644 (file)
@@ -1155,6 +1155,7 @@ The AMDGPU backend uses the following ELF header:
      *reserved*                           0x03d      Reserved.
      *reserved*                           0x03e      Reserved.
      ``EF_AMDGPU_MACH_AMDGCN_GFX90A``     0x03f      ``gfx90a``
+     *reserved*                           0x040      Reserved.
      ==================================== ========== =============================
 
 Sections
@@ -4104,9 +4105,9 @@ The fields used by CP for code objects before V3 also match those specified in
                                                      work-group. Granularity is
                                                      device specific:
 
-                                                     GFX6:
+                                                     GFX6
                                                        roundup(lds-size / (64 * 4))
-                                                     GFX7-GFX10:
+                                                     GFX7-GFX10
                                                        roundup(lds-size / (128 * 4))
 
      24      1 bit   ENABLE_EXCEPTION_IEEE_754_FP    Wavefront starts execution
index e414437..d6846be 100644 (file)
@@ -733,6 +733,7 @@ enum : unsigned {
   EF_AMDGPU_MACH_AMDGCN_RESERVED_0X3D = 0x03d,
   EF_AMDGPU_MACH_AMDGCN_RESERVED_0X3E = 0x03e,
   EF_AMDGPU_MACH_AMDGCN_GFX90A        = 0x03f,
+  EF_AMDGPU_MACH_AMDGCN_RESERVED_0X40 = 0x040,
 
   // First/last AMDGCN-based processors.
   EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,