GFX-DISPLAY: Fix I2C error for DV10 when resume

BZ: 30094

This patch has the following changes:
	1. Call mode setting function in late resume.
	2. Enable lvds bridge suspend.

Change-Id: I87fcc746a8478feb555b654f656edbec6ed8fe24
Signed-off-by: Geng Xiujun <xiujun.geng@intel.com>
Reviewed-on: http://android.intel.com:8080/42040
Reviewed-by: Tong, BoX <box.tong@intel.com>
Tested-by: Tong, BoX <box.tong@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>

diff --git a/drivers/staging/mrst/drv/mdfld_dsi_dpi.c b/drivers/staging/mrst/drv/mdfld_dsi_dpi.c
index 8da20a1..f1425d2 100644 (file)
--- a/drivers/staging/mrst/drv/mdfld_dsi_dpi.c
+++ b/drivers/staging/mrst/drv/mdfld_dsi_dpi.c
@@ -261,10 +261,7 @@ void dsi_set_device_ready_state(struct drm_device *dev, int state, int pipe)
        PSB_DEBUG_ENTRY("[DISPLAY TRK] %s: state = %d, pipe = %d\n",
                __func__, state, pipe);
 
-       if (state)
-               REG_WRITE((MIPIA_DEVICE_READY_REG + reg_offset), 0x00000001);
-       else
-               REG_WRITE((MIPIA_DEVICE_READY_REG + reg_offset), 0x00000000);
+       REG_FLD_MOD((DEVICE_READY_REG + reg_offset), !!state, 0, 0);
 }
 
 void dsi_send_turn_on_packet(struct drm_device *dev)
@@ -743,11 +740,35 @@ void dsi_set_pipe_plane_enable_state(struct drm_device *dev, int state, int pipe
                /*Set up display plane */
                REG_WRITE(dspcntr_reg, dspcntr);
        } else {
-               /*Disable PIPE */
+               u32 val;
+               u32 dspbase_reg = pipe ? DSPCBASE : DSPABASE;
+               u32 device_ready_reg = 0;
+
+               if (pipe) {
+                       device_ready_reg = DEVICE_READY_REG + MIPIC_REG_OFFSET;
+               } else {
+                       device_ready_reg = DEVICE_READY_REG;
+               }
+
+               /* Disable display plane */
+               REG_FLD_MOD(dspcntr_reg, 0, 31, 31);
+
+               /* Flush the plane changes ??? posted write? */
+               REG_WRITE(dspbase_reg, REG_READ(dspbase_reg));
+               REG_READ(dspbase_reg);
+
+               /* Disable PIPE */
                REG_WRITE(pipeconf_reg, 0);
                mdfld_wait_for_PIPEA_DISABLE(dev, pipe);
                mdfld_wait_for_DPI_CTRL_FIFO(dev, pipe);
 
+               /* Put DSI lanes to ULPS to disable pipe */
+               REG_FLD_MOD(device_ready_reg, 2, 2, 1);
+               REG_READ(device_ready_reg); /* posted write? */
+
+               /* LP Hold */
+               REG_FLD_MOD(dspcntr_reg, 0, 16, 16);
+               REG_READ(dspcntr_reg); /* posted write? */
        }
 }
 
@@ -766,21 +787,15 @@ static void mdfld_dsi_configure_down(struct mdfld_dsi_encoder * dsi_encoder, int
        }
 #ifdef CONFIG_SUPPORT_TOSHIBA_MIPI_LVDS_BRIDGE
        dsi_lvds_toshiba_bridge_panel_off();
-       udelay(100);
+       dsi_lvds_suspend_lvds_bridge(dev);
        dsi_lvds_deinit_lvds_bridge(dev);
-       /* dsi_lvds_suspend_lvds_bridge(dev); */
 #else
        mdfld_deinit_TOSHIBA_MIPI(dev);  /* De-init MIPI bridge and Panel */
        dsi_set_bridge_reset_state(1);  /* Pull Low Reset */
 #endif
        dsi_set_pipe_plane_enable_state(dev, 0, pipe);  /* Disable pipe and plane */
-
-       /* dsi_set_ptarget_state(dev, 0); */ /* Disable PTARGET */
-
        mdfld_dsi_dpi_shut_down(dpi_output, pipe);  /* Send shut down command */
-
        dsi_set_device_ready_state(dev, 0, pipe);  /* Clear device ready state */
-
        dev_priv->dpi_panel_on = false;
 }
 
@@ -807,9 +822,7 @@ static void mdfld_dsi_configure_up(struct mdfld_dsi_encoder * dsi_encoder, int p
 
        dsi_set_device_ready_state(dev, 1, pipe);  //Set device ready state
 #ifdef CONFIG_SUPPORT_TOSHIBA_MIPI_LVDS_BRIDGE
-       dsi_lvds_toshiba_bridge_panel_on();
-       udelay(100);
-       /* dsi_lvds_set_bridge_reset_state(0); */
+       dsi_lvds_resume_lvds_bridge(dev);
        dsi_lvds_configure_lvds_bridge(dev);
 #else
        dsi_set_bridge_reset_state(0);  /* Pull High Reset */
@@ -2205,6 +2218,7 @@ static void __mdfld_dsi_dpi_set_timing(struct mdfld_dsi_config *config,
        mutex_unlock(&config->context_lock);
 }
 
+
 void mdfld_dsi_dpi_mode_set(struct drm_encoder *encoder,
                                   struct drm_display_mode *mode,
                                   struct drm_display_mode *adjusted_mode)
@@ -2303,10 +2317,10 @@ void mdfld_dsi_dpi_mode_set(struct drm_encoder *encoder,
            else
                    REG_WRITE(mipi_reg, 0x80010000); /*0x61190 */
        }
-#endif
-
+#else
        /*set up mipi port FIXME: do at init time */
        REG_WRITE(mipi_reg, mipi);
+#endif
        REG_READ(mipi_reg);
 
        /*set up DSI controller DPI interface*/

diff --git a/drivers/staging/mrst/drv/mdfld_dsi_lvds_bridge.c b/drivers/staging/mrst/drv/mdfld_dsi_lvds_bridge.c
index db2f516..a3da3dc 100644 (file)
--- a/drivers/staging/mrst/drv/mdfld_dsi_lvds_bridge.c
+++ b/drivers/staging/mrst/drv/mdfld_dsi_lvds_bridge.c
@@ -67,30 +67,10 @@ void dsi_lvds_suspend_lvds_bridge(struct drm_device *dev)
 
        printk(KERN_INFO "[DISPLAY ] Enter %s\n", __func__);
 
-       if (gpio_direction_output(GPIO_MIPI_LCD_BL_EN, 0))
-               gpio_set_value_cansleep(GPIO_MIPI_LCD_BL_EN, 0);
-       mdelay(1);
-       if (gpio_direction_output(GPIO_MIPI_LCD_VADD, 0))
-               gpio_set_value_cansleep(GPIO_MIPI_LCD_VADD, 0);
-#ifdef CONFIG_LVDS_HARD_RESET
        if (gpio_direction_output(GPIO_MIPI_BRIDGE_RESET, 0))
                gpio_set_value_cansleep(GPIO_MIPI_BRIDGE_RESET, 0);
-#else
-       /* Put the panel in ULPS mode for S0ix. */
-       temp = REG_READ(DEVICE_READY_REG);
-       temp &= ~ULPS_MASK;
-       temp |= ENTERING_ULPS;
-       REG_WRITE(DEVICE_READY_REG, temp);
-       temp = REG_READ(DEVICE_READY_REG);
-
-       /* LP Hold */
-       temp = REG_READ(MIPI);
-       temp &= ~LP_OUTPUT_HOLD;
-       REG_WRITE(MIPI, temp);
-       temp = REG_READ(MIPI);
+       msleep(10);
 
-       mdelay(1);
-#endif
        lvds_suspend_state = true;
 }
 
@@ -103,49 +83,30 @@ void dsi_lvds_suspend_lvds_bridge(struct drm_device *dev)
 void dsi_lvds_resume_lvds_bridge(struct drm_device *dev)
 {
        u32 temp;
+
        printk(KERN_INFO "[DISPLAY ] Enter %s\n", __func__);
+
        if (gpio_direction_output(GPIO_MIPI_LCD_BL_EN, 1))
                gpio_set_value_cansleep(GPIO_MIPI_LCD_BL_EN, 1);
+
        /* VADD */
        if (gpio_direction_output(GPIO_MIPI_LCD_VADD, 1))
                gpio_set_value_cansleep(GPIO_MIPI_LCD_VADD, 1);
-       mdelay(10);
+       msleep(10);
 
-#ifdef CONFIG_LVDS_HARD_RESET
        /* RESET */
        if (gpio_direction_output(GPIO_MIPI_BRIDGE_RESET, 1))
                gpio_set_value_cansleep(GPIO_MIPI_BRIDGE_RESET, 1);
        msleep(20);
+
        if (gpio_direction_output(GPIO_MIPI_BRIDGE_RESET, 0))
                gpio_set_value_cansleep(GPIO_MIPI_BRIDGE_RESET, 0);
        msleep(20);
+
        if (gpio_direction_output(GPIO_MIPI_BRIDGE_RESET, 1))
                gpio_set_value_cansleep(GPIO_MIPI_BRIDGE_RESET, 1);
-       mdelay(20);
-#else
-       /* LP Hold Release */
-       temp = REG_READ(MIPI);
-       temp |= LP_OUTPUT_HOLD_RELEASE;
-       REG_WRITE(MIPI, temp);
-       mdelay(1);
-       temp = REG_READ(MIPI);
-
-
-       /* Set DSI host to exit from Utra Low Power State */
-       temp = REG_READ(DEVICE_READY_REG);
-
-       temp &= ~ULPS_MASK;
-       temp |= EXITING_ULPS;
-       REG_WRITE(DEVICE_READY_REG, temp);
-       mdelay(1);
-       temp = REG_READ(DEVICE_READY_REG);
-
-       temp &= ~ULPS_MASK;
-       REG_WRITE(DEVICE_READY_REG, temp);
-       mdelay(1);
-       temp = REG_READ(DEVICE_READY_REG);
+       msleep(20);
 
-#endif
        lvds_suspend_state = false;
 }
 
@@ -161,15 +122,15 @@ void dsi_lvds_set_bridge_reset_state(int state)
        if (state) {
                if (gpio_direction_output(GPIO_MIPI_BRIDGE_RESET, 0))
                        gpio_set_value_cansleep(GPIO_MIPI_BRIDGE_RESET, 0);
-               mdelay(10);
+               msleep(10);
        } else {
 
                if (gpio_direction_output(GPIO_MIPI_BRIDGE_RESET, 0))
                        gpio_set_value_cansleep(GPIO_MIPI_BRIDGE_RESET, 0);  /*Pull MIPI Bridge reset pin to Low */
-               mdelay(20);
+               msleep(20);
                if (gpio_direction_output(GPIO_MIPI_BRIDGE_RESET, 1))
                        gpio_set_value_cansleep(GPIO_MIPI_BRIDGE_RESET, 1);  /*Pull MIPI Bridge reset pin to High */
-               mdelay(40);
+               msleep(40);
        }
 }
 
@@ -251,9 +212,8 @@ void dsi_lvds_toshiba_bridge_panel_off(void)
                gpio_set_value_cansleep(GPIO_MIPI_LCD_BL_EN, 0);
        mdelay(1);
 
-       /* if (gpio_direction_output(GPIO_MIPI_LCD_VADD, 0))
-        *      gpio_set_value_cansleep(GPIO_MIPI_LCD_VADD, 0);
-        */
+       if (gpio_direction_output(GPIO_MIPI_LCD_VADD, 0))
+               gpio_set_value_cansleep(GPIO_MIPI_LCD_VADD, 0);
 }
 
 /* ************************************************************************* *\
@@ -267,7 +227,7 @@ void dsi_lvds_toshiba_bridge_panel_on(void)
 
        if (gpio_direction_output(GPIO_MIPI_LCD_VADD, 1))
                gpio_set_value_cansleep(GPIO_MIPI_LCD_VADD, 1);
-       mdelay(50);
+       msleep(260);
 
        if (gpio_direction_output(GPIO_MIPI_LCD_BL_EN, 1))
                gpio_set_value_cansleep(GPIO_MIPI_LCD_BL_EN, 1);

diff --git a/drivers/staging/mrst/drv/psb_drv.h b/drivers/staging/mrst/drv/psb_drv.h
index 19fcd0c..1bd38f5 100644 (file)
--- a/drivers/staging/mrst/drv/psb_drv.h
+++ b/drivers/staging/mrst/drv/psb_drv.h
@@ -1584,3 +1584,12 @@ do {                                            \
 } while (0)
 
 #endif
+
+#define FLD_MASK(start, end)   (((1 << ((start) - (end) + 1)) - 1) << (end))
+#define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end))
+#define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end))
+#define FLD_MOD(orig, val, start, end) \
+       (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
+
+#define REG_FLD_MOD(reg, val, start, end) \
+       REG_WRITE(reg, FLD_MOD(REG_READ(reg), val, start, end))

diff --git a/drivers/staging/mrst/drv/psb_powermgmt.c b/drivers/staging/mrst/drv/psb_powermgmt.c
index 00c0052..d24fb27 100644 (file)
--- a/drivers/staging/mrst/drv/psb_powermgmt.c
+++ b/drivers/staging/mrst/drv/psb_powermgmt.c
@@ -40,6 +40,7 @@
 #include <asm/intel_scu_ipc.h>
 #include "psb_intel_hdmi.h"
 #include "mdfld_ti_tpd.h"
+#include "mdfld_dsi_dpi.h"
 #ifdef CONFIG_GFX_RTPM
 #include <linux/pm_runtime.h>
 #endif
@@ -1807,6 +1808,7 @@ static void gfx_late_resume(struct early_suspend *h)
        struct drm_device *dev = dev_priv->dev;
        struct drm_encoder *encoder;
        struct drm_encoder_helper_funcs *enc_funcs;
+       struct drm_crtc *crtc = NULL;
        u32 dspcntr_val;
 #ifdef OSPM_GFX_DPK
        printk(KERN_ALERT "\ngfx_late_resume\n");
@@ -1836,26 +1838,37 @@ static void gfx_late_resume(struct early_suspend *h)
                                (dev_priv->panel_id == AUO_SC1_VID) ||
                                /* SC1 setting */
                                (dev_priv->panel_id == AUO_SC1_CMD)) {
-#if    defined(CONFIG_SUPPORT_TOSHIBA_MIPI_DISPLAY) || defined(CONFIG_SUPPORT_TOSHIBA_MIPI_LVDS_BRIDGE)
-                               if (dev_priv->encoder0 &&
-                                       (dev_priv->panel_desc & DISPLAY_A))
-                                       mdfld_dsi_dpi_set_power(
-                                               dev_priv->encoder0, true);
-                               if (dev_priv->encoder2 &&
-                                       (dev_priv->panel_desc & DISPLAY_C))
-                                       mdfld_dsi_dpi_set_power(
-                                               dev_priv->encoder2, true);
-#else
-                               list_for_each_entry(encoder,
-                                       &dev->mode_config.encoder_list,
-                                       head) {
-                                       enc_funcs = encoder->helper_private;
-                                       if (!drm_helper_encoder_in_use(encoder))
-                                               continue;
-                                       if (enc_funcs && enc_funcs->restore)
-                                               enc_funcs->restore(encoder);
-                       }
-#endif
+                               if (get_panel_type(dev, 0) == TMD_VID) {
+                                       if (dev_priv->encoder0 &&
+                                                       (dev_priv->panel_desc & DISPLAY_A)) {
+                                               encoder = &dev_priv->encoder0->base;
+                                               crtc = encoder->crtc;
+                                               if (crtc)
+                                                       mdfld_dsi_dpi_mode_set(encoder,
+                                                                       &crtc->mode, &crtc->hwmode);
+                                               mdfld_dsi_dpi_set_power(encoder, true);
+                                       }
+                                       if (dev_priv->encoder2 &&
+                                                       (dev_priv->panel_desc & DISPLAY_C)) {
+                                               encoder = &dev_priv->encoder2->base;
+                                               crtc = encoder->crtc;
+                                               if (crtc)
+                                                       mdfld_dsi_dpi_mode_set(encoder,
+                                                                       &crtc->mode, &crtc->hwmode);
+                                               mdfld_dsi_dpi_set_power(
+                                                               dev_priv->encoder2, true);
+                                       }
+                               } else {
+                                       list_for_each_entry(encoder,
+                                                       &dev->mode_config.encoder_list,
+                                                       head) {
+                                               enc_funcs = encoder->helper_private;
+                                               if (!drm_helper_encoder_in_use(encoder))
+                                                       continue;
+                                               if (enc_funcs && enc_funcs->restore)
+                                                       enc_funcs->restore(encoder);
+                                       }
+                               }
                        } else if (dev_priv->panel_id == TPO_CMD) {
                                if (dev_priv->encoder0 &&
                                        (dev_priv->panel_desc & DISPLAY_A))