[SCSI] ipr: fix transition to operational for new adapters
authorWayne Boyer <wayneb@linux.vnet.ibm.com>
Wed, 14 Jul 2010 17:49:43 +0000 (10:49 -0700)
committerJames Bottomley <James.Bottomley@suse.de>
Wed, 28 Jul 2010 14:05:39 +0000 (09:05 -0500)
The method of transitioning to operational for new adapters includes using
initialization stages.  The current stage is indicated via a register read.
The final good stage in the sequence is "operational" but does not necessarily
indicate that the driver can proceed.  There is another bit that gets set in the
adapter->host interrupt register when the adapter has completed enough of its
bringup such that it can accept commands.  The driver was not checking that
bit before proceeding which led to intermittent errors and adapter resets.

The fix is to check the "transition to operational" bit in the interrupt
register after detecting that the initialization stage is "operational" and
only proceed if both are set.

Signed-off-by: Wayne Boyer <wayneb@linux.vnet.ibm.com>
Acked-by: Brian King <brking@linux.vnet.ibm.com>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
drivers/scsi/ipr.c

index ce839c8..f73007d 100644 (file)
@@ -7169,12 +7169,15 @@ static int ipr_reset_next_stage(struct ipr_cmnd *ipr_cmd)
                stage_time = ioa_cfg->transop_timeout;
                ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
        } else if (stage == IPR_IPL_INIT_STAGE_TRANSOP) {
-               ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
-               maskval = IPR_PCII_IPL_STAGE_CHANGE;
-               maskval = (maskval << 32) | IPR_PCII_IOA_TRANS_TO_OPER;
-               writeq(maskval, ioa_cfg->regs.set_interrupt_mask_reg);
-               int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
-               return IPR_RC_JOB_CONTINUE;
+               int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
+               if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
+                       ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
+                       maskval = IPR_PCII_IPL_STAGE_CHANGE;
+                       maskval = (maskval << 32) | IPR_PCII_IOA_TRANS_TO_OPER;
+                       writeq(maskval, ioa_cfg->regs.set_interrupt_mask_reg);
+                       int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
+                       return IPR_RC_JOB_CONTINUE;
+               }
        }
 
        ipr_cmd->timer.data = (unsigned long) ipr_cmd;