ARM: dts: stm32: Add CM4 reserved memory, rproc and IPCC on DHCOR SoM
authorMarek Vasut <marex@denx.de>
Tue, 11 Jan 2022 02:48:02 +0000 (03:48 +0100)
committerAlexandre Torgue <alexandre.torgue@foss.st.com>
Fri, 25 Feb 2022 09:53:15 +0000 (10:53 +0100)
Add reserved memory nodes for CortexM4 on the STM32MP1 DHCOR SoM, enable
rproc to control the CM4 and IPCC mailbox to interact with it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi

index 44ecc47..6336c3c 100644 (file)
                device_type = "memory";
                reg = <0xc0000000 0x40000000>;
        };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               mcuram2: mcuram2@10000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x10000000 0x40000>;
+                       no-map;
+               };
+
+               vdev0vring0: vdev0vring0@10040000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x10040000 0x1000>;
+                       no-map;
+               };
+
+               vdev0vring1: vdev0vring1@10041000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x10041000 0x1000>;
+                       no-map;
+               };
+
+               vdev0buffer: vdev0buffer@10042000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x10042000 0x4000>;
+                       no-map;
+               };
+
+               mcuram: mcuram@30000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x30000000 0x40000>;
+                       no-map;
+               };
+
+               retram: retram@38000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x38000000 0x10000>;
+                       no-map;
+               };
+       };
 };
 
 &crc1 {
        };
 };
 
+&ipcc {
+       status = "okay";
+};
+
 &iwdg2 {
        timeout-sec = <32>;
        status = "okay";
 };
 
+&m4_rproc {
+       memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
+                       <&vdev0vring1>, <&vdev0buffer>;
+       mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
+       mbox-names = "vq0", "vq1", "shutdown";
+       interrupt-parent = <&exti>;
+       interrupts = <68 1>;
+       status = "okay";
+};
+
 &pwr_regulators {
        vdd-supply = <&vdd>;
        vdd_3v3_usbfs-supply = <&vdd_usb>;