* config/m68hc11/larith.asm (L_regs_frame): New for _.frame.

	Put the soft registers in bss for 68HC12.
	(L_regs_d3_4): New for _.d3 and _.d4.
	(L_regs_d5_6): Likewise.
	(L_regs_d1_2): Likewise.
	* config/m68hc11/t-m68hc11-gas (T_CPPFLAGS): Compile new parts.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@41846 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fbd7d2b..7d28d81 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,14 @@
 2001-05-04  Stephane Carrez  <Stephane.Carrez@worldnet.fr>
 
+       * config/m68hc11/larith.asm (L_regs_frame): New for _.frame.
+       Put the soft registers in bss for 68HC12.
+       (L_regs_d3_4): New for _.d3 and _.d4.
+       (L_regs_d5_6): Likewise.
+       (L_regs_d1_2): Likewise.
+       * config/m68hc11/t-m68hc11-gas (T_CPPFLAGS): Compile new parts. 
+
+2001-05-04  Stephane Carrez  <Stephane.Carrez@worldnet.fr>
+
        * config/m68hc11/m68hc11.h (CPP_SPEC): Pass -D__HAVE_SHORT_DOUBLE__
        to the pre-processor when -fshort-double is specified.
        * config/m68hc11/m68hc11.2 (CPP_SPEC): Likewise.

diff --git a/gcc/config/m68hc11/larith.asm b/gcc/config/m68hc11/larith.asm
index 07f09ea..e7b486c 100644 (file)
--- a/gcc/config/m68hc11/larith.asm
+++ b/gcc/config/m68hc11/larith.asm
@@ -52,38 +52,69 @@ NAME:       .word 0;                        \
 #else
        .sect .page0
 #endif
-       .globl _.tmp,_.frame
+       .globl _.tmp
        .globl _.z,_.xy
 REG(_.tmp)
 REG(_.z)
 REG(_.xy)
-REG(_.frame)
 
 #endif
 
-#ifdef L_regs_d1_8
-/* Pseudo hard registers used by gcc.
-   They must be located in page0. 
-   They will normally appear at the end of .page0 section.  */
+#ifdef L_regs_frame
 #ifdef mc68hc12
        .sect .bss
 #else
        .sect .page0
 #endif
-       .globl _.d1,_.d2,_.d3,_.d4,_.d5,_.d6
-       .globl _.d7,_.d8
+       .globl _.frame
+REG(_.frame)
+#endif
+
+#ifdef L_regs_d1_2
+#ifdef mc68hc12
+       .sect .bss
+#else
+       .sect .page0
+#endif
+       .globl _.d1,_.d2
 REG(_.d1)
 REG(_.d2)
+#endif
+
+#ifdef L_regs_d3_4
+#ifdef mc68hc12
+       .sect .bss
+#else
+       .sect .page0
+#endif
+       .globl _.d3,_.d4
 REG(_.d3)
 REG(_.d4)
+#endif
+
+#ifdef L_regs_d5_6
+#ifdef mc68hc12
+       .sect .bss
+#else
+       .sect .page0
+#endif
+       .globl _.d5,_.d6
 REG(_.d5)
 REG(_.d6)
+#endif
+
+#ifdef L_regs_d7_8
+#ifdef mc68hc12
+       .sect .bss
+#else
+       .sect .page0
+#endif
+       .globl _.d7,_.d8
 REG(_.d7)
 REG(_.d8)
-
 #endif
 
-#ifdef L_regs_d8_16
+#ifdef L_regs_d9_16
 /* Pseudo hard registers used by gcc.
    They must be located in page0. 
    They will normally appear at the end of .page0 section.  */

diff --git a/gcc/config/m68hc11/t-m68hc11-gas b/gcc/config/m68hc11/t-m68hc11-gas
index ec4b59e..9ee3c31 100644 (file)
--- a/gcc/config/m68hc11/t-m68hc11-gas
+++ b/gcc/config/m68hc11/t-m68hc11-gas
@@ -21,7 +21,8 @@ LIB1ASMFUNCS = _mulsi3 \
        _mulqi3 _ashlsi3 _ashrsi3 _lshrsi3 \
        _divmodhi4 _mulhi3 _mulhi32 \
        _memcpy _memset _negsi2 _one_cmplsi2 \
-       _regs_min _regs_d1_8 _regs_d8_16 _regs_d17_32 \
+       _regs_min _regs_frame _regs_d1_2 \
+       _regs_d3_4 _regs_d5_6 _regs_d7_8 _regs_d9_16 _regs_d17_32 \
        _premain __exit _abort _cleanup \
        _adddi3 _subdi3 _notdi2 \
        _ashrhi3 _lshrhi3 _lshlhi3 _ashrqi3 _lshlqi3 _map_data _init_bss