net/mlx5: Support setting access rights of dma addresses
authorEli Cohen <eli@mellanox.com>
Wed, 15 Jul 2020 04:28:32 +0000 (21:28 -0700)
committerSaeed Mahameed <saeedm@mellanox.com>
Thu, 16 Jul 2020 05:21:29 +0000 (22:21 -0700)
mlx5_fill_page_frag_array() is used to populate dma addresses to
resources that require it, such as QPs, RQs etc. When the resource is
used, PA list permissions are ignored. For resources that use MTT list,
the user is required to provide the access rights. Subsequent patches
use resources that require MTT lists, so modify API and implementation
to support that.

Signed-off-by: Eli Cohen <eli@mellanox.com>
Reviewed-by: Parav Pandit <parav@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/alloc.c
include/linux/mlx5/driver.h
include/linux/mlx5/mlx5_ifc.h

index 42198e6..8db4b5f 100644 (file)
@@ -299,11 +299,18 @@ void mlx5_fill_page_array(struct mlx5_frag_buf *buf, __be64 *pas)
 }
 EXPORT_SYMBOL_GPL(mlx5_fill_page_array);
 
-void mlx5_fill_page_frag_array(struct mlx5_frag_buf *buf, __be64 *pas)
+void mlx5_fill_page_frag_array_perm(struct mlx5_frag_buf *buf, __be64 *pas, u8 perm)
 {
        int i;
 
+       WARN_ON(perm & 0xfc);
        for (i = 0; i < buf->npages; i++)
-               pas[i] = cpu_to_be64(buf->frags[i].map);
+               pas[i] = cpu_to_be64(buf->frags[i].map | perm);
+}
+EXPORT_SYMBOL_GPL(mlx5_fill_page_frag_array_perm);
+
+void mlx5_fill_page_frag_array(struct mlx5_frag_buf *buf, __be64 *pas)
+{
+       mlx5_fill_page_frag_array_perm(buf, pas, 0);
 }
 EXPORT_SYMBOL_GPL(mlx5_fill_page_frag_array);
index 13c0e45..f2557d7 100644 (file)
@@ -971,6 +971,7 @@ void mlx5_register_debugfs(void);
 void mlx5_unregister_debugfs(void);
 
 void mlx5_fill_page_array(struct mlx5_frag_buf *buf, __be64 *pas);
+void mlx5_fill_page_frag_array_perm(struct mlx5_frag_buf *buf, __be64 *pas, u8 perm);
 void mlx5_fill_page_frag_array(struct mlx5_frag_buf *frag_buf, __be64 *pas);
 int mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn,
                    unsigned int *irqn);
index 3786888..5890e5c 100644 (file)
@@ -10653,4 +10653,10 @@ struct mlx5_ifc_tls_progress_params_bits {
        u8         hw_offset_record_number[0x18];
 };
 
+enum {
+       MLX5_MTT_PERM_READ      = 1 << 0,
+       MLX5_MTT_PERM_WRITE     = 1 << 1,
+       MLX5_MTT_PERM_RW        = MLX5_MTT_PERM_READ | MLX5_MTT_PERM_WRITE,
+};
+
 #endif /* MLX5_IFC_H */