[LoongArch] Add missing dollar prefix to register name in InstPrinter

This patch adds a '$' prefix to register name in InstPrinter that I missed in initial patches.

Reviewed By: xen0n

Differential Revision: https://reviews.llvm.org/D119813

diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
index 1a5b44e..6618386 100644 (file)
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
@@ -35,7 +35,7 @@ void LoongArchInstPrinter::printInst(const MCInst *MI, uint64_t Address,
 }
 
 void LoongArchInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
-  O << getRegisterName(RegNo);
+  O << '$' << getRegisterName(RegNo);
 }
 
 void LoongArchInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,

diff --git a/llvm/test/CodeGen/LoongArch/1ri.mir b/llvm/test/CodeGen/LoongArch/1ri.mir
index d267e38..537fe07 100644 (file)
--- a/llvm/test/CodeGen/LoongArch/1ri.mir
+++ b/llvm/test/CodeGen/LoongArch/1ri.mir
@@ -16,7 +16,7 @@
 ---
 # CHECK-LABEL: test_LU12I_W:
 # CHECK-ENC: 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 1 0 0
-# CHECK-ASM: lu12i.w   a0, 49
+# CHECK-ASM: lu12i.w   $a0, 49
 name: test_LU12I_W
 body: |
   bb.0:
@@ -25,7 +25,7 @@ body: |
 ---
 # CHECK-LABEL: test_LU32I_D:
 # CHECK-ENC: 0 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0
-# CHECK-ASM: lu32i.d   a0, 196
+# CHECK-ASM: lu32i.d   $a0, 196
 name: test_LU32I_D
 body: |
   bb.0:
@@ -34,7 +34,7 @@ body: |
 ---
 # CHECK-LABEL: test_PCADDI:
 # CHECK-ENC: 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 0 1 1 0 0 1 0 0
-# CHECK-ASM: pcaddi    a0, 187
+# CHECK-ASM: pcaddi    $a0, 187
 name: test_PCADDI
 body: |
   bb.0:
@@ -43,7 +43,7 @@ body: |
 ---
 # CHECK-LABEL: test_PCALAU12I:
 # CHECK-ENC: 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 0 1 0 0 1 0 0
-# CHECK-ASM: pcalau12i a0, 89
+# CHECK-ASM: pcalau12i $a0, 89
 name: test_PCALAU12I
 body: |
   bb.0:
@@ -52,7 +52,7 @@ body: |
 ---
 # CHECK-LABEL: test_PCADDU12I:
 # CHECK-ENC: 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: pcaddu12i a0, 37
+# CHECK-ASM: pcaddu12i $a0, 37
 name: test_PCADDU12I
 body: |
   bb.0:
@@ -61,7 +61,7 @@ body: |
 ---
 # CHECK-LABEL: test_PCADDU18I:
 # CHECK-ENC: 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 0 0 1 0 0
-# CHECK-ASM: pcaddu18i a0, 26
+# CHECK-ASM: pcaddu18i $a0, 26
 name: test_PCADDU18I
 body: |
   bb.0:
@@ -80,7 +80,7 @@ body: |
 ---
 # CHECK-LABEL: test_BEQZ:
 # CHECK-ENC: 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 0 0 1 0 0 0 0 0 0 0
-# CHECK-ASM: beqz      a0, 23
+# CHECK-ASM: beqz      $a0, 23
 name: test_BEQZ
 body: |
   bb.0:
@@ -89,7 +89,7 @@ body: |
 ---
 # CHECK-LABEL: test_BNEZ:
 # CHECK-ENC: 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 0 0 0 0 0 0
-# CHECK-ASM: bnez      a0, 21
+# CHECK-ASM: bnez      $a0, 21
 name: test_BNEZ
 body: |
   bb.0:

diff --git a/llvm/test/CodeGen/LoongArch/2r.mir b/llvm/test/CodeGen/LoongArch/2r.mir
index 93bb541..4889445 100644 (file)
--- a/llvm/test/CodeGen/LoongArch/2r.mir
+++ b/llvm/test/CodeGen/LoongArch/2r.mir
@@ -16,7 +16,7 @@
 ---
 # CHECK-LABEL: test_CLO_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: clo.w     a0, a1
+# CHECK-ASM: clo.w     $a0, $a1
 name: test_CLO_W
 body: |
   bb.0:
@@ -25,7 +25,7 @@ body: |
 ---
 # CHECK-LABEL: test_CLZ_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: clz.w     a0, a1
+# CHECK-ASM: clz.w     $a0, $a1
 name: test_CLZ_W
 body: |
   bb.0:
@@ -34,7 +34,7 @@ body: |
 ---
 # CHECK-LABEL: test_CTO_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: cto.w     a0, a1
+# CHECK-ASM: cto.w     $a0, $a1
 name: test_CTO_W
 body: |
   bb.0:
@@ -43,7 +43,7 @@ body: |
 ---
 # CHECK-LABEL: test_CTZ_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ctz.w     a0, a1
+# CHECK-ASM: ctz.w     $a0, $a1
 name: test_CTZ_W
 body: |
   bb.0:
@@ -52,7 +52,7 @@ body: |
 ---
 # CHECK-LABEL: test_CLO_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: clo.d     a0, a1
+# CHECK-ASM: clo.d     $a0, $a1
 name: test_CLO_D
 body: |
   bb.0:
@@ -61,7 +61,7 @@ body: |
 ---
 # CHECK-LABEL: test_CLZ_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: clz.d     a0, a1
+# CHECK-ASM: clz.d     $a0, $a1
 name: test_CLZ_D
 body: |
   bb.0:
@@ -70,7 +70,7 @@ body: |
 ---
 # CHECK-LABEL: test_CTO_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: cto.d     a0, a1
+# CHECK-ASM: cto.d     $a0, $a1
 name: test_CTO_D
 body: |
   bb.0:
@@ -79,7 +79,7 @@ body: |
 ---
 # CHECK-LABEL: test_CTZ_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ctz.d     a0, a1
+# CHECK-ASM: ctz.d     $a0, $a1
 name: test_CTZ_D
 body: |
   bb.0:
@@ -88,7 +88,7 @@ body: |
 ---
 # CHECK-LABEL: test_REVB_2H:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: revb.2h   a0, a1
+# CHECK-ASM: revb.2h   $a0, $a1
 name: test_REVB_2H
 body: |
   bb.0:
@@ -97,7 +97,7 @@ body: |
 ---
 # CHECK-LABEL: test_REVB_4H:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: revb.4h   a0, a1
+# CHECK-ASM: revb.4h   $a0, $a1
 name: test_REVB_4H
 body: |
   bb.0:
@@ -106,7 +106,7 @@ body: |
 ---
 # CHECK-LABEL: test_REVB_2W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: revb.2w   a0, a1
+# CHECK-ASM: revb.2w   $a0, $a1
 name: test_REVB_2W
 body: |
   bb.0:
@@ -115,7 +115,7 @@ body: |
 ---
 # CHECK-LABEL: test_REVB_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: revb.d    a0, a1
+# CHECK-ASM: revb.d    $a0, $a1
 name: test_REVB_D
 body: |
   bb.0:
@@ -124,7 +124,7 @@ body: |
 ---
 # CHECK-LABEL: test_REVH_2W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: revh.2w   a0, a1
+# CHECK-ASM: revh.2w   $a0, $a1
 name: test_REVH_2W
 body: |
   bb.0:
@@ -133,7 +133,7 @@ body: |
 ---
 # CHECK-LABEL: test_REVH_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: revh.d    a0, a1
+# CHECK-ASM: revh.d    $a0, $a1
 name: test_REVH_D
 body: |
   bb.0:
@@ -142,7 +142,7 @@ body: |
 ---
 # CHECK-LABEL: test_BITREV_4B:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: bitrev.4b a0, a1
+# CHECK-ASM: bitrev.4b $a0, $a1
 name: test_BITREV_4B
 body: |
   bb.0:
@@ -151,7 +151,7 @@ body: |
 ---
 # CHECK-LABEL: test_BITREV_8B:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: bitrev.8b a0, a1
+# CHECK-ASM: bitrev.8b $a0, $a1
 name: test_BITREV_8B
 body: |
   bb.0:
@@ -160,7 +160,7 @@ body: |
 ---
 # CHECK-LABEL: test_BITREV_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: bitrev.w  a0, a1
+# CHECK-ASM: bitrev.w  $a0, $a1
 name: test_BITREV_W
 body: |
   bb.0:
@@ -169,7 +169,7 @@ body: |
 ---
 # CHECK-LABEL: test_BITREV_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: bitrev.d  a0, a1
+# CHECK-ASM: bitrev.d  $a0, $a1
 name: test_BITREV_D
 body: |
   bb.0:
@@ -178,7 +178,7 @@ body: |
 ---
 # CHECK-LABEL: test_EXT_W_H:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ext.w.h   a0, a1
+# CHECK-ASM: ext.w.h   $a0, $a1
 name: test_EXT_W_H
 body: |
   bb.0:
@@ -187,7 +187,7 @@ body: |
 ---
 # CHECK-LABEL: test_EXT_W_B:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ext.w.b   a0, a1
+# CHECK-ASM: ext.w.b   $a0, $a1
 name: test_EXT_W_B
 body: |
   bb.0:
@@ -196,7 +196,7 @@ body: |
 ---
 # CHECK-LABEL: test_CPUCFG:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: cpucfg    a0, a1
+# CHECK-ASM: cpucfg    $a0, $a1
 name: test_CPUCFG
 body: |
   bb.0:
@@ -205,7 +205,7 @@ body: |
 ---
 # CHECK-LABEL: test_RDTIMEL_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: rdtimel.w a0, a1
+# CHECK-ASM: rdtimel.w $a0, $a1
 name: test_RDTIMEL_W
 body: |
   bb.0:
@@ -214,7 +214,7 @@ body: |
 ---
 # CHECK-LABEL: test_RDTIMEH_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: rdtimeh.w a0, a1
+# CHECK-ASM: rdtimeh.w $a0, $a1
 name: test_RDTIMEH_W
 body: |
   bb.0:
@@ -223,7 +223,7 @@ body: |
 ---
 # CHECK-LABEL: test_RDTIME_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: rdtime.d  a0, a1
+# CHECK-ASM: rdtime.d  $a0, $a1
 name: test_RDTIME_D
 body: |
   bb.0:

diff --git a/llvm/test/CodeGen/LoongArch/2ri.mir b/llvm/test/CodeGen/LoongArch/2ri.mir
index cef682b..15a2759 100644 (file)
--- a/llvm/test/CodeGen/LoongArch/2ri.mir
+++ b/llvm/test/CodeGen/LoongArch/2ri.mir
@@ -16,7 +16,7 @@
 ---
 # CHECK-LABEL: test_SLLI_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: slli.w    a0, a1, 0
+# CHECK-ASM: slli.w    $a0, $a1, 0
 name: test_SLLI_W
 body: |
   bb.0:
@@ -25,7 +25,7 @@ body: |
 ---
 # CHECK-LABEL: test_SRLI_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 1 1 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: srli.w    a0, a1, 30
+# CHECK-ASM: srli.w    $a0, $a1, 30
 name: test_SRLI_W
 body: |
   bb.0:
@@ -34,7 +34,7 @@ body: |
 ---
 # CHECK-LABEL: test_SRAI_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 0 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: srai.w    a0, a1, 24
+# CHECK-ASM: srai.w    $a0, $a1, 24
 name: test_SRAI_W
 body: |
   bb.0:
@@ -43,7 +43,7 @@ body: |
 ---
 # CHECK-LABEL: test_ROTRI_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 0 1 1 0 1 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: rotri.w   a0, a1, 23
+# CHECK-ASM: rotri.w   $a0, $a1, 23
 name: test_ROTRI_W
 body: |
   bb.0:
@@ -62,7 +62,7 @@ body: |
 ---
 # CHECK-LABEL: test_SLLI_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 1 0 0 1 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: slli.d    a0, a1, 39
+# CHECK-ASM: slli.d    $a0, $a1, 39
 name: test_SLLI_D
 body: |
   bb.0:
@@ -71,7 +71,7 @@ body: |
 ---
 # CHECK-LABEL: test_SRLI_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: srli.d    a0, a1, 38
+# CHECK-ASM: srli.d    $a0, $a1, 38
 name: test_SRLI_D
 body: |
   bb.0:
@@ -80,7 +80,7 @@ body: |
 ---
 # CHECK-LABEL: test_SRAI_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 1 1 0 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: srai.d    a0, a1, 27
+# CHECK-ASM: srai.d    $a0, $a1, 27
 name: test_SRAI_D
 body: |
   bb.0:
@@ -89,7 +89,7 @@ body: |
 ---
 # CHECK-LABEL: test_ROTRI_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 1 0 0 0 1 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: rotri.d   a0, a1, 7
+# CHECK-ASM: rotri.d   $a0, $a1, 7
 name: test_ROTRI_D
 body: |
   bb.0:
@@ -108,7 +108,7 @@ body: |
 ---
 # CHECK-LABEL: test_SLTI:
 # CHECK-ENC: 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 1 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: slti      a0, a1, 235
+# CHECK-ASM: slti      $a0, $a1, 235
 name: test_SLTI
 body: |
   bb.0:
@@ -117,7 +117,7 @@ body: |
 ---
 # CHECK-LABEL: test_SLTUI:
 # CHECK-ENC: 0 0 0 0 0 0 1 0 0 1 0 0 0 0 1 0 1 0 0 0 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: sltui     a0, a1, 162
+# CHECK-ASM: sltui     $a0, $a1, 162
 name: test_SLTUI
 body: |
   bb.0:
@@ -126,7 +126,7 @@ body: |
 ---
 # CHECK-LABEL: test_ADDI_W:
 # CHECK-ENC: 0 0 0 0 0 0 1 0 1 0 0 0 0 0 1 1 1 1 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: addi.w    a0, a1, 246
+# CHECK-ASM: addi.w    $a0, $a1, 246
 name: test_ADDI_W
 body: |
   bb.0:
@@ -135,7 +135,7 @@ body: |
 ---
 # CHECK-LABEL: test_ADDI_D:
 # CHECK-ENC: 0 0 0 0 0 0 1 0 1 1 0 0 0 0 0 1 0 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: addi.d    a0, a1, 75
+# CHECK-ASM: addi.d    $a0, $a1, 75
 name: test_ADDI_D
 body: |
   bb.0:
@@ -144,7 +144,7 @@ body: |
 ---
 # CHECK-LABEL: test_LU52I_D:
 # CHECK-ENC: 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: lu52i.d   a0, a1, 195
+# CHECK-ASM: lu52i.d   $a0, $a1, 195
 name: test_LU52I_D
 body: |
   bb.0:
@@ -153,7 +153,7 @@ body: |
 ---
 # CHECK-LABEL: test_ANDI:
 # CHECK-ENC: 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 1 1 0 1 0 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: andi      a0, a1, 106
+# CHECK-ASM: andi      $a0, $a1, 106
 name: test_ANDI
 body: |
   bb.0:
@@ -162,7 +162,7 @@ body: |
 ---
 # CHECK-LABEL: test_ORI:
 # CHECK-ENC: 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 1 0 1 1 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ori       a0, a1, 47
+# CHECK-ASM: ori       $a0, $a1, 47
 name: test_ORI
 body: |
   bb.0:
@@ -171,7 +171,7 @@ body: |
 ---
 # CHECK-LABEL: test_XORI:
 # CHECK-ENC: 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 1 1 0 0 0 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: xori      a0, a1, 99
+# CHECK-ASM: xori      $a0, $a1, 99
 name: test_XORI
 body: |
   bb.0:
@@ -180,7 +180,7 @@ body: |
 ---
 # CHECK-LABEL: test_LD_B:
 # CHECK-ENC: 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ld.b      a0, a1, 21
+# CHECK-ASM: ld.b      $a0, $a1, 21
 name: test_LD_B
 body: |
   bb.0:
@@ -189,7 +189,7 @@ body: |
 ---
 # CHECK-LABEL: test_LD_H:
 # CHECK-ENC: 0 0 1 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 0 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ld.h      a0, a1, 80
+# CHECK-ASM: ld.h      $a0, $a1, 80
 name: test_LD_H
 body: |
   bb.0:
@@ -198,7 +198,7 @@ body: |
 ---
 # CHECK-LABEL: test_LD_W:
 # CHECK-ENC: 0 0 1 0 1 0 0 0 1 0 0 0 0 0 0 1 0 1 1 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ld.w      a0, a1, 92
+# CHECK-ASM: ld.w      $a0, $a1, 92
 name: test_LD_W
 body: |
   bb.0:
@@ -207,7 +207,7 @@ body: |
 ---
 # CHECK-LABEL: test_LD_BU:
 # CHECK-ENC: 0 0 1 0 1 0 1 0 0 0 0 0 0 0 1 0 0 1 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ld.bu     a0, a1, 150
+# CHECK-ASM: ld.bu     $a0, $a1, 150
 name: test_LD_BU
 body: |
   bb.0:
@@ -216,7 +216,7 @@ body: |
 ---
 # CHECK-LABEL: test_LD_HU:
 # CHECK-ENC: 0 0 1 0 1 0 1 0 0 1 0 0 0 0 1 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ld.hu     a0, a1, 198
+# CHECK-ASM: ld.hu     $a0, $a1, 198
 name: test_LD_HU
 body: |
   bb.0:
@@ -225,7 +225,7 @@ body: |
 ---
 # CHECK-LABEL: test_LD_WU:
 # CHECK-ENC: 0 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ld.wu     a0, a1, 31
+# CHECK-ASM: ld.wu     $a0, $a1, 31
 name: test_LD_WU
 body: |
   bb.0:
@@ -234,7 +234,7 @@ body: |
 ---
 # CHECK-LABEL: test_ST_B:
 # CHECK-ENC: 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 1 0 1 1 1 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: st.b      a0, a1, 95
+# CHECK-ASM: st.b      $a0, $a1, 95
 name: test_ST_B
 body: |
   bb.0:
@@ -243,7 +243,7 @@ body: |
 ---
 # CHECK-LABEL: test_ST_H:
 # CHECK-ENC: 0 0 1 0 1 0 0 1 0 1 0 0 0 0 0 1 1 1 1 0 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: st.h      a0, a1, 122
+# CHECK-ASM: st.h      $a0, $a1, 122
 name: test_ST_H
 body: |
   bb.0:
@@ -252,7 +252,7 @@ body: |
 ---
 # CHECK-LABEL: test_ST_W:
 # CHECK-ENC: 0 0 1 0 1 0 0 1 1 0 0 0 0 0 1 0 1 0 1 1 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: st.w      a0, a1, 175
+# CHECK-ASM: st.w      $a0, $a1, 175
 name: test_ST_W
 body: |
   bb.0:
@@ -261,7 +261,7 @@ body: |
 ---
 # CHECK-LABEL: test_ST_D:
 # CHECK-ENC: 0 0 1 0 1 0 0 1 1 1 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: st.d      a0, a1, 60
+# CHECK-ASM: st.d      $a0, $a1, 60
 name: test_ST_D
 body: |
   bb.0:
@@ -280,7 +280,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDPTR_W:
 # CHECK-ENC: 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldptr.w   a0, a1, 66
+# CHECK-ASM: ldptr.w   $a0, $a1, 66
 name: test_LDPTR_W
 body: |
   bb.0:
@@ -289,7 +289,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDPTR_D:
 # CHECK-ENC: 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldptr.d   a0, a1, 56
+# CHECK-ASM: ldptr.d   $a0, $a1, 56
 name: test_LDPTR_D
 body: |
   bb.0:
@@ -298,7 +298,7 @@ body: |
 ---
 # CHECK-LABEL: test_STPTR_W:
 # CHECK-ENC: 0 0 1 0 0 1 0 1 0 0 0 0 0 0 0 1 0 1 0 1 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: stptr.w   a0, a1, 87
+# CHECK-ASM: stptr.w   $a0, $a1, 87
 name: test_STPTR_W
 body: |
   bb.0:
@@ -307,7 +307,7 @@ body: |
 ---
 # CHECK-LABEL: test_STPTR_D:
 # CHECK-ENC: 0 0 1 0 0 1 1 1 0 0 0 0 0 0 1 0 0 1 0 0 0 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: stptr.d   a0, a1, 145
+# CHECK-ASM: stptr.d   $a0, $a1, 145
 name: test_STPTR_D
 body: |
   bb.0:
@@ -316,7 +316,7 @@ body: |
 ---
 # CHECK-LABEL: test_LL_W:
 # CHECK-ENC: 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ll.w      a0, a1, 243
+# CHECK-ASM: ll.w      $a0, $a1, 243
 name: test_LL_W
 body: |
   bb.0:
@@ -325,7 +325,7 @@ body: |
 ---
 # CHECK-LABEL: test_LL_D:
 # CHECK-ENC: 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ll.d      a0, a1, 74
+# CHECK-ASM: ll.d      $a0, $a1, 74
 name: test_LL_D
 body: |
   bb.0:
@@ -334,7 +334,7 @@ body: |
 ---
 # CHECK-LABEL: test_SC_W:
 # CHECK-ENC: 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: sc.w      a0, a1, 96
+# CHECK-ASM: sc.w      $a0, $a1, 96
 name: test_SC_W
 body: |
   bb.0:
@@ -343,7 +343,7 @@ body: |
 ---
 # CHECK-LABEL: test_SC_D:
 # CHECK-ENC: 0 0 1 0 0 0 1 1 0 0 0 0 0 0 0 1 1 0 1 0 0 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: sc.d      a0, a1, 105
+# CHECK-ASM: sc.d      $a0, $a1, 105
 name: test_SC_D
 body: |
   bb.0:
@@ -362,7 +362,7 @@ body: |
 ---
 # CHECK-LABEL: test_ADDU16I_D:
 # CHECK-ENC: 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: addu16i.d a0, a1, 23
+# CHECK-ASM: addu16i.d $a0, $a1, 23
 name: test_ADDU16I_D
 body: |
   bb.0:
@@ -371,7 +371,7 @@ body: |
 ---
 # CHECK-LABEL: test_JIRL:
 # CHECK-ENC: 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: jirl      a0, a1, 49
+# CHECK-ASM: jirl      $a0, $a1, 49
 name: test_JIRL
 body: |
   bb.0:
@@ -380,7 +380,7 @@ body: |
 ---
 # CHECK-LABEL: test_BEQ:
 # CHECK-ENC: 0 1 0 1 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 1
-# CHECK-ASM: beq       a0, a1, 196
+# CHECK-ASM: beq       $a0, $a1, 196
 name: test_BEQ
 body: |
   bb.0:
@@ -389,7 +389,7 @@ body: |
 ---
 # CHECK-LABEL: test_BNE:
 # CHECK-ENC: 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 0 1 0 0 0 0 1 0 1
-# CHECK-ASM: bne       a0, a1, 19
+# CHECK-ASM: bne       $a0, $a1, 19
 name: test_BNE
 body: |
   bb.0:
@@ -398,7 +398,7 @@ body: |
 ---
 # CHECK-LABEL: test_BLT:
 # CHECK-ENC: 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 1 1 0 0 1 0 0 0 0 1 0 1
-# CHECK-ASM: blt       a0, a1, 123
+# CHECK-ASM: blt       $a0, $a1, 123
 name: test_BLT
 body: |
   bb.0:
@@ -407,7 +407,7 @@ body: |
 ---
 # CHECK-LABEL: test_BGE:
 # CHECK-ENC: 0 1 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 0 0 0 0 1 0 1
-# CHECK-ASM: bge       a0, a1, 12
+# CHECK-ASM: bge       $a0, $a1, 12
 name: test_BGE
 body: |
   bb.0:
@@ -416,7 +416,7 @@ body: |
 ---
 # CHECK-LABEL: test_BLTU:
 # CHECK-ENC: 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 0 1 0 1
-# CHECK-ASM: bltu      a0, a1, 17
+# CHECK-ASM: bltu      $a0, $a1, 17
 name: test_BLTU
 body: |
   bb.0:
@@ -425,7 +425,7 @@ body: |
 ---
 # CHECK-LABEL: test_BGEU:
 # CHECK-ENC: 0 1 1 0 1 1 0 0 0 0 0 0 0 0 0 1 0 1 1 0 0 0 0 0 1 0 0 0 0 1 0 1
-# CHECK-ASM: bgeu      a0, a1, 88
+# CHECK-ASM: bgeu      $a0, $a1, 88
 name: test_BGEU
 body: |
   bb.0:

diff --git a/llvm/test/CodeGen/LoongArch/3r.mir b/llvm/test/CodeGen/LoongArch/3r.mir
index fc9012b..19f0446 100644 (file)
--- a/llvm/test/CodeGen/LoongArch/3r.mir
+++ b/llvm/test/CodeGen/LoongArch/3r.mir
@@ -16,7 +16,7 @@
 ---
 # CHECK-LABEL: test_ADD_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: add.w     a0, a1, a0
+# CHECK-ASM: add.w     $a0, $a1, $a0
 name: test_ADD_W
 body: |
   bb.0:
@@ -25,7 +25,7 @@ body: |
 ---
 # CHECK-LABEL: test_ADD_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: add.d     a0, a1, a0
+# CHECK-ASM: add.d     $a0, $a1, $a0
 name: test_ADD_D
 body: |
   bb.0:
@@ -34,7 +34,7 @@ body: |
 ---
 # CHECK-LABEL: test_SUB_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: sub.w     a0, a1, a0
+# CHECK-ASM: sub.w     $a0, $a1, $a0
 name: test_SUB_W
 body: |
   bb.0:
@@ -43,7 +43,7 @@ body: |
 ---
 # CHECK-LABEL: test_SUB_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: sub.d     a0, a1, a0
+# CHECK-ASM: sub.d     $a0, $a1, $a0
 name: test_SUB_D
 body: |
   bb.0:
@@ -52,7 +52,7 @@ body: |
 ---
 # CHECK-LABEL: test_SLT:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: slt       a0, a1, a0
+# CHECK-ASM: slt       $a0, $a1, $a0
 name: test_SLT
 body: |
   bb.0:
@@ -61,7 +61,7 @@ body: |
 ---
 # CHECK-LABEL: test_SLTU:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: sltu      a0, a1, a0
+# CHECK-ASM: sltu      $a0, $a1, $a0
 name: test_SLTU
 body: |
   bb.0:
@@ -70,7 +70,7 @@ body: |
 ---
 # CHECK-LABEL: test_MASKEQZ:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: maskeqz   a0, a1, a0
+# CHECK-ASM: maskeqz   $a0, $a1, $a0
 name: test_MASKEQZ
 body: |
   bb.0:
@@ -79,7 +79,7 @@ body: |
 ---
 # CHECK-LABEL: test_MASKNEZ:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: masknez   a0, a1, a0
+# CHECK-ASM: masknez   $a0, $a1, $a0
 name: test_MASKNEZ
 body: |
   bb.0:
@@ -88,7 +88,7 @@ body: |
 ---
 # CHECK-LABEL: test_NOR:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: nor       a0, a1, a0
+# CHECK-ASM: nor       $a0, $a1, $a0
 name: test_NOR
 body: |
   bb.0:
@@ -97,7 +97,7 @@ body: |
 ---
 # CHECK-LABEL: test_AND:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: and       a0, a1, a0
+# CHECK-ASM: and       $a0, $a1, $a0
 name: test_AND
 body: |
   bb.0:
@@ -106,7 +106,7 @@ body: |
 ---
 # CHECK-LABEL: test_OR:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: or        a0, a1, a0
+# CHECK-ASM: or        $a0, $a1, $a0
 name: test_OR
 body: |
   bb.0:
@@ -115,7 +115,7 @@ body: |
 ---
 # CHECK-LABEL: test_XOR:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: xor       a0, a1, a0
+# CHECK-ASM: xor       $a0, $a1, $a0
 name: test_XOR
 body: |
   bb.0:
@@ -124,7 +124,7 @@ body: |
 ---
 # CHECK-LABEL: test_ORN:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: orn       a0, a1, a0
+# CHECK-ASM: orn       $a0, $a1, $a0
 name: test_ORN
 body: |
   bb.0:
@@ -133,7 +133,7 @@ body: |
 ---
 # CHECK-LABEL: test_ANDN:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: andn      a0, a1, a0
+# CHECK-ASM: andn      $a0, $a1, $a0
 name: test_ANDN
 body: |
   bb.0:
@@ -142,7 +142,7 @@ body: |
 ---
 # CHECK-LABEL: test_SLL_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: sll.w     a0, a1, a0
+# CHECK-ASM: sll.w     $a0, $a1, $a0
 name: test_SLL_W
 body: |
   bb.0:
@@ -151,7 +151,7 @@ body: |
 ---
 # CHECK-LABEL: test_SRL_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: srl.w     a0, a1, a0
+# CHECK-ASM: srl.w     $a0, $a1, $a0
 name: test_SRL_W
 body: |
   bb.0:
@@ -160,7 +160,7 @@ body: |
 ---
 # CHECK-LABEL: test_SRA_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: sra.w     a0, a1, a0
+# CHECK-ASM: sra.w     $a0, $a1, $a0
 name: test_SRA_W
 body: |
   bb.0:
@@ -169,7 +169,7 @@ body: |
 ---
 # CHECK-LABEL: test_SLL_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: sll.d     a0, a1, a0
+# CHECK-ASM: sll.d     $a0, $a1, $a0
 name: test_SLL_D
 body: |
   bb.0:
@@ -178,7 +178,7 @@ body: |
 ---
 # CHECK-LABEL: test_SRL_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: srl.d     a0, a1, a0
+# CHECK-ASM: srl.d     $a0, $a1, $a0
 name: test_SRL_D
 body: |
   bb.0:
@@ -187,7 +187,7 @@ body: |
 ---
 # CHECK-LABEL: test_SRA_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: sra.d     a0, a1, a0
+# CHECK-ASM: sra.d     $a0, $a1, $a0
 name: test_SRA_D
 body: |
   bb.0:
@@ -196,7 +196,7 @@ body: |
 ---
 # CHECK-LABEL: test_ROTR_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: rotr.w    a0, a1, a0
+# CHECK-ASM: rotr.w    $a0, $a1, $a0
 name: test_ROTR_W
 body: |
   bb.0:
@@ -205,7 +205,7 @@ body: |
 ---
 # CHECK-LABEL: test_ROTR_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: rotr.d    a0, a1, a0
+# CHECK-ASM: rotr.d    $a0, $a1, $a0
 name: test_ROTR_D
 body: |
   bb.0:
@@ -214,7 +214,7 @@ body: |
 ---
 # CHECK-LABEL: test_MUL_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: mul.w     a0, a1, a0
+# CHECK-ASM: mul.w     $a0, $a1, $a0
 name: test_MUL_W
 body: |
   bb.0:
@@ -223,7 +223,7 @@ body: |
 ---
 # CHECK-LABEL: test_MULH_W:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: mulh.w    a0, a1, a0
+# CHECK-ASM: mulh.w    $a0, $a1, $a0
 name: test_MULH_W
 body: |
   bb.0:
@@ -232,7 +232,7 @@ body: |
 ---
 # CHECK-LABEL: test_MULH_WU:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: mulh.wu   a0, a1, a0
+# CHECK-ASM: mulh.wu   $a0, $a1, $a0
 name: test_MULH_WU
 body: |
   bb.0:
@@ -241,7 +241,7 @@ body: |
 ---
 # CHECK-LABEL: test_MUL_D:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: mul.d     a0, a1, a0
+# CHECK-ASM: mul.d     $a0, $a1, $a0
 name: test_MUL_D
 body: |
   bb.0:
@@ -250,7 +250,7 @@ body: |
 ---
 # CHECK-LABEL: test_MULH_D:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: mulh.d    a0, a1, a0
+# CHECK-ASM: mulh.d    $a0, $a1, $a0
 name: test_MULH_D
 body: |
   bb.0:
@@ -259,7 +259,7 @@ body: |
 ---
 # CHECK-LABEL: test_MULH_DU:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: mulh.du   a0, a1, a0
+# CHECK-ASM: mulh.du   $a0, $a1, $a0
 name: test_MULH_DU
 body: |
   bb.0:
@@ -268,7 +268,7 @@ body: |
 ---
 # CHECK-LABEL: test_MULW_D_W:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: mulw.d.w  a0, a1, a0
+# CHECK-ASM: mulw.d.w  $a0, $a1, $a0
 name: test_MULW_D_W
 body: |
   bb.0:
@@ -277,7 +277,7 @@ body: |
 ---
 # CHECK-LABEL: test_MULW_D_WU:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: mulw.d.wu a0, a1, a0
+# CHECK-ASM: mulw.d.wu $a0, $a1, $a0
 name: test_MULW_D_WU
 body: |
   bb.0:
@@ -286,7 +286,7 @@ body: |
 ---
 # CHECK-LABEL: test_DIV_W:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: div.w     a0, a1, a0
+# CHECK-ASM: div.w     $a0, $a1, $a0
 name: test_DIV_W
 body: |
   bb.0:
@@ -295,7 +295,7 @@ body: |
 ---
 # CHECK-LABEL: test_MOD_W:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: mod.w     a0, a1, a0
+# CHECK-ASM: mod.w     $a0, $a1, $a0
 name: test_MOD_W
 body: |
   bb.0:
@@ -304,7 +304,7 @@ body: |
 ---
 # CHECK-LABEL: test_DIV_WU:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: div.wu    a0, a1, a0
+# CHECK-ASM: div.wu    $a0, $a1, $a0
 name: test_DIV_WU
 body: |
   bb.0:
@@ -313,7 +313,7 @@ body: |
 ---
 # CHECK-LABEL: test_MOD_WU:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: mod.wu    a0, a1, a0
+# CHECK-ASM: mod.wu    $a0, $a1, $a0
 name: test_MOD_WU
 body: |
   bb.0:
@@ -322,7 +322,7 @@ body: |
 ---
 # CHECK-LABEL: test_DIV_D:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: div.d     a0, a1, a0
+# CHECK-ASM: div.d     $a0, $a1, $a0
 name: test_DIV_D
 body: |
   bb.0:
@@ -331,7 +331,7 @@ body: |
 ---
 # CHECK-LABEL: test_MOD_D:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: mod.d     a0, a1, a0
+# CHECK-ASM: mod.d     $a0, $a1, $a0
 name: test_MOD_D
 body: |
   bb.0:
@@ -340,7 +340,7 @@ body: |
 ---
 # CHECK-LABEL: test_DIV_DU:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: div.du    a0, a1, a0
+# CHECK-ASM: div.du    $a0, $a1, $a0
 name: test_DIV_DU
 body: |
   bb.0:
@@ -349,7 +349,7 @@ body: |
 ---
 # CHECK-LABEL: test_MOD_DU:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: mod.du    a0, a1, a0
+# CHECK-ASM: mod.du    $a0, $a1, $a0
 name: test_MOD_DU
 body: |
   bb.0:
@@ -358,7 +358,7 @@ body: |
 ---
 # CHECK-LABEL: test_CRC_W_B_W:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: crc.w.b.w a0, a1, a0
+# CHECK-ASM: crc.w.b.w $a0, $a1, $a0
 name: test_CRC_W_B_W
 body: |
   bb.0:
@@ -367,7 +367,7 @@ body: |
 ---
 # CHECK-LABEL: test_CRC_W_H_W:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: crc.w.h.w a0, a1, a0
+# CHECK-ASM: crc.w.h.w $a0, $a1, $a0
 name: test_CRC_W_H_W
 body: |
   bb.0:
@@ -376,7 +376,7 @@ body: |
 ---
 # CHECK-LABEL: test_CRC_W_W_W:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: crc.w.w.w a0, a1, a0
+# CHECK-ASM: crc.w.w.w $a0, $a1, $a0
 name: test_CRC_W_W_W
 body: |
   bb.0:
@@ -385,7 +385,7 @@ body: |
 ---
 # CHECK-LABEL: test_CRC_W_D_W:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: crc.w.d.w a0, a1, a0
+# CHECK-ASM: crc.w.d.w $a0, $a1, $a0
 name: test_CRC_W_D_W
 body: |
   bb.0:
@@ -394,7 +394,7 @@ body: |
 ---
 # CHECK-LABEL: test_CRCC_W_B_W:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: crcc.w.b.w        a0, a1, a0
+# CHECK-ASM: crcc.w.b.w        $a0, $a1, $a0
 name: test_CRCC_W_B_W
 body: |
   bb.0:
@@ -403,7 +403,7 @@ body: |
 ---
 # CHECK-LABEL: test_CRCC_W_H_W:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: crcc.w.h.w        a0, a1, a0
+# CHECK-ASM: crcc.w.h.w        $a0, $a1, $a0
 name: test_CRCC_W_H_W
 body: |
   bb.0:
@@ -412,7 +412,7 @@ body: |
 ---
 # CHECK-LABEL: test_CRCC_W_W_W:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: crcc.w.w.w        a0, a1, a0
+# CHECK-ASM: crcc.w.w.w        $a0, $a1, $a0
 name: test_CRCC_W_W_W
 body: |
   bb.0:
@@ -421,7 +421,7 @@ body: |
 ---
 # CHECK-LABEL: test_CRCC_W_D_W:
 # CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: crcc.w.d.w        a0, a1, a0
+# CHECK-ASM: crcc.w.d.w        $a0, $a1, $a0
 name: test_CRCC_W_D_W
 body: |
   bb.0:
@@ -430,7 +430,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMSWAP_DB_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 0 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amswap_db.w       a0, a1, a2
+# CHECK-ASM: amswap_db.w       $a0, $a1, $a2
 name: test_AMSWAP_DB_W
 body: |
   bb.0:
@@ -439,7 +439,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMSWAP_DB_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amswap_db.d       a0, a1, a2
+# CHECK-ASM: amswap_db.d       $a0, $a1, $a2
 name: test_AMSWAP_DB_D
 body: |
   bb.0:
@@ -448,7 +448,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMADD_DB_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amadd_db.w        a0, a1, a2
+# CHECK-ASM: amadd_db.w        $a0, $a1, $a2
 name: test_AMADD_DB_W
 body: |
   bb.0:
@@ -457,7 +457,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMADD_DB_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amadd_db.d        a0, a1, a2
+# CHECK-ASM: amadd_db.d        $a0, $a1, $a2
 name: test_AMADD_DB_D
 body: |
   bb.0:
@@ -466,7 +466,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMAND_DB_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 1 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amand_db.w        a0, a1, a2
+# CHECK-ASM: amand_db.w        $a0, $a1, $a2
 name: test_AMAND_DB_W
 body: |
   bb.0:
@@ -475,7 +475,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMAND_DB_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 1 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amand_db.d        a0, a1, a2
+# CHECK-ASM: amand_db.d        $a0, $a1, $a2
 name: test_AMAND_DB_D
 body: |
   bb.0:
@@ -484,7 +484,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMOR_DB_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amor_db.w a0, a1, a2
+# CHECK-ASM: amor_db.w $a0, $a1, $a2
 name: test_AMOR_DB_W
 body: |
   bb.0:
@@ -493,7 +493,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMOR_DB_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 0 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amor_db.d a0, a1, a2
+# CHECK-ASM: amor_db.d $a0, $a1, $a2
 name: test_AMOR_DB_D
 body: |
   bb.0:
@@ -502,7 +502,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMXOR_DB_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 0 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amxor_db.w        a0, a1, a2
+# CHECK-ASM: amxor_db.w        $a0, $a1, $a2
 name: test_AMXOR_DB_W
 body: |
   bb.0:
@@ -511,7 +511,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMXOR_DB_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 0 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amxor_db.d        a0, a1, a2
+# CHECK-ASM: amxor_db.d        $a0, $a1, $a2
 name: test_AMXOR_DB_D
 body: |
   bb.0:
@@ -520,7 +520,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMAX_DB_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammax_db.w        a0, a1, a2
+# CHECK-ASM: ammax_db.w        $a0, $a1, $a2
 name: test_AMMAX_DB_W
 body: |
   bb.0:
@@ -529,7 +529,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMAX_DB_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 1 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammax_db.d        a0, a1, a2
+# CHECK-ASM: ammax_db.d        $a0, $a1, $a2
 name: test_AMMAX_DB_D
 body: |
   bb.0:
@@ -538,7 +538,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMIN_DB_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 1 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammin_db.w        a0, a1, a2
+# CHECK-ASM: ammin_db.w        $a0, $a1, $a2
 name: test_AMMIN_DB_W
 body: |
   bb.0:
@@ -547,7 +547,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMIN_DB_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 1 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammin_db.d        a0, a1, a2
+# CHECK-ASM: ammin_db.d        $a0, $a1, $a2
 name: test_AMMIN_DB_D
 body: |
   bb.0:
@@ -556,7 +556,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMAX_DB_WU:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 0 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammax_db.wu       a0, a1, a2
+# CHECK-ASM: ammax_db.wu       $a0, $a1, $a2
 name: test_AMMAX_DB_WU
 body: |
   bb.0:
@@ -565,7 +565,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMAX_DB_DU:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 0 0 0 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammax_db.du       a0, a1, a2
+# CHECK-ASM: ammax_db.du       $a0, $a1, $a2
 name: test_AMMAX_DB_DU
 body: |
   bb.0:
@@ -574,7 +574,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMIN_DB_WU:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 0 0 0 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammin_db.wu       a0, a1, a2
+# CHECK-ASM: ammin_db.wu       $a0, $a1, $a2
 name: test_AMMIN_DB_WU
 body: |
   bb.0:
@@ -583,7 +583,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMIN_DB_DU:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 0 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammin_db.du       a0, a1, a2
+# CHECK-ASM: ammin_db.du       $a0, $a1, $a2
 name: test_AMMIN_DB_DU
 body: |
   bb.0:
@@ -592,7 +592,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMSWAP_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amswap.w  a0, a1, a2
+# CHECK-ASM: amswap.w  $a0, $a1, $a2
 name: test_AMSWAP_W
 body: |
   bb.0:
@@ -601,7 +601,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMSWAP_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 0 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amswap.d  a0, a1, a2
+# CHECK-ASM: amswap.d  $a0, $a1, $a2
 name: test_AMSWAP_D
 body: |
   bb.0:
@@ -610,7 +610,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMADD_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 0 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amadd.w   a0, a1, a2
+# CHECK-ASM: amadd.w   $a0, $a1, $a2
 name: test_AMADD_W
 body: |
   bb.0:
@@ -619,7 +619,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMADD_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amadd.d   a0, a1, a2
+# CHECK-ASM: amadd.d   $a0, $a1, $a2
 name: test_AMADD_D
 body: |
   bb.0:
@@ -628,7 +628,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMAND_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amand.w   a0, a1, a2
+# CHECK-ASM: amand.w   $a0, $a1, $a2
 name: test_AMAND_W
 body: |
   bb.0:
@@ -637,7 +637,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMAND_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amand.d   a0, a1, a2
+# CHECK-ASM: amand.d   $a0, $a1, $a2
 name: test_AMAND_D
 body: |
   bb.0:
@@ -646,7 +646,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMOR_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amor.w    a0, a1, a2
+# CHECK-ASM: amor.w    $a0, $a1, $a2
 name: test_AMOR_W
 body: |
   bb.0:
@@ -655,7 +655,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMOR_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 1 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amor.d    a0, a1, a2
+# CHECK-ASM: amor.d    $a0, $a1, $a2
 name: test_AMOR_D
 body: |
   bb.0:
@@ -664,7 +664,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMXOR_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amxor.w   a0, a1, a2
+# CHECK-ASM: amxor.w   $a0, $a1, $a2
 name: test_AMXOR_W
 body: |
   bb.0:
@@ -673,7 +673,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMXOR_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 0 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: amxor.d   a0, a1, a2
+# CHECK-ASM: amxor.d   $a0, $a1, $a2
 name: test_AMXOR_D
 body: |
   bb.0:
@@ -682,7 +682,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMAX_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 0 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammax.w   a0, a1, a2
+# CHECK-ASM: ammax.w   $a0, $a1, $a2
 name: test_AMMAX_W
 body: |
   bb.0:
@@ -691,7 +691,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMAX_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 0 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammax.d   a0, a1, a2
+# CHECK-ASM: ammax.d   $a0, $a1, $a2
 name: test_AMMAX_D
 body: |
   bb.0:
@@ -700,7 +700,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMIN_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammin.w   a0, a1, a2
+# CHECK-ASM: ammin.w   $a0, $a1, $a2
 name: test_AMMIN_W
 body: |
   bb.0:
@@ -709,7 +709,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMIN_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 1 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammin.d   a0, a1, a2
+# CHECK-ASM: ammin.d   $a0, $a1, $a2
 name: test_AMMIN_D
 body: |
   bb.0:
@@ -718,7 +718,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMAX_WU:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 1 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammax.wu  a0, a1, a2
+# CHECK-ASM: ammax.wu  $a0, $a1, $a2
 name: test_AMMAX_WU
 body: |
   bb.0:
@@ -727,7 +727,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMAX_DU:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 1 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammax.du  a0, a1, a2
+# CHECK-ASM: ammax.du  $a0, $a1, $a2
 name: test_AMMAX_DU
 body: |
   bb.0:
@@ -736,7 +736,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMIN_WU:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammin.wu  a0, a1, a2
+# CHECK-ASM: ammin.wu  $a0, $a1, $a2
 name: test_AMMIN_WU
 body: |
   bb.0:
@@ -745,7 +745,7 @@ body: |
 ---
 # CHECK-LABEL: test_AMMIN_DU:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 0 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ammin.du  a0, a1, a2
+# CHECK-ASM: ammin.du  $a0, $a1, $a2
 name: test_AMMIN_DU
 body: |
   bb.0:
@@ -754,7 +754,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDX_B:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldx.b     a0, a1, a2
+# CHECK-ASM: ldx.b     $a0, $a1, $a2
 name: test_LDX_B
 body: |
   bb.0:
@@ -763,7 +763,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDX_H:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldx.h     a0, a1, a2
+# CHECK-ASM: ldx.h     $a0, $a1, $a2
 name: test_LDX_H
 body: |
   bb.0:
@@ -772,7 +772,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDX_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldx.w     a0, a1, a2
+# CHECK-ASM: ldx.w     $a0, $a1, $a2
 name: test_LDX_W
 body: |
   bb.0:
@@ -781,7 +781,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDX_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldx.d     a0, a1, a2
+# CHECK-ASM: ldx.d     $a0, $a1, $a2
 name: test_LDX_D
 body: |
   bb.0:
@@ -790,7 +790,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDX_BU:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldx.bu    a0, a1, a2
+# CHECK-ASM: ldx.bu    $a0, $a1, $a2
 name: test_LDX_BU
 body: |
   bb.0:
@@ -799,7 +799,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDX_HU:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 1 0 0 1 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldx.hu    a0, a1, a2
+# CHECK-ASM: ldx.hu    $a0, $a1, $a2
 name: test_LDX_HU
 body: |
   bb.0:
@@ -808,7 +808,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDX_WU:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 1 0 1 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldx.wu    a0, a1, a2
+# CHECK-ASM: ldx.wu    $a0, $a1, $a2
 name: test_LDX_WU
 body: |
   bb.0:
@@ -817,7 +817,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDGT_B:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldgt.b    a0, a1, a2
+# CHECK-ASM: ldgt.b    $a0, $a1, $a2
 name: test_LDGT_B
 body: |
   bb.0:
@@ -826,7 +826,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDGT_H:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldgt.h    a0, a1, a2
+# CHECK-ASM: ldgt.h    $a0, $a1, $a2
 name: test_LDGT_H
 body: |
   bb.0:
@@ -835,7 +835,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDGT_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 0 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldgt.w    a0, a1, a2
+# CHECK-ASM: ldgt.w    $a0, $a1, $a2
 name: test_LDGT_W
 body: |
   bb.0:
@@ -844,7 +844,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDGT_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldgt.d    a0, a1, a2
+# CHECK-ASM: ldgt.d    $a0, $a1, $a2
 name: test_LDGT_D
 body: |
   bb.0:
@@ -853,7 +853,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDLE_B:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldle.b    a0, a1, a2
+# CHECK-ASM: ldle.b    $a0, $a1, $a2
 name: test_LDLE_B
 body: |
   bb.0:
@@ -862,7 +862,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDLE_H:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldle.h    a0, a1, a2
+# CHECK-ASM: ldle.h    $a0, $a1, $a2
 name: test_LDLE_H
 body: |
   bb.0:
@@ -871,7 +871,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDLE_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 1 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldle.w    a0, a1, a2
+# CHECK-ASM: ldle.w    $a0, $a1, $a2
 name: test_LDLE_W
 body: |
   bb.0:
@@ -880,7 +880,7 @@ body: |
 ---
 # CHECK-LABEL: test_LDLE_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 1 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: ldle.d    a0, a1, a2
+# CHECK-ASM: ldle.d    $a0, $a1, $a2
 name: test_LDLE_D
 body: |
   bb.0:
@@ -889,7 +889,7 @@ body: |
 ---
 # CHECK-LABEL: test_STX_B:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: stx.b     a0, a1, a2
+# CHECK-ASM: stx.b     $a0, $a1, $a2
 name: test_STX_B
 body: |
   bb.0:
@@ -898,7 +898,7 @@ body: |
 ---
 # CHECK-LABEL: test_STX_H:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 1 0 1 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: stx.h     a0, a1, a2
+# CHECK-ASM: stx.h     $a0, $a1, $a2
 name: test_STX_H
 body: |
   bb.0:
@@ -907,7 +907,7 @@ body: |
 ---
 # CHECK-LABEL: test_STX_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: stx.w     a0, a1, a2
+# CHECK-ASM: stx.w     $a0, $a1, $a2
 name: test_STX_W
 body: |
   bb.0:
@@ -916,7 +916,7 @@ body: |
 ---
 # CHECK-LABEL: test_STX_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 1 1 1 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: stx.d     a0, a1, a2
+# CHECK-ASM: stx.d     $a0, $a1, $a2
 name: test_STX_D
 body: |
   bb.0:
@@ -925,7 +925,7 @@ body: |
 ---
 # CHECK-LABEL: test_STGT_B:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: stgt.b    a0, a1, a2
+# CHECK-ASM: stgt.b    $a0, $a1, $a2
 name: test_STGT_B
 body: |
   bb.0:
@@ -934,7 +934,7 @@ body: |
 ---
 # CHECK-LABEL: test_STGT_H:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 0 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: stgt.h    a0, a1, a2
+# CHECK-ASM: stgt.h    $a0, $a1, $a2
 name: test_STGT_H
 body: |
   bb.0:
@@ -943,7 +943,7 @@ body: |
 ---
 # CHECK-LABEL: test_STGT_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 0 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: stgt.w    a0, a1, a2
+# CHECK-ASM: stgt.w    $a0, $a1, $a2
 name: test_STGT_W
 body: |
   bb.0:
@@ -952,7 +952,7 @@ body: |
 ---
 # CHECK-LABEL: test_STGT_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 0 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: stgt.d    a0, a1, a2
+# CHECK-ASM: stgt.d    $a0, $a1, $a2
 name: test_STGT_D
 body: |
   bb.0:
@@ -961,7 +961,7 @@ body: |
 ---
 # CHECK-LABEL: test_STLE_B:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: stle.b    a0, a1, a2
+# CHECK-ASM: stle.b    $a0, $a1, $a2
 name: test_STLE_B
 body: |
   bb.0:
@@ -970,7 +970,7 @@ body: |
 ---
 # CHECK-LABEL: test_STLE_H:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 1 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: stle.h    a0, a1, a2
+# CHECK-ASM: stle.h    $a0, $a1, $a2
 name: test_STLE_H
 body: |
   bb.0:
@@ -979,7 +979,7 @@ body: |
 ---
 # CHECK-LABEL: test_STLE_W:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 1 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: stle.w    a0, a1, a2
+# CHECK-ASM: stle.w    $a0, $a1, $a2
 name: test_STLE_W
 body: |
   bb.0:
@@ -988,7 +988,7 @@ body: |
 ---
 # CHECK-LABEL: test_STLE_D:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: stle.d    a0, a1, a2
+# CHECK-ASM: stle.d    $a0, $a1, $a2
 name: test_STLE_D
 body: |
   bb.0:

diff --git a/llvm/test/CodeGen/LoongArch/3ri.mir b/llvm/test/CodeGen/LoongArch/3ri.mir
index 4cf71ff..1f21dc2 100644 (file)
--- a/llvm/test/CodeGen/LoongArch/3ri.mir
+++ b/llvm/test/CodeGen/LoongArch/3ri.mir
@@ -16,7 +16,7 @@
 ---
 # CHECK-LABEL: test_ALSL_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: alsl.w    a0, a1, a2, 3
+# CHECK-ASM: alsl.w    $a0, $a1, $a2, 3
 name: test_ALSL_W
 body: |
   bb.0:
@@ -25,7 +25,7 @@ body: |
 ---
 # CHECK-LABEL: test_ALSL_WU:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: alsl.wu   a0, a1, a2, 1
+# CHECK-ASM: alsl.wu   $a0, $a1, $a2, 1
 name: test_ALSL_WU
 body: |
   bb.0:
@@ -34,7 +34,7 @@ body: |
 ---
 # CHECK-LABEL: test_ALSL_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: alsl.d    a0, a1, a2, 3
+# CHECK-ASM: alsl.d    $a0, $a1, $a2, 3
 name: test_ALSL_D
 body: |
   bb.0:
@@ -43,7 +43,7 @@ body: |
 ---
 # CHECK-LABEL: test_BYTEPICK_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: bytepick.w        a0, a1, a2, 0
+# CHECK-ASM: bytepick.w        $a0, $a1, $a2, 0
 name: test_BYTEPICK_W
 body: |
   bb.0:
@@ -62,7 +62,7 @@ body: |
 ---
 # CHECK-LABEL: test_BYTEPICK_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: bytepick.d        a0, a1, a2, 4
+# CHECK-ASM: bytepick.d        $a0, $a1, $a2, 4
 name: test_BYTEPICK_D
 body: |
   bb.0:

diff --git a/llvm/test/CodeGen/LoongArch/misc.mir b/llvm/test/CodeGen/LoongArch/misc.mir
index 3bece07..ad426ab 100644 (file)
--- a/llvm/test/CodeGen/LoongArch/misc.mir
+++ b/llvm/test/CodeGen/LoongArch/misc.mir
@@ -90,7 +90,7 @@ body: |
 ---
 # CHECK-LABEL: test_BSTRINS_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1 1 0 0 0 0 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: bstrins.w a0, a1, 7, 2
+# CHECK-ASM: bstrins.w $a0, $a1, 7, 2
 name: test_BSTRINS_W
 body: |
   bb.0:
@@ -99,7 +99,7 @@ body: |
 ---
 # CHECK-LABEL: test_BSTRPICK_W:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: bstrpick.w        a0, a1, 10, 4
+# CHECK-ASM: bstrpick.w        $a0, $a1, 10, 4
 name: test_BSTRPICK_W
 body: |
   bb.0:
@@ -118,7 +118,7 @@ body: |
 ---
 # CHECK-LABEL: test_BSTRINS_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 0 0 0 0 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: bstrins.d a0, a1, 7, 2
+# CHECK-ASM: bstrins.d $a0, $a1, 7, 2
 name: test_BSTRINS_D
 body: |
   bb.0:
@@ -127,7 +127,7 @@ body: |
 ---
 # CHECK-LABEL: test_BSTRPICK_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 1 1 1 0 0 1 1 1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 0 0
-# CHECK-ASM: bstrpick.d        a0, a1, 39, 22
+# CHECK-ASM: bstrpick.d        $a0, $a1, 39, 22
 name: test_BSTRPICK_D
 body: |
   bb.0:
@@ -146,7 +146,7 @@ body: |
 ---
 # CHECK-LABEL: test_ASRTLE_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0
-# CHECK-ASM: asrtle.d  a0, a1
+# CHECK-ASM: asrtle.d  $a0, $a1
 name: test_ASRTLE_D
 body: |
   bb.0:
@@ -155,7 +155,7 @@ body: |
 ---
 # CHECK-LABEL: test_ASRTGT_D:
 # CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0
-# CHECK-ASM: asrtgt.d  a0, a1
+# CHECK-ASM: asrtgt.d  $a0, $a1
 name: test_ASRTGT_D
 body: |
   bb.0:
@@ -174,7 +174,7 @@ body: |
 ---
 # CHECK-LABEL: test_PRELD:
 # CHECK-ENC: 0 0 1 0 1 0 1 0 1 1 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 0 0 1 1 1 1
-# CHECK-ASM: preld     15, a0, 21
+# CHECK-ASM: preld     15, $a0, 21
 name: test_PRELD
 body: |
   bb.0:
@@ -193,7 +193,7 @@ body: |
 ---
 # CHECK-LABEL: test_PRELDX:
 # CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 1
-# CHECK-ASM: preldx    11, a0, a1
+# CHECK-ASM: preldx    11, $a0, $a1
 name: test_PRELDX
 body: |
   bb.0: