KVM: x86: Fill apic_lvt_mask with enums / explicit entries.

This patch defines a lapic_lvt_entry enum used as explicit indices to
the apic_lvt_mask array. In later patches a LVT_CMCI will be added to
implement the Corrected Machine Check Interrupt signaling.

Suggested-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Jue Wang <juew@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20220610171134.772566-3-juew@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 828af02..fe295c7 100644 (file)
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -402,7 +402,7 @@ static inline int apic_lvt_nmi_mode(u32 lvt_val)
 void kvm_apic_set_version(struct kvm_vcpu *vcpu)
 {
        struct kvm_lapic *apic = vcpu->arch.apic;
-       u32 v = APIC_VERSION | ((KVM_APIC_LVT_NUM - 1) << 16);
+       u32 v = APIC_VERSION | ((KVM_APIC_MAX_NR_LVT_ENTRIES - 1) << 16);
 
        if (!lapic_in_kernel(vcpu))
                return;
@@ -420,12 +420,13 @@ void kvm_apic_set_version(struct kvm_vcpu *vcpu)
        kvm_lapic_set_reg(apic, APIC_LVR, v);
 }
 
-static const unsigned int apic_lvt_mask[KVM_APIC_LVT_NUM] = {
-       LVT_MASK ,      /* part LVTT mask, timer mode mask added at runtime */
-       LVT_MASK | APIC_MODE_MASK,      /* LVTTHMR */
-       LVT_MASK | APIC_MODE_MASK,      /* LVTPC */
-       LINT_MASK, LINT_MASK,   /* LVT0-1 */
-       LVT_MASK                /* LVTERR */
+static const unsigned int apic_lvt_mask[KVM_APIC_MAX_NR_LVT_ENTRIES] = {
+       [LVT_TIMER] = LVT_MASK,      /* timer mode mask added at runtime */
+       [LVT_THERMAL_MONITOR] = LVT_MASK | APIC_MODE_MASK,
+       [LVT_PERFORMANCE_COUNTER] = LVT_MASK | APIC_MODE_MASK,
+       [LVT_LINT0] = LINT_MASK,
+       [LVT_LINT1] = LINT_MASK,
+       [LVT_ERROR] = LVT_MASK
 };
 
 static int find_highest_vector(void *bitmap)
@@ -2091,7 +2092,7 @@ static int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
                        int i;
                        u32 lvt_val;
 
-                       for (i = 0; i < KVM_APIC_LVT_NUM; i++) {
+                       for (i = 0; i < KVM_APIC_MAX_NR_LVT_ENTRIES; i++) {
                                lvt_val = kvm_lapic_get_reg(apic,
                                                       APIC_LVTT + 0x10 * i);
                                kvm_lapic_set_reg(apic, APIC_LVTT + 0x10 * i,
@@ -2409,7 +2410,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event)
                kvm_apic_set_xapic_id(apic, vcpu->vcpu_id);
        kvm_apic_set_version(apic->vcpu);
 
-       for (i = 0; i < KVM_APIC_LVT_NUM; i++)
+       for (i = 0; i < KVM_APIC_MAX_NR_LVT_ENTRIES; i++)
                kvm_lapic_set_reg(apic, APIC_LVTT + 0x10 * i, APIC_LVT_MASKED);
        apic_update_lvtt(apic);
        if (kvm_vcpu_is_reset_bsp(vcpu) &&

diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index 6207b64..af26777 100644 (file)
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -10,7 +10,6 @@
 
 #define KVM_APIC_INIT          0
 #define KVM_APIC_SIPI          1
-#define KVM_APIC_LVT_NUM       6
 
 #define APIC_SHORT_MASK                        0xc0000
 #define APIC_DEST_NOSHORT              0x0
@@ -29,6 +28,17 @@ enum lapic_mode {
        LAPIC_MODE_X2APIC = MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE,
 };
 
+enum lapic_lvt_entry {
+       LVT_TIMER,
+       LVT_THERMAL_MONITOR,
+       LVT_PERFORMANCE_COUNTER,
+       LVT_LINT0,
+       LVT_LINT1,
+       LVT_ERROR,
+
+       KVM_APIC_MAX_NR_LVT_ENTRIES,
+};
+
 struct kvm_timer {
        struct hrtimer timer;
        s64 period;                             /* unit: ns */