spi: intel: 64k erase is supported from Canon Lake and beyond

The hardware sequencer in Intel Canon Lake and beyond supports also 64k
erase command. The SPI-NOR core uses SFDP (Serial Flash Discovery
Parameter) to figure out what the chip actually supports and only issues
64k erase if it is supported.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20220816125537.89389-1-mika.westerberg@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-intel.c b/drivers/spi/spi-intel.c
index 52d4332..55f4ee2 100644 (file)
--- a/drivers/spi/spi-intel.c
+++ b/drivers/spi/spi-intel.c
@@ -1100,6 +1100,7 @@ static int intel_spi_init(struct intel_spi *ispi)
                ispi->pregs = ispi->base + CNL_PR;
                ispi->nregions = CNL_FREG_NUM;
                ispi->pr_num = CNL_PR_NUM;
+               erase_64k = true;
                break;
 
        default: