dt-bindings: ddr: Add bindings for LPDDR3 memories

Specifies the AC timing parameters of the LPDDR3 memory device.

Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

diff --git a/Documentation/devicetree/bindings/ddr/lpddr3-timings.txt b/Documentation/devicetree/bindings/ddr/lpddr3-timings.txt
new file mode 100644 (file)
index 0000000..84705e5
--- /dev/null
+++ b/Documentation/devicetree/bindings/ddr/lpddr3-timings.txt
@@ -0,0 +1,58 @@
+* AC timing parameters of LPDDR3 memories for a given speed-bin.
+
+The structures are based on LPDDR2 and extended where needed.
+
+Required properties:
+- compatible : Should be "jedec,lpddr3-timings"
+- min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32>
+- reg : maximum DDR clock frequency for the speed-bin. Type is <u32>
+
+Optional properties:
+
+The following properties represent AC timing parameters from the memory
+data-sheet of the device for a given speed-bin. All these properties are
+of type <u32> and the default unit is ps (pico seconds).
+- tRFC
+- tRRD
+- tRPab
+- tRPpb
+- tRCD
+- tRC
+- tRAS
+- tWTR
+- tWR
+- tRTP
+- tW2W-C2C
+- tR2R-C2C
+- tFAW
+- tXSR
+- tXP
+- tCKE
+- tCKESR
+- tMRD
+
+Example:
+
+timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 {
+       compatible      = "jedec,lpddr3-timings";
+       reg             = <800000000>; /* workaround: it shows max-freq */
+       min-freq        = <100000000>;
+       tRFC            = <65000>;
+       tRRD            = <6000>;
+       tRPab           = <12000>;
+       tRPpb           = <12000>;
+       tRCD            = <10000>;
+       tRC             = <33750>;
+       tRAS            = <23000>;
+       tWTR            = <3750>;
+       tWR             = <7500>;
+       tRTP            = <3750>;
+       tW2W-C2C        = <0>;
+       tR2R-C2C        = <0>;
+       tFAW            = <25000>;
+       tXSR            = <70000>;
+       tXP             = <3750>;
+       tCKE            = <3750>;
+       tCKESR          = <3750>;
+       tMRD            = <7000>;
+};

diff --git a/Documentation/devicetree/bindings/ddr/lpddr3.txt b/Documentation/devicetree/bindings/ddr/lpddr3.txt
new file mode 100644 (file)
index 0000000..3b2485b
--- /dev/null
+++ b/Documentation/devicetree/bindings/ddr/lpddr3.txt
@@ -0,0 +1,97 @@
+* LPDDR3 SDRAM memories compliant to JEDEC JESD209-3C
+
+Required properties:
+- compatible : Should be  - "jedec,lpddr3"
+- density  : <u32> representing density in Mb (Mega bits)
+- io-width : <u32> representing bus width. Possible values are 8, 16, 32, 64
+- #address-cells: Must be set to 1
+- #size-cells: Must be set to 0
+
+Optional properties:
+
+The following optional properties represent the minimum value of some AC
+timing parameters of the DDR device in terms of number of clock cycles.
+These values shall be obtained from the device data-sheet.
+- tRFC-min-tck
+- tRRD-min-tck
+- tRPab-min-tck
+- tRPpb-min-tck
+- tRCD-min-tck
+- tRC-min-tck
+- tRAS-min-tck
+- tWTR-min-tck
+- tWR-min-tck
+- tRTP-min-tck
+- tW2W-C2C-min-tck
+- tR2R-C2C-min-tck
+- tWL-min-tck
+- tDQSCK-min-tck
+- tRL-min-tck
+- tFAW-min-tck
+- tXSR-min-tck
+- tXP-min-tck
+- tCKE-min-tck
+- tCKESR-min-tck
+- tMRD-min-tck
+
+Child nodes:
+- The lpddr3 node may have one or more child nodes of type "lpddr3-timings".
+  "lpddr3-timings" provides AC timing parameters of the device for
+  a given speed-bin. Please see Documentation/devicetree/
+  bindings/ddr/lpddr3-timings.txt for more information on "lpddr3-timings"
+
+Example:
+
+samsung_K3QF2F20DB: lpddr3 {
+       compatible      = "Samsung,K3QF2F20DB", "jedec,lpddr3";
+       density         = <16384>;
+       io-width        = <32>;
+       #address-cells  = <1>;
+       #size-cells     = <0>;
+
+       tRFC-min-tck            = <17>;
+       tRRD-min-tck            = <2>;
+       tRPab-min-tck           = <2>;
+       tRPpb-min-tck           = <2>;
+       tRCD-min-tck            = <3>;
+       tRC-min-tck             = <6>;
+       tRAS-min-tck            = <5>;
+       tWTR-min-tck            = <2>;
+       tWR-min-tck             = <7>;
+       tRTP-min-tck            = <2>;
+       tW2W-C2C-min-tck        = <0>;
+       tR2R-C2C-min-tck        = <0>;
+       tWL-min-tck             = <8>;
+       tDQSCK-min-tck          = <5>;
+       tRL-min-tck             = <14>;
+       tFAW-min-tck            = <5>;
+       tXSR-min-tck            = <12>;
+       tXP-min-tck             = <2>;
+       tCKE-min-tck            = <2>;
+       tCKESR-min-tck          = <2>;
+       tMRD-min-tck            = <5>;
+
+       timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 {
+               compatible      = "jedec,lpddr3-timings";
+               reg             = <800000000>; /* workaround: it shows max-freq */
+               min-freq        = <100000000>;
+               tRFC            = <65000>;
+               tRRD            = <6000>;
+               tRPab           = <12000>;
+               tRPpb           = <12000>;
+               tRCD            = <10000>;
+               tRC             = <33750>;
+               tRAS            = <23000>;
+               tWTR            = <3750>;
+               tWR             = <7500>;
+               tRTP            = <3750>;
+               tW2W-C2C        = <0>;
+               tR2R-C2C        = <0>;
+               tFAW            = <25000>;
+               tXSR            = <70000>;
+               tXP             = <3750>;
+               tCKE            = <3750>;
+               tCKESR          = <3750>;
+               tMRD            = <7000>;
+       };
+}