reset: simple: Enable for ASPEED systems

ASPEED BMC SoCs have a reset controller in the LPC IP that can be
controlled using this driver to release the UARTs from reset.

No special configuration is required, so only the compatible string is
added.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 7fc7769..18f152d 100644 (file)
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -83,14 +83,18 @@ config RESET_PISTACHIO
 
 config RESET_SIMPLE
        bool "Simple Reset Controller Driver" if COMPILE_TEST
-       default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX
+       default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED
        help
          This enables a simple reset controller driver for reset lines that
          that can be asserted and deasserted by toggling bits in a contiguous,
          exclusive register space.
 
-         Currently this driver supports Altera SoCFPGAs, the RCC reset
-         controller in STM32 MCUs, Allwinner SoCs, and ZTE's zx2967 family.
+         Currently this driver supports:
+          - Altera SoCFPGAs
+          - ASPEED BMC SoCs
+          - RCC reset controller in STM32 MCUs
+          - Allwinner SoCs
+          - ZTE's zx2967 family
 
 config RESET_SUNXI
        bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI

diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
index 2d4f362..f7ce891 100644 (file)
--- a/drivers/reset/reset-simple.c
+++ b/drivers/reset/reset-simple.c
@@ -125,6 +125,8 @@ static const struct of_device_id reset_simple_dt_ids[] = {
                .data = &reset_simple_active_low },
        { .compatible = "zte,zx296718-reset",
                .data = &reset_simple_active_low },
+       { .compatible = "aspeed,ast2400-lpc-reset" },
+       { .compatible = "aspeed,ast2500-lpc-reset" },
        { /* sentinel */ },
 };