Fix surface state size
authorXiang, Haihao <haihao.xiang@intel.com>
Fri, 10 Feb 2012 06:07:33 +0000 (14:07 +0800)
committerXiang, Haihao <haihao.xiang@intel.com>
Fri, 10 Feb 2012 06:07:33 +0000 (14:07 +0800)
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
src/gen6_vme.c

index 695d326..41c64ae 100644 (file)
@@ -45,7 +45,7 @@
 
 #define SURFACE_STATE_PADDED_SIZE_0_GEN6        ALIGN(sizeof(struct i965_surface_state), 32)
 #define SURFACE_STATE_PADDED_SIZE_1_GEN6        ALIGN(sizeof(struct i965_surface_state2), 32)
-#define SURFACE_STATE_PADDED_SIZE_GEN6          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN6, SURFACE_STATE_PADDED_SIZE_1_GEN7)
+#define SURFACE_STATE_PADDED_SIZE_GEN6          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN6, SURFACE_STATE_PADDED_SIZE_1_GEN6)
 
 #define SURFACE_STATE_PADDED_SIZE               MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7)
 #define SURFACE_STATE_OFFSET(index)             (SURFACE_STATE_PADDED_SIZE * index)