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RDMA/cxgb3: Endianness annotation for irs field
author
Roland Dreier
<rolandd@cisco.com>
Fri, 25 Jan 2008 22:15:42 +0000
(14:15 -0800)
committer
Roland Dreier
<rolandd@cisco.com>
Fri, 25 Jan 2008 22:15:42 +0000
(14:15 -0800)
t3_rdma_init_wr.irs is a big-endian field, so declare it as __be32.
This fixes one sparse warning.
Signed-off-by: Roland Dreier <rolandd@cisco.com>
drivers/infiniband/hw/cxgb3/cxio_wr.h
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diff --git
a/drivers/infiniband/hw/cxgb3/cxio_wr.h
b/drivers/infiniband/hw/cxgb3/cxio_wr.h
index
c84d4ac
..
de366b0
100644
(file)
--- a/
drivers/infiniband/hw/cxgb3/cxio_wr.h
+++ b/
drivers/infiniband/hw/cxgb3/cxio_wr.h
@@
-315,7
+315,7
@@
struct t3_rdma_init_wr {
__be32 ird;
__be64 qp_dma_addr; /* 7 */
__be32 qp_dma_size; /* 8 */
-
u
32 irs;
+
__be
32 irs;
};
struct t3_genbit {