(xor:V_128_256 (match_operand:V_128_256 1 "register_operand")
(match_operand:V_128_256 2 "register_operand"))
(match_operand:V_128_256 3 "nonimmediate_operand"))
- (match_operand:V_128_256 4 "register_operand")))]
- "TARGET_XOP
- && (REGNO (operands[4]) == REGNO (operands[1])
- || REGNO (operands[4]) == REGNO (operands[2]))"
+ (match_dup 1)))]
+ "TARGET_XOP"
[(set (match_dup 0) (if_then_else:V_128_256 (match_dup 3)
- (match_dup 5)
- (match_dup 4)))]
-{
- /* To handle the commutivity of XOR, operands[4] is either operands[1]
- or operands[2], we need operands[5] to be the other one. */
- if (REGNO (operands[4]) == REGNO (operands[1]))
- operands[5] = operands[2];
- else
- operands[5] = operands[1];
-})
+ (match_dup 2)
+ (match_dup 1)))])
+(define_split
+ [(set (match_operand:V_128_256 0 "register_operand")
+ (xor:V_128_256
+ (and:V_128_256
+ (xor:V_128_256 (match_operand:V_128_256 1 "register_operand")
+ (match_operand:V_128_256 2 "register_operand"))
+ (match_operand:V_128_256 3 "nonimmediate_operand"))
+ (match_dup 2)))]
+ "TARGET_XOP"
+ [(set (match_dup 0) (if_then_else:V_128_256 (match_dup 3)
+ (match_dup 1)
+ (match_dup 2)))])
;; XOP horizontal add/subtract instructions
(define_insn "xop_phadd<u>bw"
--- /dev/null
+/* PR target/105993 */
+/* { dg-do compile } */
+/* { dg-options "-O -mxop" } */
+
+typedef unsigned short __attribute__((__vector_size__ (16))) V;
+V x, y, z;
+
+char c;
+short s;
+
+V
+foo (void)
+{
+ V u = __builtin_shufflevector (z, y, 2, 1, 0, 8, 4, 1, 7, 2);
+ V v = ~(__builtin_bswap16 (s) & (u ^ c));
+
+ return v;
+}