bit_mode=<12>;
bit_resolution=<0>;
};
+
arm_pmu {
compatible = "arm,cortex-a15-pmu";
- interrupts = <0 137 4>;
- reg = <0xff634400 0x1000>;
-
- /* addr = base + offset << 2 */
- sys_cpu_status0_offset = <0xa0>;
-
- sys_cpu_status0_pmuirq_mask = <0xf>;
-
+ /* clusterb-enabled; */
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xff634680 0x4>;
+ cpumasks = <0xf>;
/* default 10ms */
- relax_timer_ns = <10000000>;
-
+ relax-timer-ns = <10000000>;
/* default 10000us */
- max_wait_cnt = <10000>;
+ max-wait-cnt = <10000>;
};
-
gic: interrupt-controller@2c001000 {
compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
#interrupt-cells = <3>;
bit_mode=<12>;
bit_resolution=<0>;
};
+
arm_pmu {
compatible = "arm,cortex-a15-pmu";
- interrupts = <0 137 4>;
- reg = <0xff634400 0x1000>;
-
- /* addr = base + offset << 2 */
- sys_cpu_status0_offset = <0xa0>;
-
- sys_cpu_status0_pmuirq_mask = <0xf>;
-
+ /* clusterb-enabled; */
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xff634680 0x4>;
+ cpumasks = <0xf>;
/* default 10ms */
- relax_timer_ns = <10000000>;
-
+ relax-timer-ns = <10000000>;
/* default 10000us */
- max_wait_cnt = <10000>;
+ max-wait-cnt = <10000>;
};
gic: interrupt-controller@2c001000 {
};
timer {
- compatible = "arm,armv8-timer";
+ compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 0xff08>,
<GIC_PPI 14 0xff08>,
<GIC_PPI 11 0xff08>,
bit_mode=<12>;
bit_resolution=<0>;
};
+
arm_pmu {
- compatible = "arm,armv8-pmuv3";
- interrupts = <0 137 4>;
+ compatible = "arm,cortex-a15-pmu";
+ clusterb-enabled;
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xff634680 0x4>,
+ <0xff6347c0 0x04>;
+ cpumasks = <0x3 0x3C>;
+ /* default 10ms */
+ relax-timer-ns = <10000000>;
+ /* default 10000us */
+ max-wait-cnt = <10000>;
};
gic: interrupt-controller@2c001000 {
arm_pmu {
compatible = "arm,cortex-a15-pmu";
- interrupts = <0 137 4>;
- reg = <0xc8834400 0x1000>;
-
- /* addr = base + offset << 2 */
- sys_cpu_status0_offset = <0xa0>;
-
- sys_cpu_status0_pmuirq_mask = <0xf>;
-
+ /* clusterb-enabled; */
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xc8834400 0x4>;
+ cpumasks = <0xf>;
/* default 10ms */
- relax_timer_ns = <10000000>;
-
+ relax-timer-ns = <10000000>;
/* default 10000us */
- max_wait_cnt = <10000>;
+ max-wait-cnt = <10000>;
};
gic: interrupt-controller@2c001000 {
};
timer {
- compatible = "arm,armv8-timer";
+ compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 0xff08>,
<GIC_PPI 14 0xff08>,
<GIC_PPI 11 0xff08>,
bit_mode=<12>;
bit_resolution=<0>;
};
+
arm_pmu {
- compatible = "arm,armv8-pmuv3";
- interrupts = <0 137 4>,
- <0 138 4>,
- <0 153 4>,
- <0 154 4>;
+ compatible = "arm,cortex-a15-pmu";
+ /* clusterb-enabled; */
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xc8834400 0x4>;
+ cpumasks = <0xf>;
+ /* default 10ms */
+ relax-timer-ns = <10000000>;
+ /* default 10000us */
+ max-wait-cnt = <10000>;
};
gic: interrupt-controller@2c001000 {
};
timer {
- compatible = "arm,armv8-timer";
+ compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 0xff08>,
<GIC_PPI 14 0xff08>,
<GIC_PPI 11 0xff08>,
bit_mode=<12>;
bit_resolution=<0>;
};
+
arm_pmu {
- compatible = "arm,armv8-pmuv3";
- interrupts = <0 137 4>,
- <0 138 4>,
- <0 153 4>,
- <0 154 4>;
+ compatible = "arm,cortex-a15-pmu";
+ /* clusterb-enabled; */
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xc8834400 0x4>;
+ cpumasks = <0xf>;
+ /* default 10ms */
+ relax-timer-ns = <10000000>;
+ /* default 10000us */
+ max-wait-cnt = <10000>;
};
gic: interrupt-controller@2c001000 {
+++ /dev/null
-/*
- * arch/arm/boot/dts/amlogic/mesontl1.dtsi
- *
- * Copyright (C) 2018 Amlogic, Inc. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/gpio/meson-tl1-gpio.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/meson_rc.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/pwm/pwm.h>
-#include <dt-bindings/pwm/meson.h>
-#include <dt-bindings/clock/amlogic,tl1-clkc.h>
-#include <dt-bindings/clock/amlogic,tl1-audio-clk.h>
-#include "mesong12a-bifrost.dtsi"
-
-/ {
- interrupt-parent = <&gic>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus:cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- #cooling-cells = <2>;/* min followed by max */
- CPU0:cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a9";
- reg = <0x0>;
- //timer=<&timer_a>;
- enable-method = "psci";
- clocks = <&scpi_dvfs 0>;
- clock-names = "cpu-cluster.0";
- //cpu-idle-states = <&SYSTEM_SLEEP_0>;
- };
-
- CPU1:cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a9";
- reg = <0x1>;
- //timer=<&timer_b>;
- enable-method = "psci";
- clocks = <&scpi_dvfs 0>;
- clock-names = "cpu-cluster.0";
- //cpu-idle-states = <&SYSTEM_SLEEP_0>;
- };
-
- CPU2:cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a9";
- reg = <0x2>;
- //timer=<&timer_c>;
- enable-method = "psci";
- clocks = <&scpi_dvfs 0>;
- clock-names = "cpu-cluster.0";
- //cpu-idle-states = <&SYSTEM_SLEEP_0>;
- };
-
- CPU3:cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a9";
- reg = <0x0 0x3>;
- //timer=<&timer_d>;
- enable-method = "psci";
- clocks = <&scpi_dvfs 0>;
- clock-names = "cpu-cluster.0";
- //cpu-idle-states = <&SYSTEM_SLEEP_0>;
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 0xff01>,
- <GIC_PPI 14 0xff01>,
- <GIC_PPI 11 0xff01>,
- <GIC_PPI 10 0xff01>;
- };
-
- timer_bc {
- compatible = "arm, meson-bc-timer";
- reg = <0xffd0f190 0x4 0xffd0f194 0x4>;
- timer_name = "Meson TimerF";
- clockevent-rating =<300>;
- clockevent-shift =<20>;
- clockevent-features =<0x23>;
- interrupts = <0 60 1>;
- bit_enable =<16>;
- bit_mode =<12>;
- bit_resolution =<0>;
- };
-
- gic: interrupt-controller@2c001000 {
- compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0xffc01000 0x1000>,
- <0xffc02000 0x0100>;
- interrupts = <GIC_PPI 9 0xf04>;
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- scpi_clocks {
- compatible = "arm, scpi-clks";
-
- scpi_dvfs: scpi_clocks@0 {
- compatible = "arm, scpi-clk-indexed";
- #clock-cells = <1>;
- clock-indices = <0>;
- clock-output-names = "vcpu";
- };
- };
-
- secmon {
- compatible = "amlogic, secmon";
- memory-region = <&secmon_reserved>;
- in_base_func = <0x82000020>;
- out_base_func = <0x82000021>;
- reserve_mem_size = <0x00300000>;
- };
-
- securitykey {
- compatible = "amlogic, securitykey";
- status = "okay";
- storage_query = <0x82000060>;
- storage_read = <0x82000061>;
- storage_write = <0x82000062>;
- storage_tell = <0x82000063>;
- storage_verify = <0x82000064>;
- storage_status = <0x82000065>;
- storage_list = <0x82000067>;
- storage_remove = <0x82000068>;
- storage_in_func = <0x82000023>;
- storage_out_func = <0x82000024>;
- storage_block_func = <0x82000025>;
- storage_size_func = <0x82000027>;
- storage_set_enctype = <0x8200006A>;
- storage_get_enctype = <0x8200006B>;
- storage_version = <0x8200006C>;
- };
-
- cpu_iomap {
- compatible = "amlogic, iomap";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- io_cbus_base {
- reg = <0xffd00000 0x101000>;
- };
- io_apb_base {
- reg = <0xffe01000 0x19f000>;
- };
- io_aobus_base {
- reg = <0xff800000 0x100000>;
- };
- io_vapb_base {
- reg = <0xff900000 0x200000>;
- };
- io_hiu_base {
- reg = <0xff63c000 0x2000>;
- };
- };
-
- xtal: xtal-clk {
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- clock-output-names = "xtal";
- #clock-cells = <0>;
- };
-
- meson_suspend: pm {
- compatible = "amlogic, pm";
- /*gxbaby-suspend;*/
- status = "okay";
- reg = <0xff8000a8 0x4>,
- <0xff80023c 0x4>;
- };
-
- cpuinfo {
- compatible = "amlogic, cpuinfo";
- status = "okay";
- cpuinfo_cmd = <0x82000044>;
- };
-
- reboot {
- compatible = "amlogic,reboot";
- sys_reset = <0x84000009>;
- sys_poweroff = <0x84000008>;
- };
-
- ram-dump {
- compatible = "amlogic, ram_dump";
- status = "okay";
- };
-
- vpu {
- compatible = "amlogic, vpu-tl1";
- status = "okay";
- clocks = <&clkc CLKID_VAPB_MUX>,
- <&clkc CLKID_VPU_INTR>,
- <&clkc CLKID_VPU_P0_COMP>,
- <&clkc CLKID_VPU_P1_COMP>,
- <&clkc CLKID_VPU_MUX>;
- clock-names = "vapb_clk",
- "vpu_intr_gate",
- "vpu_clk0",
- "vpu_clk1",
- "vpu_clk";
- clk_level = <7>;
- /* 0: 100.0M 1: 166.7M 2: 200.0M 3: 250.0M */
- /* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */
- };
-
- pinctrl_aobus: pinctrl@ff800014 {
- compatible = "amlogic,meson-tl1-aobus-pinctrl";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- gpio_ao: ao-bank@ff800014 {
- reg = <0xff800014 0x8>,
- <0xff800024 0x14>,
- <0xff80001c 0x8>;
- reg-names = "mux", "gpio", "drive-strength";
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- aoceca_mux:aoceca_mux {
- mux {
- groups = "cec_ao_a";
- function = "cec_ao";
- };
- };
-
- aocecb_mux:aocecb_mux {
- mux {
- groups = "cec_ao_b";
- function = "cec_ao";
- };
- };
- };
-
- pinctrl_periphs: pinctrl@ff6346c0 {
- compatible = "amlogic,meson-tl1-periphs-pinctrl";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- gpio: banks@ff6346c0 {
- reg = <0xff6346c0 0x40>,
- <0xff6344e8 0x18>,
- <0xff634520 0x18>,
- <0xff634440 0x4c>,
- <0xff634740 0x1c>;
- reg-names = "mux",
- "pull",
- "pull-enable",
- "gpio",
- "drive-strength";
- gpio-controller;
- #gpio-cells = <2>;
- };
-
-
- hdmirx_a_mux:hdmirx_a_mux {
- mux {
- groups = "hdmirx_a_hpd", "hdmirx_a_det",
- "hdmirx_a_sda", "hdmirx_a_sck";
- function = "hdmirx_a";
- };
- };
-
- hdmirx_b_mux:hdmirx_b_mux {
- mux {
- groups = "hdmirx_b_hpd", "hdmirx_b_det",
- "hdmirx_b_sda", "hdmirx_b_sck";
- function = "hdmirx_b";
- };
- };
-
- hdmirx_c_mux:hdmirx_c_mux {
- mux {
- groups = "hdmirx_c_hpd", "hdmirx_c_det",
- "hdmirx_c_sda", "hdmirx_c_sck";
- function = "hdmirx_c";
- };
- };
-
- };
-
- wdt: watchdog@0xffd0f0d0 {
- compatible = "amlogic, meson-wdt";
- status = "okay";
- default_timeout=<10>;
- reset_watchdog_method=<1>; /* 0:sysfs,1:kernel */
- reset_watchdog_time=<2>;
- shutdown_timeout=<10>;
- firmware_timeout=<6>;
- suspend_timeout=<6>;
- reg = <0xffd0f0d0 0x10>;
- clock-names = "xtal";
- clocks = <&xtal>;
- };
-
- jtag {
- compatible = "amlogic, jtag";
- status = "disabled";
- select = "apao"; /* disable/apao/apee */
- jtagao-gpios = <&gpio_ao GPIOAO_6 0
- &gpio_ao GPIOAO_7 0
- &gpio_ao GPIOAO_8 0
- &gpio_ao GPIOAO_9 0>;
- jtagee-gpios = <&gpio GPIOC_0 0
- &gpio GPIOC_1 0
- &gpio GPIOC_4 0
- &gpio GPIOC_5 0>;
- };
-
- soc {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- hiubus: hiubus@ff63c000 {
- compatible = "simple-bus";
- reg = <0xff63c000 0x2000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0xff63c000 0x2000>;
-
- clkc: clock-controller@0 {
- compatible = "amlogic,tl1-clkc";
- #clock-cells = <1>;
- reg = <0x0 0x3fc>;
- };
- };/* end of hiubus*/
-
- audiobus: audiobus@0xff600000 {
- compatible = "amlogic, audio-controller", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0xff600000 0x10000>;
- ranges = <0x0 0xff600000 0x10000>;
-
- clkaudio:audio_clocks {
- compatible = "amlogic, tl1-audio-clocks";
- #clock-cells = <1>;
- reg = <0x0 0xb0>;
- };
-
- ddr_manager {
- compatible = "amlogic, tl1-audio-ddr-manager";
- interrupts = <
- GIC_SPI 148 IRQ_TYPE_EDGE_RISING
- GIC_SPI 149 IRQ_TYPE_EDGE_RISING
- GIC_SPI 150 IRQ_TYPE_EDGE_RISING
- GIC_SPI 48 IRQ_TYPE_EDGE_RISING
- GIC_SPI 152 IRQ_TYPE_EDGE_RISING
- GIC_SPI 153 IRQ_TYPE_EDGE_RISING
- GIC_SPI 154 IRQ_TYPE_EDGE_RISING
- GIC_SPI 49 IRQ_TYPE_EDGE_RISING
- >;
- interrupt-names =
- "toddr_a", "toddr_b", "toddr_c",
- "toddr_d",
- "frddr_a", "frddr_b", "frddr_c",
- "frddr_d";
- };
- };/* end of audiobus*/
-
- /* Sound iomap */
- aml_snd_iomap {
- compatible = "amlogic, snd-iomap";
- status = "okay";
- #address-cells=<1>;
- #size-cells=<1>;
- ranges;
- pdm_bus {
- reg = <0xFF601000 0x400>;
- };
- audiobus_base {
- reg = <0xFF600000 0x1000>;
- };
- audiolocker_base {
- reg = <0xFF601400 0x400>;
- };
- eqdrc_base {
- reg = <0xFF602000 0x2000>;
- };
- reset_base {
- reg = <0xFFD01000 0x1000>;
- };
- vad_base {
- reg = <0xFF601800 0x800>;
- };
- };
-
- cbus: cbus@ffd00000 {
- compatible = "simple-bus";
- reg = <0xffd00000 0x27000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0xffd00000 0x27000>;
-
- clk-measure@18004 {
- compatible = "amlogic,tl1-measure";
- reg = <0x18004 0x4 0x1800c 0x4>;
- };
-
- i2c0: i2c@1f000 {
- compatible = "amlogic,meson-i2c";
- status = "disabled";
- reg = <0x1f000 0x20>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 91 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- clock-frequency = <100000>;
- };
-
- i2c1: i2c@1e000 {
- compatible = "amlogic,meson-i2c";
- status = "disabled";
- reg = <0x1e000 0x20>;
- interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 92 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- clock-frequency = <100000>;
- };
-
- i2c2: i2c@1d000 {
- compatible = "amlogic,meson-i2c";
- status = "disabled";
- reg = <0x1d000 0x20>;
- interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 94 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- clock-frequency = <100000>;
- };
-
- i2c3: i2c@1c000 {
- compatible = "amlogic,meson-i2c";
- status = "disabled";
- reg = <0x1c000 0x20>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 95 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- clock-frequency = <100000>;
- };
-
- gpio_intc: interrupt-controller@f080 {
- compatible = "amlogic,meson-gpio-intc",
- "amlogic,meson-tl1-gpio-intc";
- reg = <0xf080 0x10>;
- interrupt-controller;
- #interrupt-cells = <2>;
- amlogic,channel-interrupts =
- <64 65 66 67 68 69 70 71>;
- status = "okay";
- };
-
- pwm_ab: pwm@1b000 {
- compatible = "amlogic,tl1-ee-pwm";
- reg = <0x1b000 0x20>;
- #pwm-cells = <3>;
- clocks = <&xtal>,
- <&xtal>,
- <&xtal>,
- <&xtal>;
- clock-names = "clkin0",
- "clkin1",
- "clkin2",
- "clkin3";
- /* default xtal 24m clkin0-clkin2 and
- * clkin1-clkin3 should be set the same
- */
- status = "disabled";
- };
-
- pwm_cd: pwm@1a000 {
- compatible = "amlogic,tl1-ee-pwm";
- reg = <0x1a000 0x20>;
- #pwm-cells = <3>;
- clocks = <&xtal>,
- <&xtal>,
- <&xtal>,
- <&xtal>;
- clock-names = "clkin0",
- "clkin1",
- "clkin2",
- "clkin3";
- status = "disabled";
- };
-
- pwm_ef: pwm@19000 {
- compatible = "amlogic,tl1-ee-pwm";
- reg = <0x19000 0x20>;
- #pwm-cells = <3>;
- clocks = <&xtal>,
- <&xtal>,
- <&xtal>,
- <&xtal>;
- clock-names = "clkin0",
- "clkin1",
- "clkin2",
- "clkin3";
- status = "disabled";
- };
-
- spicc0: spi@13000 {
- compatible = "amlogic,meson-tl1-spicc",
- "amlogic,meson-g12a-spicc";
- reg = <0x13000 0x44>;
- interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_SPICC0>,
- <&clkc CLKID_SPICC0_COMP>;
- clock-names = "core", "comp";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spicc1: spi@15000 {
- compatible = "amlogic,meson-tl1-spicc",
- "amlogic,meson-g12a-spicc";
- reg = <0x15000 0x44>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_SPICC1>,
- <&clkc CLKID_SPICC1_COMP>;
- clock-names = "core", "comp";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
- };
-
- aobus: aobus@ff800000 {
- compatible = "simple-bus";
- reg = <0xff800000 0xb000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0xff800000 0xb000>;
-
- cpu_version {
- reg = <0x220 0x4>;
- };
-
- aoclkc: clock-controller@0 {
- compatible = "amlogic,tl1-aoclkc";
- #clock-cells = <1>;
- reg = <0x0 0x1000>;
- };
-
- pwm_AO_ab: pwm@7000 {
- compatible = "amlogic,tl1-ao-pwm";
- reg = <0x7000 0x20>;
- #pwm-cells = <3>;
- clocks = <&xtal>,
- <&xtal>,
- <&xtal>,
- <&xtal>;
- clock-names = "clkin0",
- "clkin1",
- "clkin2",
- "clkin3";
- status = "disabled";
- };
-
- pwm_AO_cd: pwm@2000 {
- compatible = "amlogic,tl1-ao-pwm";
- reg = <0x2000 0x20>;
- #pwm-cells = <3>;
- clocks = <&xtal>,
- <&xtal>,
- <&xtal>,
- <&xtal>;
- clock-names = "clkin0",
- "clkin1",
- "clkin2",
- "clkin3";
- status = "disabled";
- };
-
- uart_AO: serial@3000 {
- compatible = "amlogic, meson-uart";
- reg = <0x3000 0x18>;
- interrupts = <0 193 1>;
- status = "okay";
- clocks = <&xtal>;
- clock-names = "clk_uart";
- xtal_tick_en = <1>;
- fifosize = < 64 >;
- //pinctrl-names = "default";
- //pinctrl-0 = <&ao_a_uart_pins>;
- /* 0 not support; 1 support */
- support-sysrq = <0>;
- };
-
- remote: rc@8040 {
- compatible = "amlogic, aml_remote";
- reg = <0x8040 0x44>,
- <0x8000 0x20>;
- status = "okay";
- protocol = <REMOTE_TYPE_NEC>;
- interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
- pinctrl-names = "default";
- pinctrl-0 = <&remote_pins>;
- map = <&custom_maps>;
- max_frame_time = <200>;
- };
-
- i2c_AO: i2c@5000 {
- compatible = "amlogic,meson-i2c";
- status = "disabled";
- reg = <0x05000 0x20>;
- interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 201 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- clock-frequency = <100000>;
- };
-
- i2c_AO_slave:i2c_slave@6000 {
- compatible = "amlogic, meson-i2c-slave";
- status = "disabled";
- reg = <0x0 0x6000 0x0 0x20>;
- interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;
- pinctrl-names="default";
- pinctrl-0=<&i2c_ao_slave_pins>;
- };
- };/* end of aobus */
-
- ion_dev {
- compatible = "amlogic, ion_dev";
- status = "okay";
- memory-region = <&ion_cma_reserved>;
- };/* end of ion_dev*/
- }; /* end of soc*/
-
- custom_maps: custom_maps {
- mapnum = <3>;
- map0 = <&map_0>;
- map1 = <&map_1>;
- map2 = <&map_2>;
- map_0: map_0{
- mapname = "amlogic-remote-1";
- customcode = <0xfb04>;
- release_delay = <80>;
- size = <44>; /*keymap size*/
- keymap = <REMOTE_KEY(0x01, KEY_1)
- REMOTE_KEY(0x02, KEY_2)
- REMOTE_KEY(0x03, KEY_3)
- REMOTE_KEY(0x04, KEY_4)
- REMOTE_KEY(0x05, KEY_5)
- REMOTE_KEY(0x06, KEY_6)
- REMOTE_KEY(0x07, KEY_7)
- REMOTE_KEY(0x08, KEY_8)
- REMOTE_KEY(0x09, KEY_9)
- REMOTE_KEY(0x0a, KEY_0)
- REMOTE_KEY(0x1F, KEY_FN_F1)
- REMOTE_KEY(0x15, KEY_MENU)
- REMOTE_KEY(0x16, KEY_TAB)
- REMOTE_KEY(0x0c, KEY_CHANNELUP)
- REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
- REMOTE_KEY(0x0e, KEY_VOLUMEUP)
- REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
- REMOTE_KEY(0x11, KEY_HOME)
- REMOTE_KEY(0x1c, KEY_RIGHT)
- REMOTE_KEY(0x1b, KEY_LEFT)
- REMOTE_KEY(0x19, KEY_UP)
- REMOTE_KEY(0x1a, KEY_DOWN)
- REMOTE_KEY(0x1d, KEY_ENTER)
- REMOTE_KEY(0x17, KEY_MUTE)
- REMOTE_KEY(0x49, KEY_FINANCE)
- REMOTE_KEY(0x43, KEY_BACK)
- REMOTE_KEY(0x12, KEY_FN_F4)
- REMOTE_KEY(0x14, KEY_FN_F5)
- REMOTE_KEY(0x18, KEY_FN_F6)
- REMOTE_KEY(0x59, KEY_INFO)
- REMOTE_KEY(0x5a, KEY_STOPCD)
- REMOTE_KEY(0x10, KEY_POWER)
- REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
- REMOTE_KEY(0x44, KEY_NEXTSONG)
- REMOTE_KEY(0x1e, KEY_REWIND)
- REMOTE_KEY(0x4b, KEY_FASTFORWARD)
- REMOTE_KEY(0x58, KEY_PLAYPAUSE)
- REMOTE_KEY(0x46, KEY_PROPS)
- REMOTE_KEY(0x40, KEY_UNDO)
- REMOTE_KEY(0x38, KEY_SCROLLLOCK)
- REMOTE_KEY(0x57, KEY_FN)
- REMOTE_KEY(0x5b, KEY_FN_ESC)
- REMOTE_KEY(0x13, 195)
- REMOTE_KEY(0x54, KEY_RED)
- REMOTE_KEY(0x4c, KEY_GREEN)
- REMOTE_KEY(0x4e, KEY_YELLOW)
- REMOTE_KEY(0x55, KEY_BLUE)
- REMOTE_KEY(0x53, KEY_BLUETOOTH)
- REMOTE_KEY(0x52, KEY_WLAN)
- REMOTE_KEY(0x39, KEY_CAMERA)
- REMOTE_KEY(0x41, KEY_SOUND)
- REMOTE_KEY(0x0b, KEY_QUESTION)
- REMOTE_KEY(0x00, KEY_CHAT)
- REMOTE_KEY(0x13, KEY_SEARCH)>;
- };
-
- map_1: map_1{
- mapname = "amlogic-remote-2";
- customcode = <0xfe01>;
- release_delay = <80>;
- size = <53>;
- keymap = <REMOTE_KEY(0x01, KEY_1)
- REMOTE_KEY(0x02, KEY_2)
- REMOTE_KEY(0x03, KEY_3)
- REMOTE_KEY(0x04, KEY_4)
- REMOTE_KEY(0x05, KEY_5)
- REMOTE_KEY(0x06, KEY_6)
- REMOTE_KEY(0x07, KEY_7)
- REMOTE_KEY(0x08, KEY_8)
- REMOTE_KEY(0x09, KEY_9)
- REMOTE_KEY(0x0a, KEY_0)
- REMOTE_KEY(0x1F, KEY_FN_F1)
- REMOTE_KEY(0x15, KEY_MENU)
- REMOTE_KEY(0x16, KEY_TAB)
- REMOTE_KEY(0x0c, KEY_CHANNELUP)
- REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
- REMOTE_KEY(0x0e, KEY_VOLUMEUP)
- REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
- REMOTE_KEY(0x11, KEY_HOME)
- REMOTE_KEY(0x1c, KEY_RIGHT)
- REMOTE_KEY(0x1b, KEY_LEFT)
- REMOTE_KEY(0x19, KEY_UP)
- REMOTE_KEY(0x1a, KEY_DOWN)
- REMOTE_KEY(0x1d, KEY_ENTER)
- REMOTE_KEY(0x17, KEY_MUTE)
- REMOTE_KEY(0x49, KEY_FINANCE)
- REMOTE_KEY(0x43, KEY_BACK)
- REMOTE_KEY(0x12, KEY_FN_F4)
- REMOTE_KEY(0x14, KEY_FN_F5)
- REMOTE_KEY(0x18, KEY_FN_F6)
- REMOTE_KEY(0x59, KEY_INFO)
- REMOTE_KEY(0x5a, KEY_STOPCD)
- REMOTE_KEY(0x10, KEY_POWER)
- REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
- REMOTE_KEY(0x44, KEY_NEXTSONG)
- REMOTE_KEY(0x1e, KEY_REWIND)
- REMOTE_KEY(0x4b, KEY_FASTFORWARD)
- REMOTE_KEY(0x58, KEY_PLAYPAUSE)
- REMOTE_KEY(0x46, KEY_PROPS)
- REMOTE_KEY(0x40, KEY_UNDO)
- REMOTE_KEY(0x38, KEY_SCROLLLOCK)
- REMOTE_KEY(0x57, KEY_FN)
- REMOTE_KEY(0x5b, KEY_FN_ESC)
- REMOTE_KEY(0x54, KEY_RED)
- REMOTE_KEY(0x4c, KEY_GREEN)
- REMOTE_KEY(0x4e, KEY_YELLOW)
- REMOTE_KEY(0x55, KEY_BLUE)
- REMOTE_KEY(0x53, KEY_BLUETOOTH)
- REMOTE_KEY(0x52, KEY_WLAN)
- REMOTE_KEY(0x39, KEY_CAMERA)
- REMOTE_KEY(0x41, KEY_SOUND)
- REMOTE_KEY(0x0b, KEY_QUESTION)
- REMOTE_KEY(0x00, KEY_CHAT)
- REMOTE_KEY(0x13, KEY_SEARCH)>;
- };
-
- map_2: map_2{
- mapname = "amlogic-remote-3";
- customcode = <0xbd02>;
- release_delay = <80>;
- size = <17>;
- keymap = <REMOTE_KEY(0xca,KEY_UP)
- REMOTE_KEY(0xd2,KEY_DOWN)
- REMOTE_KEY(0x99,KEY_LEFT)
- REMOTE_KEY(0xc1,KEY_RIGHT)
- REMOTE_KEY(0xce,KEY_RIGHTCTRL)
- REMOTE_KEY(0x45,KEY_POWER)
- REMOTE_KEY(0xc5,KEY_COPY)
- REMOTE_KEY(0x80,KEY_MUTE)
- REMOTE_KEY(0xd0,KEY_TAB)
- REMOTE_KEY(0xd6,KEY_LEFTMETA)
- REMOTE_KEY(0x95,KEY_HOME)
- REMOTE_KEY(0xdd,KEY_PAGEUP)
- REMOTE_KEY(0x8c,KEY_PAGEDOWN)
- REMOTE_KEY(0x89,KEY_UNDO)
- REMOTE_KEY(0x9c,KEY_PROPS)
- REMOTE_KEY(0x9a,KEY_SCALE)
- REMOTE_KEY(0xcd,KEY_KPCOMMA)>;
- };
- };
-
- sd_emmc_c: emmc@ffe07000 {
- status = "okay";
- compatible = "amlogic, meson-mmc-tl1";
- reg = <0xffe07000 0x800>;
- interrupts = <0 191 1>;
- pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
- pinctrl-0 = <&emmc_clk_cmd_pins>;
- pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_SD_EMMC_C_P0_COMP>,
- <&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_FCLK_DIV5>,
- <&xtal>;
- clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
-
- bus-width = <8>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- /* mmc-ddr-1_8v; */
- /* mmc-hs200-1_8v; */
-
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- emmc {
- pinname = "emmc";
- ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
- /*caps defined in dts*/
- tx_delay = <0>;
- max_req_size = <0x20000>; /**128KB*/
- gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
- hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
- card_type = <1>;
- /* 1:mmc card(include eMMC),
- * 2:sd card(include tSD)
- */
- };
- };
-
- sd_emmc_b: sd@ffe05000 {
- status = "okay";
- compatible = "amlogic, meson-mmc-tl1";
- reg = <0xffe05000 0x800>;
- interrupts = <0 190 1>;
-
- pinctrl-names = "sd_all_pins",
- "sd_clk_cmd_pins",
- "sd_1bit_pins",
- "sd_clk_cmd_uart_pins",
- "sd_1bit_uart_pins",
- "sd_to_ao_uart_pins",
- "ao_to_sd_uart_pins",
- "sd_to_ao_jtag_pins",
- "ao_to_sd_jtag_pins";
- pinctrl-0 = <&sd_all_pins>;
- pinctrl-1 = <&sd_clk_cmd_pins>;
- pinctrl-2 = <&sd_1bit_pins>;
- pinctrl-3 = <&sd_to_ao_uart_clr_pins
- &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
- pinctrl-4 = <&sd_to_ao_uart_clr_pins
- &sd_1bit_pins &ao_to_sd_uart_pins>;
- pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
- pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
- pinctrl-7 = <&sd_all_pins &sd_to_ao_uart_pins>;
- pinctrl-8 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
-
- clocks = <&clkc CLKID_SD_EMMC_B>,
- <&clkc CLKID_SD_EMMC_B_P0_COMP>,
- <&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_FCLK_DIV5>,
- <&xtal>;
- clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
-
- bus-width = <4>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- max-frequency = <100000000>;
- disable-wp;
- sd {
- pinname = "sd";
- ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
- max_req_size = <0x20000>; /**128KB*/
- gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
- jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
- gpio_cd = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>;
- card_type = <5>;
- /* 3:sdio device(ie:sdio-wifi),
- * 4:SD combo (IO+mem) card
- */
- };
- };
-
- spifc: spifc@ffd14000 {
- compatible = "amlogic,aml-spi-nor";
- status = "disabled";
-
- reg = <0x0 0xffd14000 0x0 0x80>;
- pinctrl-names = "default";
- pinctrl-0 = <&spifc_all_pins>;
- clock-names = "core";
- clocks = <&clkc CLKID_CLK81>;
-
- spi-nor@0 {
- compatible = "jedec,spi-nor";
- spifc-frequency = <40000000>;
- read-capability = <4>;/* dual read 1_1_2 */
- spifc-io-width = <4>;
- };
- };
-
- slc_nand: nand-controller@0xFFE07800 {
- compatible = "amlogic, aml_mtd_nand";
- status = "okay";
- reg = <0x0 0xFFE07800 0x0 0x200>;
- interrupts = <0 34 1>;
-
- pinctrl-names = "nand_rb_mod", "nand_norb_mod", "nand_cs_only";
- pinctrl-0 = <&all_nand_pins>;
- pinctrl-1 = <&all_nand_pins>;
- pinctrl-2 = <&nand_cs_pins>;
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_SD_EMMC_C_P0_COMP>;
- clock-names = "core", "clkin";
-
- device_id = <0>;
- /*fip/tpl configurations, must be same
- *with uboot if bl_mode was set as 1
- *bl_mode: 0 compact mode;1 descrete mode
- *if bl_mode was set as 1,fip configuration will work
- */
- bl_mode = <1>;
- /*copy count of fip*/
- fip_copies = <4>;
- /*size of each fip copy*/
- fip_size = <0x200000>;
- nand_clk_ctrl = <0xFFE07000>;
- /*partions defined in dts*/
- };
-
- mesonstream {
- compatible = "amlogic, codec, streambuf";
- status = "okay";
- clocks = <&clkc CLKID_U_PARSER
- &clkc CLKID_DEMUX
- &clkc CLKID_AHB_ARB0
- &clkc CLKID_DOS
- &clkc CLKID_VDEC_MUX
- &clkc CLKID_HCODEC_MUX
- &clkc CLKID_HEVC_MUX
- &clkc CLKID_HEVCF_MUX>;
- clock-names = "parser_top",
- "demux",
- "ahbarb0",
- "vdec",
- "clk_vdec_mux",
- "clk_hcodec_mux",
- "clk_hevc_mux",
- "clk_hevcb_mux";
- };
-
- vcodec-dec {
- compatible = "amlogic, vcodec-dec";
- status = "okay";
- };
-
- vdec {
- compatible = "amlogic, vdec";
- status = "okay";
- interrupts = <0 3 1
- 0 23 1
- 0 32 1
- 0 43 1
- 0 44 1
- 0 45 1>;
- interrupt-names = "vsync",
- "demux",
- "parser",
- "mailbox_0",
- "mailbox_1",
- "mailbox_2";
- };
-
- canvas: canvas {
- compatible = "amlogic, meson, canvas";
- status = "okay";
- reg = <0xff638000 0x2000>;
- };
-
- codec_io: codec_io {
- compatible = "amlogic, codec_io";
- status = "okay";
- #address-cells=<1>;
- #size-cells=<1>;
- ranges;
- io_cbus_base{
- reg = <0xffd00000 0x100000>;
- };
- io_dos_base{
- reg = <0xff620000 0x10000>;
- };
- io_hiubus_base{
- reg = <0xff63c000 0x2000>;
- };
- io_aobus_base{
- reg = <0xff800000 0x10000>;
- };
- io_vcbus_base{
- reg = <0xff900000 0x40000>;
- };
- io_dmc_base{
- reg = <0xff638000 0x2000>;
- };
- io_efuse_base{
- reg = <0xff630000 0x2000>;
- };
- };
-
- rdma {
- compatible = "amlogic, meson-tl1, rdma";
- status = "okay";
- interrupts = <0 89 1>;
- interrupt-names = "rdma";
- };
-
- meson_fb: fb {
- compatible = "amlogic, meson-tl1";
- memory-region = <&logo_reserved>;
- status = "disabled";
- interrupts = <0 3 1
- 0 56 1
- 0 89 1>;
- interrupt-names = "viu-vsync", "viu2-vsync", "rdma";
- /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
- display_mode_default = "1080p60hz";
- scale_mode = <1>;
- /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
- display_size_default = <1920 1080 1920 2160 32>;
- /*1920*1080*4*3 = 0x17BB000*/
- clocks = <&clkc CLKID_VPU_CLKC_MUX>;
- clock-names = "vpu_clkc";
- };
-
- ge2d {
- compatible = "amlogic, ge2d-g12a";
- status = "okay";
- interrupts = <0 146 1>;
- interrupt-names = "ge2d";
- clocks = <&clkc CLKID_VAPB_MUX>,
- <&clkc CLKID_G2D>,
- <&clkc CLKID_GE2D_GATE>;
- clock-names = "clk_vapb_0",
- "clk_ge2d",
- "clk_ge2d_gate";
- reg = <0xff940000 0x10000>;
- };
-
- meson-amvideom {
- compatible = "amlogic, amvideom";
- status = "okay";
- interrupts = <0 3 1>;
- interrupt-names = "vsync";
- };
-
- vdac {
- compatible = "amlogic, vdac-tl1";
- status = "okay";
- };
-
- dmc_monitor {
- compatible = "amlogic, dmc_monitor";
- status = "okay";
- reg_base = <0xff638800>;
- interrupts = <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>;
- };
-
- efuse: efuse{
- compatible = "amlogic, efuse";
- read_cmd = <0x82000030>;
- write_cmd = <0x82000031>;
- get_max_cmd = <0x82000033>;
- key = <&efusekey>;
- clocks = <&clkc CLKID_EFUSE>;
- clock-names = "efuse_clk";
- status = "disabled";
- };
-
- efusekey:efusekey{
- keynum = <4>;
- key0 = <&key_0>;
- key1 = <&key_1>;
- key2 = <&key_2>;
- key3 = <&key_3>;
- key_0:key_0{
- keyname = "mac";
- offset = <0>;
- size = <6>;
- };
- key_1:key_1{
- keyname = "mac_bt";
- offset = <6>;
- size = <6>;
- };
- key_2:key_2{
- keyname = "mac_wifi";
- offset = <12>;
- size = <6>;
- };
- key_3:key_3{
- keyname = "usid";
- offset = <18>;
- size = <16>;
- };
- };
-
- audio_data: audio_data {
- compatible = "amlogic, audio_data";
- query_licence_cmd = <0x82000050>;
- status = "disabled";
- };
-}; /* end of / */
-
-&pinctrl_aobus {
- sd_to_ao_uart_clr_pins: sd_to_ao_uart_clr_pins {
- mux {
- groups = "GPIOAO_0",
- "GPIOAO_1",
- "GPIOAO_2",
- "GPIOAO_3",
- "GPIOAO_4",
- "GPIOAO_5",
- "GPIOAO_6",
- "GPIOAO_7",
- "GPIOAO_8",
- "GPIOAO_9",
- "GPIOAO_10",
- "GPIOAO_11",
- "GPIOE_0",
- "GPIOE_1",
- "GPIOE_2",
- "GPIO_TEST_N";
- function = "gpio_aobus";
- };
- };
-
- sd_to_ao_uart_pins: sd_to_ao_uart_pins {
- mux {
- groups = "uart_ao_a_tx",
- "uart_ao_a_rx",
- "uart_ao_a_cts",
- "uart_ao_a_rts";
- function = "uart_ao_a";
- bias-pull-up;
- input-enable;
- };
- };
-
- remote_pins:remote_pin {
- mux {
- groups = "remote_input_ao";
- function = "remote_input_ao";
- };
- };
-
- pwm_ao_a_pins: pwm_ao_a {
- mux {
- groups = "pwm_ao_a";
- function = "pwm_ao_a";
- };
- };
-
- pwm_ao_a_hiz_pins: pwm_ao_a_hiz {
- mux {
- groups = "pwm_ao_a_hiz";
- function = "pwm_ao_a";
- };
- };
-
- pwm_ao_b_pins: pwm_ao_b {
- mux {
- groups = "pwm_ao_b";
- function = "pwm_ao_b";
- };
- };
-
- pwm_ao_c_pins1: pwm_ao_c_pins1 {
- mux {
- groups = "pwm_ao_c_4";
- function = "pwm_ao_c";
- };
- };
-
- pwm_ao_c_pins2: pwm_ao_c_pins2 {
- mux {
- groups = "pwm_ao_c_6";
- function = "pwm_ao_c";
- };
- };
-
- pwm_ao_c_hiz_pins1: pwm_ao_c_hiz1 {
- mux {
- groups = "pwm_ao_c_hiz_4";
- function = "pwm_ao_c";
- };
- };
-
- pwm_ao_c_hiz_pins2: pwm_ao_c_hiz2 {
- mux {
- groups = "pwm_ao_c_hiz_7";
- function = "pwm_ao_c";
- };
- };
-
- pwm_ao_d_pins1: pwm_ao_d_pins1 {
- mux {
- groups = "pwm_ao_d_5";
- function = "pwm_ao_d";
- };
- };
-
- pwm_ao_d_pins2: pwm_ao_d_pins2 {
- mux {
- groups = "pwm_ao_d_10";
- function = "pwm_ao_d";
- };
- };
-
- pwm_ao_d_pins3: pwm_ao_d_pins3 {
- mux {
- groups = "pwm_ao_d_e";
- function = "pwm_ao_d";
- };
- };
-
- pwm_a_e2: pwm_a_e2 {
- mux {
- groups = "pwm_a_e2";
- function = "pwm_a_e2";
- };
- };
-
- i2c_ao_2_pins:i2c_ao_2 {
- mux {
- groups = "i2c_ao_sck_2",
- "i2c_ao_sda_3";
- function = "i2c_ao";
- };
- };
-
- i2c_ao_e_pins:i2c_ao_e {
- mux {
- groups = "i2c_ao_sck_e",
- "i2c_ao_sda_e";
- function = "i2c_ao";
- };
- };
-
- i2c_ao_slave_pins:i2c_ao_slave {
- mux {
- groups = "i2c_ao_slave_sck",
- "i2c_ao_slave_sda";
- function = "i2c_ao_slave";
- };
- };
-};
-
-&pinctrl_periphs {
- /* sdemmc portC */
- emmc_clk_cmd_pins: emmc_clk_cmd_pins {
- mux {
- groups = "emmc_clk",
- "emmc_cmd";
- function = "emmc";
- input-enable;
- bias-pull-up;
- drive-strength = <3>;
- };
- };
-
- emmc_conf_pull_up: emmc_conf_pull_up {
- mux {
- groups = "emmc_nand_d7",
- "emmc_nand_d6",
- "emmc_nand_d5",
- "emmc_nand_d4",
- "emmc_nand_d3",
- "emmc_nand_d2",
- "emmc_nand_d1",
- "emmc_nand_d0",
- "emmc_clk",
- "emmc_cmd";
- function = "emmc";
- input-enable;
- bias-pull-up;
- drive-strength = <3>;
- };
- };
-
- emmc_conf_pull_done: emmc_conf_pull_done {
- mux {
- groups = "emmc_nand_ds";
- function = "emmc";
- input-enable;
- bias-pull-down;
- drive-strength = <3>;
- };
- };
-
- /* sdemmc portB */
- sd_clk_cmd_pins: sd_clk_cmd_pins {
- mux {
- groups = "sdcard_cmd",
- "sdcard_clk";
- function = "sdcard";
- input-enable;
- bias-pull-up;
- drive-strength = <3>;
- };
- };
-
- sd_all_pins: sd_all_pins {
- mux {
- groups = "sdcard_d0",
- "sdcard_d1",
- "sdcard_d2",
- "sdcard_d3",
- "sdcard_cmd",
- "sdcard_clk";
- function = "sdcard";
- input-enable;
- bias-pull-up;
- drive-strength = <3>;
- };
- };
-
- sd_1bit_pins: sd_1bit_pins {
- mux {
- groups = "sdcard_d0",
- "sdcard_cmd",
- "sdcard_clk";
- function = "sdcard";
- input-enable;
- bias-pull-up;
- drive-strength = <3>;
- };
- };
-
- ao_to_sd_uart_pins: ao_to_sd_uart_pins {
- mux {
- groups = "uart_ao_a_rx_c",
- "uart_ao_a_tx_c",
- "uart_ao_a_rx_w3",
- "uart_ao_a_tx_w2",
- "uart_ao_a_rx_w7",
- "uart_ao_a_tx_w6",
- "uart_ao_a_rx_w11",
- "uart_ao_a_tx_w10";
- function = "uart_ao_a_ee";
- bias-pull-up;
- input-enable;
- };
- };
-
- all_nand_pins: all_nand_pins {
- mux {
- groups = "emmc_nand_d0",
- "emmc_nand_d1",
- "emmc_nand_d2",
- "emmc_nand_d3",
- "emmc_nand_d4",
- "emmc_nand_d5",
- "emmc_nand_d6",
- "emmc_nand_d7",
- "nand_ce0",
- "nand_ale",
- "nand_cle",
- "nand_wen_clk",
- "nand_ren_wr";
- function = "nand";
- input-enable;
- drive-strength = <3>;
- };
- };
-
- nand_cs_pins:nand_cs {
- mux {
- groups = "nand_ce0";
- function = "nand";
- drive-strength = <3>;
- };
- };
-
- /* sdemmc portA */
- sdio_clk_cmd_pins: sdio_clk_cmd_pins {
- mux {
- groups = "sdio_clk",
- "sdio_cmd";
- function = "sdio";
- input-enable;
- bias-pull-up;
- drive-strength = <3>;
- };
- };
-
- sdio_all_pins: sdio_all_pins {
- mux {
- groups = "sdio_d0",
- "sdio_d1",
- "sdio_d2",
- "sdio_d3",
- "sdio_clk",
- "sdio_cmd";
- function = "sdio";
- input-enable;
- bias-pull-up;
- drive-strength = <3>;
- };
- };
-
- spifc_cs_pin:spifc_cs_pin {
- mux {
- groups = "nor_cs";
- function = "nor";
- bias-pull-up;
- };
- };
-
- spifc_pulldown: spifc_pulldown {
- mux {
- groups = "nor_d",
- "nor_q",
- "nor_c";
- function = "nor";
- bias-pull-down;
- };
- };
-
- spifc_pullup: spifc_pullup {
- mux {
- groups = "nor_cs";
- function = "nor";
- bias-pull-up;
- };
- };
-
- spifc_all_pins: spifc_all_pins {
- mux {
- groups = "nor_d",
- "nor_q",
- "nor_c",
- "nor_hold",
- "nor_wp";
- function = "nor";
- input-enable;
- bias-pull-down;
- };
- };
-
- pwm_a_pins: pwm_a {
- mux {
- groups = "pwm_a";
- function = "pwm_a";
- };
- };
-
- pwm_b_pins1: pwm_b_pins1 {
- mux {
- groups = "pwm_b_c";
- function = "pwm_b";
- };
- };
-
- pwm_b_pins2: pwm_b_pins2 {
- mux {
- groups = "pwm_b_z";
- function = "pwm_b";
- };
- };
-
- pwm_c_pins1: pwm_c_pins1 {
- mux {
- groups = "pwm_c_dv";
- function = "pwm_c";
- };
- };
-
- pwm_c_pins2: pwm_c_pins2 {
- mux {
- groups = "pwm_c_h";
- function = "pwm_c";
- };
- };
-
- pwm_c_pins3: pwm_c_pins3 {
- mux {
- groups = "pwm_c_z";
- function = "pwm_c";
- };
- };
-
- pwm_d_pins1: pwm_d_pins1 {
- mux {
- groups = "pwm_d_dv";
- function = "pwm_d";
- };
- };
-
- pwm_d_pins2: pwm_d_pins2 {
- mux {
- groups = "pwm_d_z";
- function = "pwm_d";
- };
- };
-
- pwm_e_pins1: pwm_e1 {
- mux {
- groups = "pwm_e_dv";
- function = "pwm_e";
- };
- };
-
- pwm_e_pins2: pwm_e2 {
- mux {
- groups = "pwm_e_z";
- function = "pwm_e";
- };
- };
-
- pwm_f_pins1: pwm_f_pins1 {
- mux {
- groups = "pwm_f_dv";
- function = "pwm_f";
- };
- };
-
- pwm_f_pins2: pwm_f_pins2 {
- mux {
- groups = "pwm_f_z";
- function = "pwm_f";
- };
- };
-
- i2c0_c_pins:i2c0_c {
- mux {
- groups = "i2c0_sda_c",
- "i2c0_sck_c";
- function = "i2c0";
- };
- };
-
- i2c0_dv_pins:i2c0_dv {
- mux {
- groups = "i2c0_sda_dv",
- "i2c0_sck_dv";
- function = "i2c0";
- };
- };
-
- i2c1_z_pins:i2c1_z {
- mux {
- groups = "i2c1_sda_z",
- "i2c1_sck_z";
- function = "i2c1";
- };
- };
-
- i2c1_h_pins:i2c1_h {
- mux {
- groups = "i2c1_sda_h",
- "i2c1_sck_h";
- function = "i2c1";
- };
- };
-
- i2c2_h_pins:i2c2_h {
- mux {
- groups = "i2c2_sda_h",
- "i2c2_sck_h";
- function = "i2c2";
- };
- };
-
- i2c2_z_pins:i2c2_z {
- mux {
- groups = "i2c2_sda_z",
- "i2c2_sck_z";
- function = "i2c2";
- };
- };
-
- i2c3_h1_pins:i2c3_h1 {
- mux {
- groups = "i2c3_sda_h1",
- "i2c3_sck_h0";
- function = "i2c3";
- };
- };
-
- i2c3_h20_pins:i2c3_h3 {
- mux {
- groups = "i2c3_sda_h20",
- "i2c3_sck_h19";
- function = "i2c3";
- };
- };
-
- i2c3_dv_pins:i2c3_dv {
- mux {
- groups = "i2c3_sda_dv",
- "i2c3_sck_dv";
- function = "i2c3";
- };
- };
-
- i2c3_c_pins:i2c3_c {
- mux {
- groups = "i2c3_sda_c",
- "i2c3_sck_c";
- function = "i2c3";
- };
- };
-
- spicc0_pins_h: spicc0_pins_h {
- mux {
- groups = "spi0_mosi_h",
- "spi0_miso_h",
- "spi0_clk_h";
- function = "spi0";
- drive-strength = <1>;
- };
- };
-
- spicc1_pins_dv: spicc1_pins_dv {
- mux {
- groups = "spi1_mosi_dv",
- "spi1_miso_dv",
- "spi1_clk_dv";
- function = "spi1";
- drive-strength = <1>;
- };
- };
-};
+++ /dev/null
-/*
- * arch/arm/boot/dts/amlogic/mesontxl.dtsi
- *
- * Copyright (C) 2018 Amlogic, Inc. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/amlogic,txl-clkc.h>
-#include <dt-bindings/gpio/meson-txl-gpio.h>
-#include <dt-bindings/pwm/pwm.h>
-#include <dt-bindings/pwm/meson.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/meson_rc.h>
-#include <dt-bindings/input/input.h>
-#include "mesongxbb-gpu-mali450.dtsi"
-#include <dt-bindings/iio/adc/amlogic-saradc.h>
-
-/ {
- interrupt-parent = <&gic>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus:cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- #cooling-cells = <2>;
-
- /*cpu-map {
- cluster0:cluster0 {
- core0 {
- cpu = <&CPU0>;
- };
- core1 {
- cpu = <&CPU1>;
- };
- core2 {
- cpu = <&CPU2>;
- };
- core3 {
- cpu = <&CPU3>;
- };
- };
- };*/
-
- CPU0:cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
- reg = <0x0>;
- enable-method = "psci";
- clocks = <&scpi_dvfs 0>;
- clock-names = "cpu-cluster.0";
- cpu-idle-states = <&SYSTEM_SLEEP_0>;
- };
-
- CPU1:cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
- reg = <0x1>;
- enable-method = "psci";
- clocks = <&scpi_dvfs 0>;
- clock-names = "cpu-cluster.0";
- cpu-idle-states = <&SYSTEM_SLEEP_0>;
- };
-
- CPU2:cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
- reg = <0x2>;
- enable-method = "psci";
- clocks = <&scpi_dvfs 0>;
- clock-names = "cpu-cluster.0";
- cpu-idle-states = <&SYSTEM_SLEEP_0>;
- };
-
- CPU3:cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
- reg = <0x3>;
- enable-method = "psci";
- clocks = <&scpi_dvfs 0>;
- clock-names = "cpu-cluster.0";
- cpu-idle-states = <&SYSTEM_SLEEP_0>;
- };
-
- idle-states {
- entry-method = "arm,psci";
-/*
- CPU_SLEEP_0: cpu-sleep-0 {
- compatible = "arm,idle-state";
- arm,psci-suspend-param = <0x0010000>;
- local-timer-stop;
- entry-latency-us = <3000>;
- exit-latency-us = <3000>;
- min-residency-us = <8000>;
- };
-*/
-
- SYSTEM_SLEEP_0: system-sleep-0 {
- compatible = "arm,idle-state";
- arm,psci-suspend-param = <0x0020000>;
- local-timer-stop;
- entry-latency-us = <0x3fffffff>;
- exit-latency-us = <0x40000000>;
- min-residency-us = <0xffffffff>;
- };
-
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 0xff01>,
- <GIC_PPI 14 0xff01>,
- <GIC_PPI 11 0xff01>,
- <GIC_PPI 10 0xff01>;
- };
-
- timer_bc: timer@c1109990 {
- compatible = "arm, meson-bc-timer";
- reg = <0xc1109990 0x4 0xc1109994 0x4>;
- timer_name = "Meson TimerF";
- clockevent-rating = <300>;
- clockevent-shift = <20>;
- clockevent-features = <0x23>;
- interrupts = <0 60 1>;
- bit_enable = <16>;
- bit_mode = <12>;
- bit_resolution = <0>;
- };
-
- pmu {
- compatible = "arm,armv8-pmuv3";
- interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- gic: interrupt-controller@2c001000 {
- compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0xc4301000 0x1000>,
- <0xc4302000 0x0100>;
- interrupts = <GIC_PPI 9 0xf04>;
- };
-
- clocks {
- xtal: xtal-clk {
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- clock-output-names = "xtal";
- #clock-cells = <0>;
- };
- };
-
- cpu_iomap {
- compatible = "amlogic, iomap";
- #address-cells=<1>;
- #size-cells=<1>;
- ranges;
- io_cbus_base {
- reg = <0xc1100000 0x100000>;
- };
- io_apb_base {
- reg = <0xd0000000 0x100000>;
- };
- io_aobus_base {
- reg = <0xc8100000 0x100000>;
- };
- io_vapb_base {
- reg = <0xd0100000 0x100000>;
- };
- io_hiu_base {
- reg = <0xc883c000 0x2000>;
- };
- };
-
- cpuinfo {
- compatible = "amlogic, cpuinfo";
- cpuinfo_cmd = <0x82000044>;
- };
-
- ram-dump {
- compatible = "amlogic, ram_dump";
- status = "okay";
- };
-
- securitykey {
- compatible = "amlogic, securitykey";
- status = "okay";
- storage_query = <0x82000060>;
- storage_read = <0x82000061>;
- storage_write = <0x82000062>;
- storage_tell = <0x82000063>;
- storage_verify = <0x82000064>;
- storage_status = <0x82000065>;
- storage_list = <0x82000067>;
- storage_remove = <0x82000068>;
- storage_in_func = <0x82000023>;
- storage_out_func = <0x82000024>;
- storage_block_func = <0x82000025>;
- storage_size_func = <0x82000027>;
- storage_set_enctype = <0x8200006A>;
- storage_get_enctype = <0x8200006B>;
- storage_version = <0x8200006C>;
- };
-
- mailbox: mhu@c883c400 {
- compatible = "amlogic, meson_mhu";
- reg = <0xc883c400 0x4c>, /* MHU registers */
- <0xc8013000 0x800>; /* Payload area */
- interrupts = <0 209 1>, /* low priority interrupt */
- <0 210 1>; /* high priority interrupt */
- #mbox-cells = <1>;
- mbox-names = "cpu_to_scp_low", "cpu_to_scp_high";
- mboxes = <&mailbox 0 &mailbox 1>;
- };
-
- scpi_clocks {
- compatible = "arm, scpi-clks";
-
- scpi_dvfs: scpi_clocks@0 {
- compatible = "arm, scpi-clk-indexed";
- #clock-cells = <1>;
- clock-indices = <0>;
- clock-output-names = "vcpu";
- };
-
- };
-
- pinctrl_aobus: pinctrl@c8100014{
- compatible = "amlogic,meson-txl-aobus-pinctrl";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- gpio_ao: ao-bank@c8100014{
- reg = <0xc8100014 0x8>,
- <0xc810002c 0x4>,
- <0xc8100024 0x8>;
- reg-names = "mux", "pull", "gpio";
- gpio-controller;
- #gpio-cells = <2>;
- };
- };
-
- pinctrl_periphs: pinctrl@c88344b0{
- compatible = "amlogic,meson-txl-periphs-pinctrl";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- gpio: banks@c88344b0{
- reg = <0xc88344b0 0x28>,
- <0xc88344e8 0x14>,
- <0xc8834520 0x14>,
- <0xc8834430 0x40>;
- reg-names = "mux",
- "pull",
- "pull-enable",
- "gpio";
- gpio-controller;
- #gpio-cells = <2>;
- };
- };
-
- dwc3: dwc3@c9000000 {
- compatible = "synopsys, dwc3";
- status = "disable";
- reg = <0xc9000000 0x100000>;
- interrupts = <0 30 4>;
- usb-phy = <&usb2_phy>, <&usb3_phy>;
- cpu-type = "gxl";
- clock-src = "usb3.0";
- };
-
- usb2_phy: usb2phy@d0078000 {
- compatible = "amlogic, amlogic-new-usb2";
- status = "disable";
- portnum = <4>;
- reg = <0xd0078000 0x80
- 0xc1104408 0x4>;
- };
-
- usb3_phy: usb3phy@d0078080 {
- compatible = "amlogic, amlogic-new-usb3";
- status = "disable";
- portnum = <0>;
- reg = <0xd0078080 0x20>;
- };
-
- dwc2_a: dwc2_a@c9100000 {
- compatible = "amlogic, dwc2";
- status = "disable";
- reg = <0xc9100000 0x40000>;
- interrupts = <0 31 4>;
- pl-periph-id = <0>; /** lm name */
- clock-src = "usb0"; /** clock src */
- port-id = <0>; /** ref to mach/usb.h */
- port-type = <2>; /** 0: otg, 1: host, 2: slave */
- port-speed = <0>; /** 0: default, high, 1: full */
- port-config = <0>; /** 0: default */
- port-dma = <0>;
- port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
- usb-fifo = <728>;
- cpu-type = "gxl";
- phy-reg = <0xd0078000>;
- phy-reg-size = <0xa0>;
- clocks = <&clkc CLKID_USB_GENERAL
- &clkc CLKID_USB1_TO_DDR
- &clkc CLKID_USB1>;
- clock-names = "usb_general",
- "usb1",
- "usb1_to_ddr";
- };
-
- ethmac: ethernet@0xc9410000 {
- compatible = "amlogic, gxbb-eth-dwmac";
- status = "disable";
- reg = <0xc9410000 0x10000
- 0xc8834540 0x8
- 0xc8834558 0xc
- 0xc1104484 0x4>;
- interrupts = <0 8 1
- 0 9 1>;
- phy-mode= "rmii";
- mc_val_internal_phy = <0x1800>;
- mc_val_external_phy = <0x1621>;
- interrupt-names = "macirq",
- "phyirq";
- clocks = <&clkc CLKID_ETH_CORE>;
- clock-names = "ethclk81";
- internal_phy=<1>;
- };
-
- saradc: saradc {
- compatible = "amlogic,meson-txl-saradc";
- status = "okay";
- #io-channel-cells = <1>;
- clocks = <&xtal>, <&clkc CLKID_SARADC_GATE>;
- clock-names = "xtal", "saradc_clk";
- interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
- reg = <0xc8100600 0x38>;
- };
-
- jtag {
- compatible = "amlogic, jtag";
- status = "okay";
- select = "apao"; /* disable/apao/apee */
- jtagao-gpios = <&gpio_ao GPIOAO_3 0
- &gpio_ao GPIOAO_4 0
- &gpio_ao GPIOAO_5 0
- &gpio_ao GPIOAO_7 0>;
- jtagee-gpios = <&gpio CARD_0 0
- &gpio CARD_1 0
- &gpio CARD_2 0
- &gpio CARD_3 0>;
- };
-
- meson_suspend: pm {
- compatible = "amlogic, pm";
- status = "okay";
- reg = <0xc81000a8 0x4>,
- <0xc810023c 0x4>;
- };
-
- reboot {
- compatible = "amlogic,reboot";
- sys_reset = <0x84000009>;
- sys_poweroff = <0x84000008>;
- };
-
- rtc {
- compatible = "amlogic, aml_vrtc";
- alarm_reg_addr = <0xc81000a8>;
- timer_e_addr = <0xc1109988>;
- init_date = "2018/01/01";
- status = "okay";
- };
-
- soc {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- cbus: bus@c1100000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0xc1100000 0x100000>;
- ranges = <0x0 0xc1100000 0x100000>;
-
- meson_clk_msr@875c{
- compatible = "amlogic, gxl_measure";
- reg = <0x875c 0x4
- 0x8764 0x4>;
- };
-
- /*i2c-A*/
- i2c0: i2c@8500 {
- compatible = "amlogic,meson-txl-i2c";
- status = "disabled";
- reg = <0x8500 0x20>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- /*i2c-B*/
- i2c1: i2c@87c0 {
- compatible = "amlogic,meson-txl-i2c";
- status = "disabled";
- reg = <0x87c0 0x20>;
- interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- /*i2c-C*/
- i2c2: i2c@87e0 {
- compatible = "amlogic,meson-txl-i2c";
- status = "disabled";
- reg = <0x87e0 0x20>;
- interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- /*i2c-D*/
- i2c3: i2c@8d20 {
- compatible = "amlogic,meson-txl-i2c";
- status = "disabled";
- reg = <0x8d20 0x20>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- pwm_ab: pwm@8550 {
- compatible = "amlogic,txl-ee-pwm";
- reg = <0x8550 0x1c>;
- #pwm-cells = <3>;
- clocks = <&xtal>,
- <&xtal>,
- <&xtal>,
- <&xtal>;
- clock-names = "clkin0",
- "clkin1",
- "clkin2",
- "clkin3";
- status = "disabled";
- };
-
- pwm_cd: pwm@8640 {
- compatible = "amlogic,txl-ee-pwm";
- reg = <0x8640 0x1c>;
- #pwm-cells = <3>;
- clocks = <&xtal>,
- <&xtal>,
- <&xtal>,
- <&xtal>;
- clock-names = "clkin0",
- "clkin1",
- "clkin2",
- "clkin3";
- status = "disabled";
- };
-
- pwm_ef: pwm@86c0 {
- compatible = "amlogic,txl-ee-pwm";
- reg = <0x86c0 0x1c>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- spicc: spi@8d80 {
- compatible = "amlogic,meson-txl-spicc",
- "amlogic,meson-txlx-spicc";
- reg = <0x8d80 0x3c>;
- interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_SPICC0>;
- clock-names = "core";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- uart_A: serial@84c0 {
- compatible = "amlogic, meson-uart";
- reg = <0x84c0 0x18>;
- interrupts = <0 26 1>;
- status = "disabled";
- clocks = <&xtal &clkc CLKID_UART0>;
- clock-names = "clk_uart", "clk_gate";
- fifosize = < 128 >;
- pinctrl-names = "default";
- pinctrl-0 = <&a_uart_pins>;
- };
-
- uart_B: serial@84dc {
- compatible = "amlogic, meson-uart";
- reg = <0x84dc 0x18>;
- interrupts = <0 75 1>;
- status = "disabled";
- clocks = <&xtal &clkc CLKID_UART1>;
- clock-names = "clk_uart", "clk_gate";
- fifosize = < 64 >;
- pinctrl-names = "default";
- pinctrl-0 = <&b_uart_pins>;
- };
-
- uart_C: serial@8700 {
- compatible = "amlogic, meson-uart";
- reg = <0x8700 0x18>;
- interrupts = <0 93 1>;
- status = "disabled";
- clocks = <&xtal &clkc CLKID_UART2>;
- clock-names = "clk_uart", "clk_gate";
- fifosize = < 64 >;
- pinctrl-names = "default";
- pinctrl-0 = <&c_uart_pins>;
- };
-
- gpio_intc: interrupt-controller@9880 {
- compatible = "amlogic,meson-gpio-intc",
- "amlogic,meson-txl-gpio-intc";
- reg = <0x9880 0x10>;
- interrupt-controller;
- #interrupt-cells = <2>;
- amlogic,channel-interrupts =
- <64 65 66 67 68 69 70 71>;
- status = "okay";
- };
-
- wdt_ee: watchdog@98d0 {
- compatible = "amlogic, meson-wdt";
- status = "okay";
- default_timeout=<10>;
- reset_watchdog_method=<1>;/*0:sysfs,1:kernel*/
- reset_watchdog_time=<2>;
- shutdown_timeout=<10>;
- firmware_timeout=<6>;
- suspend_timeout=<6>;
- reg = <0x98d0 0x10>;
- clock-names = "xtal";
- clocks = <&xtal>;
- };
-
- }; /* end of cbus */
-
- aobus: bus@c8100000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0xc8100000 0x100000>;
- ranges = <0x0 0xc8100000 0x100000>;
-
- cpu_version {
- reg=<0x220 0x4>;
- };
-
- aoclkc: clock-controller@0 {
- compatible = "amlogic,txl-aoclkc";
- #clock-cells = <1>;
- reg = <0x0 0x1000>;
- };
-
- uart_AO: serial@4c0 {
- compatible = "amlogic, meson-uart";
- reg = <0x4c0 0x18>;
- interrupts = <0 193 1>;
- status = "okay";
- clocks = <&xtal>;
- clock-names = "clk_uart";
- xtal_tick_en = <1>;
- fifosize = < 64 >;
- pinctrl-names = "default";
- /*pinctrl-0 = <&ao_uart_pins>;*/
- /* 0 not support;1 support */
- support-sysrq = <0>;
- };
-
- uart_AO_B: serial@04e0 {
- compatible = "amlogic, meson-uart";
- reg = <0x04e0 0x18>;
- interrupts = <0 197 1>;
- status = "disabled";
- clocks = <&xtal>;
- clock-names = "clk_uart";
- fifosize = < 64 >;
- pinctrl-names = "default";
- pinctrl-0 = <&ao_b_uart_pins>;
- };
-
- i2c_AO: i2c@0500 {
- compatible = "amlogic,meson-txl-i2c";
- status = "disabled";
- reg = <0x0500 0x20>;
- interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- pwm_aoab: pwm@0550 {
- compatible = "amlogic,txl-ao-pwm";
- reg = <0x0550 0x1c>;
- #pwm-cells = <3>;
- clocks = <&xtal>,
- <&xtal>,
- <&xtal>,
- <&xtal>;
- clock-names = "clkin0",
- "clkin1",
- "clkin2",
- "clkin3";
- status = "disabled";
- };
-
- remote:rc@0580 {
- compatible = "amlogic, aml_remote";
- dev_name = "meson-remote";
- reg = <0x0580 0x44>,
- <0x0480 0x20>;
- status = "okay";
- protocol = <REMOTE_TYPE_NEC>;
- interrupts = <0 196 1>;
- pinctrl-names = "default";
- pinctrl-0 = <&remote_pins>;
- map = <&custom_maps>;
- max_frame_time = <200>;
- };
- }; /* end of aobus*/
-
- periphs: periphs@c8834000 {
- compatible = "simple-bus";
- reg = <0xc8834000 0x2000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0xc8834000 0x2000>;
-
- rng {
- compatible = "amlogic,meson-rng";
- reg = <0x0 0x4>;
- quality = /bits/ 16 <1000>;
- };
- };/* end of periphs */
-
- hiubus: bus@c883c000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0xc883c000 0x2000>;
- ranges = <0x0 0xc883c000 0x2000>;
-
- clkc: clock-controller@0 {
- compatible = "amlogic,txl-clkc";
- #clock-cells = <1>;
- reg = <0x0 0x3fc>;
- };
- };/* end of hiubus*/
-
- }; /* end of soc*/
-
- custom_maps: custom_maps {
- mapnum = <3>;
- map0 = <&map_0>;
- map1 = <&map_1>;
- map2 = <&map_2>;
- map_0: map_0{
- mapname = "amlogic-remote-1";
- customcode = <0xfb04>;
- release_delay = <80>;
- size = <44>; /*keymap size*/
- keymap = <REMOTE_KEY(0x01, KEY_1)
- REMOTE_KEY(0x02, KEY_2)
- REMOTE_KEY(0x03, KEY_3)
- REMOTE_KEY(0x04, KEY_4)
- REMOTE_KEY(0x05, KEY_5)
- REMOTE_KEY(0x06, KEY_6)
- REMOTE_KEY(0x07, KEY_7)
- REMOTE_KEY(0x08, KEY_8)
- REMOTE_KEY(0x09, KEY_9)
- REMOTE_KEY(0x0a, KEY_0)
- REMOTE_KEY(0x1F, KEY_FN_F1)
- REMOTE_KEY(0x15, KEY_MENU)
- REMOTE_KEY(0x16, KEY_TAB)
- REMOTE_KEY(0x0c, KEY_CHANNELUP)
- REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
- REMOTE_KEY(0x0e, KEY_VOLUMEUP)
- REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
- REMOTE_KEY(0x11, KEY_HOME)
- REMOTE_KEY(0x1c, KEY_RIGHT)
- REMOTE_KEY(0x1b, KEY_LEFT)
- REMOTE_KEY(0x19, KEY_UP)
- REMOTE_KEY(0x1a, KEY_DOWN)
- REMOTE_KEY(0x1d, KEY_ENTER)
- REMOTE_KEY(0x17, KEY_MUTE)
- REMOTE_KEY(0x49, KEY_FINANCE)
- REMOTE_KEY(0x43, KEY_BACK)
- REMOTE_KEY(0x12, KEY_FN_F4)
- REMOTE_KEY(0x14, KEY_FN_F5)
- REMOTE_KEY(0x18, KEY_FN_F6)
- REMOTE_KEY(0x59, KEY_INFO)
- REMOTE_KEY(0x5a, KEY_STOPCD)
- REMOTE_KEY(0x10, KEY_POWER)
- REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
- REMOTE_KEY(0x44, KEY_NEXTSONG)
- REMOTE_KEY(0x1e, KEY_REWIND)
- REMOTE_KEY(0x4b, KEY_FASTFORWARD)
- REMOTE_KEY(0x58, KEY_PLAYPAUSE)
- REMOTE_KEY(0x46, KEY_PROPS)
- REMOTE_KEY(0x40, KEY_UNDO)
- REMOTE_KEY(0x38, KEY_SCROLLLOCK)
- REMOTE_KEY(0x57, KEY_FN)
- REMOTE_KEY(0x5b, KEY_FN_ESC)
- REMOTE_KEY(0x13, 195)
- REMOTE_KEY(0x54, KEY_RED)
- REMOTE_KEY(0x4c, KEY_GREEN)
- REMOTE_KEY(0x4e, KEY_YELLOW)
- REMOTE_KEY(0x55, KEY_BLUE)
- REMOTE_KEY(0x53, KEY_BLUETOOTH)
- REMOTE_KEY(0x52, KEY_WLAN)
- REMOTE_KEY(0x39, KEY_CAMERA)
- REMOTE_KEY(0x41, KEY_SOUND)
- REMOTE_KEY(0x0b, KEY_QUESTION)
- REMOTE_KEY(0x00, KEY_CHAT)
- REMOTE_KEY(0x13, KEY_SEARCH)>;
- };
-
- map_1: map_1{
- mapname = "amlogic-remote-2";
- customcode = <0xfe01>;
- release_delay = <80>;
- size = <53>;
- keymap = <REMOTE_KEY(0x01, KEY_1)
- REMOTE_KEY(0x02, KEY_2)
- REMOTE_KEY(0x03, KEY_3)
- REMOTE_KEY(0x04, KEY_4)
- REMOTE_KEY(0x05, KEY_5)
- REMOTE_KEY(0x06, KEY_6)
- REMOTE_KEY(0x07, KEY_7)
- REMOTE_KEY(0x08, KEY_8)
- REMOTE_KEY(0x09, KEY_9)
- REMOTE_KEY(0x0a, KEY_0)
- REMOTE_KEY(0x1F, KEY_FN_F1)
- REMOTE_KEY(0x15, KEY_MENU)
- REMOTE_KEY(0x16, KEY_TAB)
- REMOTE_KEY(0x0c, KEY_CHANNELUP)
- REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
- REMOTE_KEY(0x0e, KEY_VOLUMEUP)
- REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
- REMOTE_KEY(0x11, KEY_HOME)
- REMOTE_KEY(0x1c, KEY_RIGHT)
- REMOTE_KEY(0x1b, KEY_LEFT)
- REMOTE_KEY(0x19, KEY_UP)
- REMOTE_KEY(0x1a, KEY_DOWN)
- REMOTE_KEY(0x1d, KEY_ENTER)
- REMOTE_KEY(0x17, KEY_MUTE)
- REMOTE_KEY(0x49, KEY_FINANCE)
- REMOTE_KEY(0x43, KEY_BACK)
- REMOTE_KEY(0x12, KEY_FN_F4)
- REMOTE_KEY(0x14, KEY_FN_F5)
- REMOTE_KEY(0x18, KEY_FN_F6)
- REMOTE_KEY(0x59, KEY_INFO)
- REMOTE_KEY(0x5a, KEY_STOPCD)
- REMOTE_KEY(0x10, KEY_POWER)
- REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
- REMOTE_KEY(0x44, KEY_NEXTSONG)
- REMOTE_KEY(0x1e, KEY_REWIND)
- REMOTE_KEY(0x4b, KEY_FASTFORWARD)
- REMOTE_KEY(0x58, KEY_PLAYPAUSE)
- REMOTE_KEY(0x46, KEY_PROPS)
- REMOTE_KEY(0x40, KEY_UNDO)
- REMOTE_KEY(0x38, KEY_SCROLLLOCK)
- REMOTE_KEY(0x57, KEY_FN)
- REMOTE_KEY(0x5b, KEY_FN_ESC)
- REMOTE_KEY(0x54, KEY_RED)
- REMOTE_KEY(0x4c, KEY_GREEN)
- REMOTE_KEY(0x4e, KEY_YELLOW)
- REMOTE_KEY(0x55, KEY_BLUE)
- REMOTE_KEY(0x53, KEY_BLUETOOTH)
- REMOTE_KEY(0x52, KEY_WLAN)
- REMOTE_KEY(0x39, KEY_CAMERA)
- REMOTE_KEY(0x41, KEY_SOUND)
- REMOTE_KEY(0x0b, KEY_QUESTION)
- REMOTE_KEY(0x00, KEY_CHAT)
- REMOTE_KEY(0x13, KEY_SEARCH)>;
- };
-
- map_2: map_2{
- mapname = "amlogic-remote-3";
- customcode = <0xbd02>;
- release_delay = <80>;
- size = <17>;
- keymap = <REMOTE_KEY(0xca,103)
- REMOTE_KEY(0xd2,108)
- REMOTE_KEY(0x99,105)
- REMOTE_KEY(0xc1,106)
- REMOTE_KEY(0xce,KEY_ENTER)
- REMOTE_KEY(0x45,116)
- REMOTE_KEY(0xc5,133)
- REMOTE_KEY(0x80,113)
- REMOTE_KEY(0xd0,15)
- REMOTE_KEY(0xd6,125)
- REMOTE_KEY(0x95,102)
- REMOTE_KEY(0xdd,104)
- REMOTE_KEY(0x8c,109)
- REMOTE_KEY(0x89,131)
- REMOTE_KEY(0x9c,130)
- REMOTE_KEY(0x9a,120)
- REMOTE_KEY(0xcd,121)>;
- };
- };
-
- aocec: aocec@0xc8100000 {
- compatible = "amlogic, aocec-txl";
- status = "okay";
- vendor_name = "Amlogic"; /* Max Chars: 8 */
- /* Refer to the following URL at:
- * http://standards.ieee.org/develop/regauth/oui/oui.txt
- */
- vendor_id = <0x000000>;
- product_desc = "TXL"; /* Max Chars: 16 */
- cec_osd_string = "AML_TV"; /* Max Chars: 14 */
- port_num = <3>;
- ee_cec;
- arc_port_mask = <0x2>;
- interrupts = <0 56 1
- 0 199 1>;
- interrupt-names = "hdmi_aocecb","hdmi_aocec";
- pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
- pinctrl-0=<&hdmitx_aocec>;
- pinctrl-1=<&hdmitx_aocecb>;
- pinctrl-2=<&hdmitx_aocec>;
- reg = <0xc810023c 0x4
- 0xc8100000 0x200
- 0xda83e000 0x10
- 0xc883c000 0x400>;
- reg-names = "ao_exit","ao","hdmirx","hhi";
- };
-
- canvas: canvas{
- compatible = "amlogic, meson, canvas";
- dev_name = "amlogic-canvas";
- status = "okay";
- reg = <0xc8838000 0x2000>;
- };
-
- codec_io: codec_io {
- compatible = "amlogic, codec_io";
- status = "okay";
- #address-cells=<1>;
- #size-cells=<1>;
- ranges;
- io_cbus_base{
- reg = <0xC1100000 0x100000>;
- };
- io_dos_base{
- reg = <0xc8820000 0x10000>;
- };
- io_hiubus_base{
- reg = <0xc883c000 0x2000>;
- };
- io_aobus_base{
- reg = <0xc8100000 0x100000>;
- };
- io_vcbus_base{
- reg = <0xd0100000 0x40000>;
- };
- io_dmc_base{
- reg = <0xc8838000 0x400>;
- };
- };
-
- vpu {
- compatible = "amlogic, vpu-txl";
- dev_name = "vpu";
- status = "okay";
- clocks = <&clkc CLKID_VAPB_MUX>,
- <&clkc CLKID_VPU_INTR>,
- <&clkc CLKID_VPU_P0_COMP>,
- <&clkc CLKID_VPU_P1_COMP>,
- <&clkc CLKID_VPU_MUX>;
- clock-names = "vapb_clk",
- "vpu_intr_gate",
- "vpu_clk0",
- "vpu_clk1",
- "vpu_clk";
- clk_level = <7>;
- /* 0: 100.0M 1: 166.7M 2: 200.0M 3: 250.0M */
- /* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */
- };
-
- ge2d {
- compatible = "amlogic, ge2d-txl";
- status = "okay";
- interrupts = <0 146 1>;
- interrupt-names = "ge2d";
- clocks = <&clkc CLKID_VAPB_MUX>,
- <&clkc CLKID_G2D>,
- <&clkc CLKID_GE2D_GATE>;
- clock-names = "clk_vapb_0",
- "clk_ge2d",
- "clk_ge2d_gate";
- reg = <0xd0160000 0x10000>;
- };
-
- meson-amvideom {
- compatible = "amlogic, amvideom";
- status = "okay";
- interrupts = <0 3 1>;
- interrupt-names = "vsync";
- };
-
- mesonstream {
- compatible = "amlogic, codec, streambuf";
- status = "okay";
- clocks = <&clkc CLKID_DOS_PARSER
- &clkc CLKID_DEMUX
- &clkc CLKID_DOS
- &clkc CLKID_CLK81
- &clkc CLKID_VDEC_MUX
- &clkc CLKID_HCODEC_MUX
- &clkc CLKID_HEVC_MUX>;
- clock-names = "parser_top",
- "demux",
- "vdec",
- "clk_81",
- "clk_vdec_mux",
- "clk_hcodec_mux",
- "clk_hevc_mux";
- };
-
- codec_mm {
- compatible = "amlogic, codec, mm";
- status = "okay";
- memory-region = <&codec_mm_cma &codec_mm_reserved>;
- };
-
- vdec {
- compatible = "amlogic, vdec";
- status = "okay";
- interrupts = <0 3 1
- 0 23 1
- 0 32 1
- 0 43 1
- 0 44 1
- 0 45 1>;
- interrupt-names = "vsync",
- "demux",
- "parser",
- "mailbox_0",
- "mailbox_1",
- "mailbox_2";
- };
-
- amvenc_avc {
- compatible = "amlogic, amvenc_avc";
- status = "okay";
- //memory-region = <&amvenc_avc_reserved>;
- //memory-region = <&avc_cma_reserved>;
- interrupts = <0 45 1>;
- interrupt-names = "mailbox_2";
- };
-
- rdma {
- compatible = "amlogic, meson, rdma";
- dev_name = "amlogic-rdma";
- status = "okay";
- interrupts = <0 89 1>;
- interrupt-names = "rdma";
- };
-
- audio_data: audio_data {
- compatible = "amlogic, audio_data";
- query_licence_cmd = <0x82000050>;
- status = "disabled";
- };
-
- efuse: efuse {
- compatible = "amlogic, efuse";
- read_cmd = <0x82000030>;
- write_cmd = <0x82000031>;
- get_max_cmd = <0x82000033>;
- key = <&efusekey>;
- clocks = <&clkc CLKID_EFUSE>;
- clock-names = "efuse_clk";
- status = "disabled";
- };
-
- efusekey:efusekey {
- keynum = <4>;
- key0 = <&key_0>;
- key1 = <&key_1>;
- key2 = <&key_2>;
- key3 = <&key_3>;
- key_0:key_0 {
- keyname = "mac";
- offset = <0>;
- size = <6>;
- };
- key_1:key_1 {
- keyname = "mac_bt";
- offset = <6>;
- size = <6>;
- };
- key_2:key_2 {
- keyname = "mac_wifi";
- offset = <12>;
- size = <6>;
- };
- key_3:key_3 {
- keyname = "usid";
- offset = <18>;
- size = <16>;
- };
- };
-
- cpu_ver_name {
- compatible = "amlogic, cpu-major-id-txl";
- status = "okay";
- };
-
- ddr_bandwidth {
- compatible = "amlogic, ddr-bandwidth";
- status = "okay";
- reg = <0xc8838000 0x100
- 0xc8837000 0x100>;
- interrupts = <0 52 1>;
- interrupt-names = "ddr_bandwidth";
- };
- dmc_monitor {
- compatible = "amlogic, dmc_monitor";
- status = "okay";
- reg_base = <0xda838400>;
- interrupts = <0 51 1>;
- };
-
- vdac {
- compatible = "amlogic, vdac-txl";
- status = "okay";
- };
-}; /* end of / */
-
-&gpu{
- /*gpu max freq is 750M*/
- tbl = <&clk285_cfg &clk400_cfg &clk500_cfg &clk666_cfg &clk750_cfg>;
-};
-
-&pinctrl_aobus {
-
- pwm_ao_a_ao3_pins: pwm_ao_a_ao3 {
- mux {
- groups = "pwm_ao_a_ao3";
- function = "pwm_ao_a";
- };
- };
-
- pwm_ao_a_ao7_pins: pwm_ao_a_ao7 {
- mux {
- groups = "pwm_ao_a_ao7";
- function = "pwm_ao_a";
- };
- };
-
- pwm_ao_b_ao8_pins: pwm_ao_b_ao8 {
- mux {
- groups = "pwm_ao_b_ao8";
- function = "pwm_ao_b";
- };
- };
-
- pwm_ao_b_ao9_pins: pwm_ao_b_ao9 {
- mux {
- groups = "pwm_ao_b_ao9";
- function = "pwm_ao_b";
- };
- };
-
- remote_pins:remote_pin {
- mux {
- groups = "remote_in";
- function = "ir_in";
- };
-
- };
-
- sd_to_ao_uart_clr_pins:sd_to_ao_uart_clr_pins {
- mux {
- groups = "GPIOAO_0",
- "GPIOAO_1";
- function = "gpio_aobus";
- };
- };
-
- sd_to_ao_uart_pins:sd_to_ao_uart_pins {
- mux {
- groups = "uart_tx_ao_a",
- "uart_rx_ao_a";
- function = "uart_ao_a";
- bias-pull-up;
- input-enable;
- };
- };
-
- i2c_AO_pins:i2c_AO {
- mux {
- groups = "i2c_sck_ao",
- "i2c_sda_ao";
- function = "i2c_ao";
- };
- };
-
- ao_uart_pins:ao_uart {
- mux {
- groups = "uart_tx_ao_a",
- "uart_rx_ao_a";
- function = "uart_ao_a";
- };
- };
-
- ao_b_uart_pins:ao_b_uart {
- mux {
- groups = "uart_tx_ao_b_ao4",
- "uart_rx_ao_b_ao5";
- function = "uart_ao_b";
- };
- };
-
- hdmitx_aocec: ao_cec {
- mux {
- groups = "ao_cec";
- function = "ao_cec";
- };
- };
-
- hdmitx_aocecb: ao_cecb {
- mux {
- groups = "ee_cec";
- function = "ee_cec";
- };
- };
-};
-
-&pinctrl_periphs {
-
- pwm_a_z5_pins: pwm_a_z5 {
- mux {
- groups = "pwm_a_z";
- function = "pwm_a";
- };
- };
-
- pwm_a_dv2_pins: pwm_a_dv2 {
- mux {
- groups = "pwm_a_dv";
- function = "pwm_a";
- };
- };
-
- pwm_b_z6_pins: pwm_b_z6 {
- mux {
- groups = "pwm_b_z";
- function = "pwm_b";
- };
- };
-
- pwm_b_dv3_pins: pwm_b_dv3 {
- mux {
- groups = "pwm_b_dv";
- function = "pwm_b";
- };
- };
-
- pwm_c_z7_pins: pwm_c_z7 {
- mux {
- groups = "pwm_c";
- function = "pwm_c";
- };
- };
-
- pwm_d_z4_pins: pwm_d_z4 {
- mux {
- groups = "pwm_d_z4";
- function = "pwm_d";
- };
- };
-
- pwm_d_z19_pins: pwm_d_z19 {
- mux {
- groups = "pwm_d_z19";
- function = "pwm_d";
- };
- };
-
- pwm_e_h4_pins: pwm_e_h4 {
- mux {
- groups = "pwm_e_h4";
- function = "pwm_e";
- };
- };
-
- pwm_e_h8_pins: pwm_e_h8 {
- mux {
- groups = "pwm_e_h8";
- function = "pwm_e";
- };
- };
-
- pwm_f_h9_pins: pwm_f_h9 {
- mux {
- groups = "pwm_f_h";
- function = "pwm_f";
- };
- };
-
- pwm_f_clk_pins: pwm_f_clk {
- mux {
- groups = "pwm_f_clk";
- function = "pwm_f";
- };
- };
-
- pwm_vs_dv2_pins: pwm_vs_dv2 {
- mux {
- groups = "pwm_vs_dv2";
- function = "pwm_vs";
- };
- };
-
- pwm_vs_dv3_pins: pwm_vs_dv3 {
- mux {
- groups = "pwm_vs_dv3";
- function = "pwm_vs";
- };
- };
-
- pwm_vs_z4_pins: pwm_vs_z4 {
- mux {
- groups = "pwm_vs_z4";
- function = "pwm_vs";
- };
- };
-
- pwm_vs_z6_pins: pwm_vs_z6 {
- mux {
- groups = "pwm_vs_z6";
- function = "pwm_vs";
- };
- };
-
- pwm_vs_z7_pins: pwm_vs_z7 {
- mux {
- groups = "pwm_vs_z7";
- function = "pwm_vs";
- };
- };
-
- pwm_vs_z19_pins: pwm_vs_z19 {
- mux {
- groups = "pwm_vs_z19";
- function = "pwm_vs";
- };
- };
-
- ao_to_sd_uart_clr_pins:ao_to_sd_uart_clr_pins {
- mux {
- groups = "sdcard_d2",
- "sdcard_d3";
- function = "sdcard";
- input-enable;
- bias-pull-up;
- };
- };
-
- sd_1bit_pins:sd_1bit_pins {
- mux {
- groups = "sdcard_d0",
- "sdcard_cmd",
- "sdcard_clk";
- function = "sdcard";
- input-enable;
- bias-pull-up;
- };
- };
-
- ao_to_sd_uart_pins:ao_to_sd_uart_pins {
- mux {
- groups = "uart_tx_ao_a_c4",
- "uart_rx_ao_a_c5";
- function = "uart_ao_a_ee";
- bias-pull-up;
- input-enable;
- };
- };
-
- emmc_clk_cmd_pins:emmc_clk_cmd_pins {
- mux {
- groups = "emmc_cmd",
- "emmc_clk";
- function = "emmc";
- input-enable;
- bias-pull-up;
- };
- };
-
-
- emmc_conf_pull_up:emmc_conf_pull_up {
- mux {
- groups = "emmc_nand_d07",
- "emmc_clk",
- "emmc_cmd";
- function = "emmc";
- input-enable;
- bias-pull-up;
- };
- };
-
- emmc_conf_pull_done:emmc_conf_pull_done {
- mux {
- groups = "emmc_ds";
- function = "emmc";
- input-enable;
- bias-pull-down;
- };
- };
-
- spifc_cs_pin:spifc_cs_pin {
- mux {
- groups = "nor_cs";
- function = "nor";
- bias-pull-up;
- };
- };
-
- spifc_pulldown: spifc_pulldown {
- mux {
- groups = "nor_d",
- "nor_q",
- "nor_c";
- function = "nor";
- bias-pull-down;
- };
- };
-
- spifc_pullup: spifc_pullup {
- mux {
- groups = "nor_cs";
- function = "nor";
- bias-pull-up;
- };
- };
-
- spifc_all_pins: spifc_all_pins {
- mux {
- groups = "nor_d",
- "nor_q",
- "nor_c";
- function = "nor";
- input-enable;
- bias-pull-down;
- };
- };
-
- sd_clk_cmd_pins:sd_clk_cmd_pins{
- mux {
- groups = "sdcard_cmd",
- "sdcard_clk";
- function = "sdcard";
- input-enable;
- bias-pull-up;
- };
- };
-
- sd_all_pins:sd_all_pins{
- mux {
- groups = "sdcard_d0",
- "sdcard_d1",
- "sdcard_d2",
- "sdcard_d3",
- "sdcard_cmd",
- "sdcard_clk";
- function = "sdcard";
- input-enable;
- bias-pull-up;
- };
- };
-
- hdmirx_a_mux:hdmirx_a_mux {
- mux {
- groups = "hdmirx_hpd_a", "hdmirx_det_a",
- "hdmirx_sda_a", "hdmirx_sck_a";
- function = "hdmirx_a";
- };
- };
-
- hdmirx_b_mux:hdmirx_b_mux {
- mux {
- groups = "hdmirx_hpd_b", "hdmirx_det_b",
- "hdmirx_sda_b", "hdmirx_sck_b";
- function = "hdmirx_b";
- };
- };
-
- hdmirx_c_mux:hdmirx_c_mux {
- mux {
- groups = "hdmirx_hpd_c", "hdmirx_det_c",
- "hdmirx_sda_c", "hdmirx_sck_c";
- function = "hdmirx_c";
- };
- };
-
- hdmirx_d_mux:hdmirx_d_mux {
- mux {
- groups = "hdmirx_hpd_d", "hdmirx_det_d",
- "hdmirx_sda_d", "hdmirx_sck_d";
- function = "hdmirx_d";
- };
- };
-
- i2c0_z_pins:i2c0_z {
- mux {
- groups = "i2c0_sda",
- "i2c0_sck";
- function = "i2c0";
- };
- };
-
- i2c1_dv_pins:i2c1_z {
- mux {
- groups = "i2c1_sda",
- "i2c1_sck";
- function = "i2c1";
- };
- };
-
- i2c2_h_pins:i2c2_h {
- mux {
- groups = "i2c2_sda",
- "i2c2_sck";
- function = "i2c2";
- };
- };
-
- i2c3_z_pins:i2c3_z {
- mux {
- groups = "i2c3_sda",
- "i2c3_sck";
- function = "i2c3";
- };
- };
-
- a_uart_pins:a_uart {
- mux {
- groups = "uart_tx_a",
- "uart_rx_a",
- "uart_cts_a",
- "uart_rts_a";
- function = "uart_a";
- };
- };
-
- b_uart_pins:b_uart {
- mux {
- groups = "uart_tx_b",
- "uart_rx_b";
- function = "uart_b";
- };
- };
-
- c_uart_pins:c_uart {
- mux {
- groups = "uart_tx_c",
- "uart_rx_c";
- function = "uart_c";
- };
- };
-
- lcd_vbyone_pins: lcd_vbyone_pin {
- mux {
- groups = "vx1_lockn","vx1_htpdn";
- function = "vbyone";
- };
- };
-
- atvdemod_agc_pins: atvdemod_agc_pins {
- mux {
- groups = "atv_if_agc";
- function = "atv";
- };
- };
-
- dtvdemod_agc_pins: dtvdemod_agc_pins {
- mux {
- groups = "dtv_if_agc";
- function = "dtv";
- };
- };
-
- spicc_pins: spicc {
- mux {
- groups = "spi_miso_a",
- "spi_mosi_a",
- "spi_clk_a";
- function = "spi_a";
- };
- };
-};
arm_pmu {
compatible = "arm,cortex-a15-pmu";
- interrupts = <0 137 4>;
- reg = <0xff634400 0x1000>;
-
- /* addr = base + offset << 2 */
- sys_cpu_status0_offset = <0xa0>;
-
- sys_cpu_status0_pmuirq_mask = <0xf>;
-
+ /* clusterb-enabled; */
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xff634680 0x4>;
+ cpumasks = <0xf>;
/* default 10ms */
- relax_timer_ns = <10000000>;
-
+ relax-timer-ns = <10000000>;
/* default 10000us */
- max_wait_cnt = <10000>;
+ max-wait-cnt = <10000>;
};
gic: interrupt-controller@2c001000 {
#include <linux/threads.h>
#include <asm/irq.h>
-#ifdef CONFIG_AMLOGIC_MODIFY
-#define NR_IPI 8
-#else
#define NR_IPI 7
-#endif
typedef struct {
unsigned int __softirq_pending;
(regs)->ARM_sp = current_stack_pointer; \
(regs)->ARM_cpsr = SVC_MODE; \
}
-
-#ifdef CONFIG_AMLOGIC_MODIFY
-
-extern void armv8pmu_handle_irq_ipi(void);
-
-struct amlpmu_fixup_cpuinfo {
- int irq_num;
-
- int fix_done;
-
- unsigned long irq_cnt;
- unsigned long empty_irq_cnt;
-
- unsigned long irq_time;
- unsigned long empty_irq_time;
-
- unsigned long last_irq_cnt;
- unsigned long last_empty_irq_cnt;
-
- unsigned long last_irq_time;
- unsigned long last_empty_irq_time;
-};
-
-struct amlpmu_fixup_context {
- struct amlpmu_fixup_cpuinfo __percpu *cpuinfo;
-
- /* struct arm_pmu */
- void *dev;
-
- /* sys_cpu_status0 reg */
- unsigned int *sys_cpu_status0;
-
- /*
- * In main pmu irq route wait for other cpu fix done may cause lockup,
- * when lockup we disable main irq for a while.
- * relax_timer will enable main irq again.
- */
- struct hrtimer relax_timer;
-
- /* dts prop */
- unsigned int sys_cpu_status0_offset;
- unsigned int sys_cpu_status0_pmuirq_mask;
- unsigned int relax_timer_ns;
- unsigned int max_wait_cnt;
-};
-#endif
-
#endif /* __ARM_PERF_EVENT_H__ */
#ifdef CONFIG_CPU_V7
-#ifdef CONFIG_AMLOGIC_MODIFY
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-#endif
-
#include <asm/cp15.h>
#include <asm/cputype.h>
#include <asm/irq_regs.h>
#include <linux/perf/arm_pmu.h>
#include <linux/platform_device.h>
-#ifdef CONFIG_AMLOGIC_MODIFY
-#include <linux/of.h>
-#include <linux/of_irq.h>
-#include <linux/of_device.h>
-#include <linux/irq.h>
-#include <asm/irq.h>
-#include <linux/interrupt.h>
-#include <linux/irqdesc.h>
-#include <linux/of_address.h>
-#include <linux/delay.h>
-#endif
-
-
/*
* Common ARMv7 event types
*
}
#ifdef CONFIG_AMLOGIC_MODIFY
-static struct amlpmu_fixup_context amlpmu_fixup_ctx;
-
-static enum hrtimer_restart amlpmu_relax_timer_func(struct hrtimer *timer)
-{
- struct amlpmu_fixup_cpuinfo *ci;
-
- ci = per_cpu_ptr(amlpmu_fixup_ctx.cpuinfo, 0);
-
- pr_alert("enable cpu0_irq %d again, irq cnt = %lu\n",
- ci->irq_num,
- ci->irq_cnt);
- enable_irq(ci->irq_num);
-
- return HRTIMER_NORESTART;
-}
-
-
-static void amlpmu_relax_timer_start(int other_cpu)
-{
- struct amlpmu_fixup_cpuinfo *ci;
- int cpu;
-
- cpu = smp_processor_id();
- WARN_ON(cpu != 0);
-
- ci = per_cpu_ptr(amlpmu_fixup_ctx.cpuinfo, 0);
-
- pr_alert("wait cpu %d fixup done timeout, main cpu irq cnt = %lu\n",
- other_cpu,
- ci->irq_cnt);
-
- if (hrtimer_active(&amlpmu_fixup_ctx.relax_timer)) {
- pr_alert("relax_timer already active, return!\n");
- return;
- }
-
- disable_irq_nosync(ci->irq_num);
-
- hrtimer_start(&amlpmu_fixup_ctx.relax_timer,
- ns_to_ktime(amlpmu_fixup_ctx.relax_timer_ns),
- HRTIMER_MODE_REL);
-}
+#include <linux/perf/arm_pmu.h>
static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev);
-void armv8pmu_handle_irq_ipi(void)
+void amlpmu_handle_irq_ipi(void *arg)
{
- int cpu = smp_processor_id();
-
- WARN_ON(cpu == 0);
- WARN_ON(!amlpmu_fixup_ctx.dev);
-
- armv7pmu_handle_irq(-1, amlpmu_fixup_ctx.dev);
-}
-
-static int aml_pmu_fix(void)
-{
- int i;
- int cpu;
- int pmuirq_val;
- struct amlpmu_fixup_cpuinfo *ci;
-
- int max_wait_cnt = amlpmu_fixup_ctx.max_wait_cnt;
-
- pmuirq_val = readl(amlpmu_fixup_ctx.sys_cpu_status0);
- pmuirq_val &= amlpmu_fixup_ctx.sys_cpu_status0_pmuirq_mask;
-
- for (cpu = 0; cpu < num_possible_cpus(); cpu++) {
- if (pmuirq_val & (1<<cpu)) {
- if (cpu == 0) {
- pr_debug("cpu0 shouldn't fix pmuirq = 0x%x\n",
- pmuirq_val);
- } else {
- pr_debug("fix pmu irq cpu %d, pmuirq = 0x%x\n",
- cpu,
- pmuirq_val);
-
- ci = per_cpu_ptr(amlpmu_fixup_ctx.cpuinfo,
- cpu);
-
- ci->fix_done = 0;
-
- /* aml pmu IPI will set fix_done to 1 */
- mb();
-
- smp_send_aml_pmu(cpu);
-
- for (i = 0; i < max_wait_cnt; i++) {
- if (READ_ONCE(ci->fix_done))
- break;
-
- udelay(1);
- }
-
- if (i == amlpmu_fixup_ctx.max_wait_cnt)
- amlpmu_relax_timer_start(cpu);
-
- return 0;
- }
- }
- }
-
- return 1;
-}
-
-static void aml_pmu_fix_stat_account(int is_empty_irq)
-{
- int freq;
- unsigned long time = jiffies;
- struct amlpmu_fixup_cpuinfo *ci;
-
- ci = this_cpu_ptr(amlpmu_fixup_ctx.cpuinfo);
-
- ci->irq_cnt++;
- ci->irq_time = time;
- if (!ci->last_irq_cnt) {
- ci->last_irq_cnt = ci->irq_cnt;
- ci->last_irq_time = ci->irq_time;
- }
-
- if (is_empty_irq) {
- ci->empty_irq_cnt++;
- ci->empty_irq_time = time;
- if (!ci->last_empty_irq_cnt) {
- ci->last_empty_irq_cnt = ci->empty_irq_cnt;
- ci->last_empty_irq_time = ci->empty_irq_time;
- }
- }
-
- if (time_after(ci->irq_time, ci->last_irq_time + HZ)) {
- freq = ci->irq_cnt - ci->last_irq_cnt;
- freq = freq * HZ / (ci->irq_time - ci->last_irq_time);
- pr_debug("irq_cnt = %lu, irq_last_cnt = %lu, freq = %d\n",
- ci->irq_cnt,
- ci->last_irq_cnt,
- freq);
-
- ci->last_irq_cnt = ci->irq_cnt;
- ci->last_irq_time = ci->irq_time;
- }
-
- if (is_empty_irq &&
- time_after(ci->empty_irq_time, ci->last_empty_irq_time + HZ)) {
-
- freq = ci->empty_irq_cnt - ci->last_empty_irq_cnt;
- freq *= HZ;
- freq /= (ci->empty_irq_time - ci->last_empty_irq_time);
- pr_debug("empty_irq_cnt = %lu, freq = %d\n",
- ci->empty_irq_cnt,
- freq);
-
- ci->last_empty_irq_cnt = ci->empty_irq_cnt;
- ci->last_empty_irq_time = ci->empty_irq_time;
- }
+ armv7pmu_handle_irq(-1, amlpmu_ctx.pmu);
}
#endif
struct pt_regs *regs;
int idx;
-#ifdef CONFIG_AMLOGIC_MODIFY
- int cpu;
- int is_empty_irq = 0;
- struct amlpmu_fixup_cpuinfo *ci;
-
- ci = this_cpu_ptr(amlpmu_fixup_ctx.cpuinfo);
- ci->irq_num = irq_num;
- amlpmu_fixup_ctx.dev = dev;
- cpu = smp_processor_id();
-#endif
-
/*
* Get and reset the IRQ flags
*/
pmnc = armv7_pmnc_getreset_flags();
#ifdef CONFIG_AMLOGIC_MODIFY
- ci->fix_done = 1;
-#endif
-
+ /* amlpmu have routed the interrupt successfully, return IRQ_HANDLED */
+ if (amlpmu_handle_irq(cpu_pmu,
+ irq_num,
+ armv7_pmnc_has_overflowed(pmnc)))
+ return IRQ_HANDLED;
+#else
/*
* Did an overflow occur?
*/
-#ifdef CONFIG_AMLOGIC_MODIFY
- if (!armv7_pmnc_has_overflowed(pmnc)) {
- is_empty_irq = 1;
-
- if (cpu == 0)
- is_empty_irq = aml_pmu_fix();
- }
-
- aml_pmu_fix_stat_account(is_empty_irq);
-
- /* txlx have some empty pmu irqs, so return IRQ_HANDLED */
- if (is_empty_irq)
- return IRQ_HANDLED;
-#else
if (!armv7_pmnc_has_overflowed(pmnc))
return IRQ_NONE;
-
#endif
+
/*
* Handle the counter(s) overflow(s)
*/
{ /* sentinel value */ }
};
-#ifdef CONFIG_AMLOGIC_MODIFY
-static int amlpmu_fixup_init(struct platform_device *pdev)
-{
- int ret;
- void __iomem *base;
-
- amlpmu_fixup_ctx.cpuinfo = __alloc_percpu(
- sizeof(struct amlpmu_fixup_cpuinfo), 2 * sizeof(void *));
- if (!amlpmu_fixup_ctx.cpuinfo) {
- pr_err("alloc percpu failed\n");
- return -ENOMEM;
- }
-
- base = of_iomap(pdev->dev.of_node, 0);
- if (IS_ERR(base)) {
- pr_err("of_iomap() failed, base = %p\n", base);
- return PTR_ERR(base);
- }
-
- ret = of_property_read_u32(pdev->dev.of_node,
- "sys_cpu_status0_offset",
- &amlpmu_fixup_ctx.sys_cpu_status0_offset);
- if (ret) {
- pr_err("read sys_cpu_status0_offset failed, ret = %d\n", ret);
- return 1;
- }
- pr_debug("sys_cpu_status0_offset = 0x%0x\n",
- amlpmu_fixup_ctx.sys_cpu_status0_offset);
-
- ret = of_property_read_u32(pdev->dev.of_node,
- "sys_cpu_status0_pmuirq_mask",
- &amlpmu_fixup_ctx.sys_cpu_status0_pmuirq_mask);
- if (ret) {
- pr_err("read sys_cpu_status0_pmuirq_mask failed, ret = %d\n",
- ret);
- return 1;
- }
- pr_debug("sys_cpu_status0_pmuirq_mask = 0x%0x\n",
- amlpmu_fixup_ctx.sys_cpu_status0_pmuirq_mask);
-
-
- ret = of_property_read_u32(pdev->dev.of_node,
- "relax_timer_ns",
- &amlpmu_fixup_ctx.relax_timer_ns);
- if (ret) {
- pr_err("read prop relax_timer_ns failed, ret = %d\n", ret);
- return 1;
- }
- pr_debug("relax_timer_ns = %u\n", amlpmu_fixup_ctx.relax_timer_ns);
-
-
- ret = of_property_read_u32(pdev->dev.of_node,
- "max_wait_cnt",
- &amlpmu_fixup_ctx.max_wait_cnt);
- if (ret) {
- pr_err("read prop max_wait_cnt failed, ret = %d\n", ret);
- return 1;
- }
- pr_debug("max_wait_cnt = %u\n", amlpmu_fixup_ctx.max_wait_cnt);
-
-
- base += (amlpmu_fixup_ctx.sys_cpu_status0_offset << 2);
- amlpmu_fixup_ctx.sys_cpu_status0 = base;
- pr_debug("sys_cpu_status0 = %p\n", amlpmu_fixup_ctx.sys_cpu_status0);
-
-
- hrtimer_init(&amlpmu_fixup_ctx.relax_timer,
- CLOCK_MONOTONIC,
- HRTIMER_MODE_REL);
- amlpmu_fixup_ctx.relax_timer.function = amlpmu_relax_timer_func;
-
- return 0;
-}
-#endif
-
static int armv7_pmu_device_probe(struct platform_device *pdev)
{
-#ifdef CONFIG_AMLOGIC_MODIFY
- if (amlpmu_fixup_init(pdev))
- return 1;
-#endif
-
return arm_pmu_device_probe(pdev, armv7_pmu_of_device_ids,
armv7_pmu_probe_table);
}
#include <asm/mach/arch.h>
#include <asm/mpu.h>
-#ifdef CONFIG_AMLOGIC_MODIFY
-#include <asm/perf_event.h>
-#endif
-
#define CREATE_TRACE_POINTS
#include <trace/events/ipi.h>
IPI_CPU_STOP,
IPI_IRQ_WORK,
IPI_COMPLETION,
- #ifdef CONFIG_AMLOGIC_MODIFY
- IPI_AML_PMU,
- #endif
IPI_CPU_BACKTRACE,
/*
* SGI8-15 can be reserved by secure firmware, and thus may
S(IPI_CPU_STOP, "CPU stop interrupts"),
S(IPI_IRQ_WORK, "IRQ work interrupts"),
S(IPI_COMPLETION, "completion interrupts"),
-#ifdef CONFIG_AMLOGIC_MODIFY
- S(IPI_AML_PMU, "AML pmu cross interrupts"),
-#endif
};
static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
__smp_cross_call(target, ipinr);
}
-#ifdef CONFIG_AMLOGIC_MODIFY
-void smp_send_aml_pmu(int cpu)
-{
- smp_cross_call(cpumask_of(cpu), IPI_AML_PMU);
-}
-#endif
-
void show_ipi_list(struct seq_file *p, int prec)
{
unsigned int cpu, i;
printk_nmi_exit();
break;
-#ifdef CONFIG_AMLOGIC_MODIFY
- case IPI_AML_PMU:
- armv8pmu_handle_irq_ipi();
- break;
-#endif
-
default:
pr_crit("CPU%u: Unknown IPI message 0x%x\n",
cpu, ipinr);
bit_mode=<12>;
bit_resolution=<0>;
};
+
arm_pmu {
compatible = "arm,armv8-pmuv3";
- interrupts = <0 137 4>;
- reg = <0x0 0xff634400 0 0x1000>;
-
- /* addr = base + offset << 2 */
- sys_cpu_status0_offset = <0xa0>;
-
- sys_cpu_status0_pmuirq_mask = <0xf>;
-
+ /* clusterb-enabled; */
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x0 0xff634680 0x0 0x4>;
+ cpumasks = <0xf>;
/* default 10ms */
- relax_timer_ns = <10000000>;
-
+ relax-timer-ns = <10000000>;
/* default 10000us */
- max_wait_cnt = <10000>;
+ max-wait-cnt = <10000>;
};
-
gic: interrupt-controller@2c001000 {
compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
#interrupt-cells = <3>;
bit_mode=<12>;
bit_resolution=<0>;
};
- arm_pmu {
- compatible = "arm,armv8-pmuv3";
- interrupts = <0 137 4>;
- reg = <0x0 0xff634400 0 0x1000>;
-
- /* addr = base + offset << 2 */
- sys_cpu_status0_offset = <0xa0>;
-
- sys_cpu_status0_pmuirq_mask = <0xf>;
+ arm_pmu {
+ compatible = "arm,cortex-a15-pmu";
+ /* clusterb-enabled; */
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xff634680 0x4>;
+ cpumasks = <0xf>;
/* default 10ms */
- relax_timer_ns = <10000000>;
-
+ relax-timer-ns = <10000000>;
/* default 10000us */
- max_wait_cnt = <10000>;
+ max-wait-cnt = <10000>;
};
gic: interrupt-controller@2c001000 {
max-duty-cycle = <1250>;
/* Voltage Duty-Cycle */
voltage-table = <1022000 0>,
- <1011000 3>,
+ <1011000 3>,
<1001000 6>,
<991000 10>,
<981000 13>,
bit_mode=<12>;
bit_resolution=<0>;
};
+
arm_pmu {
compatible = "arm,armv8-pmuv3";
- interrupts = <0 137 4>;
+ clusterb-enabled;
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x0 0xff634680 0x0 0x4>,
+ <0x0 0xff6347c0 0x0 0x04>;
+ cpumasks = <0x3 0x3C>;
+ /* default 10ms */
+ relax-timer-ns = <10000000>;
+ /* default 10000us */
+ max-wait-cnt = <10000>;
};
gic: interrupt-controller@2c001000 {
bit_mode=<12>;
bit_resolution=<0>;
};
+
arm_pmu {
compatible = "arm,armv8-pmuv3";
- interrupts = <0 137 4>;
- reg = <0x0 0xc8834400 0 0x1000>;
-
- /* addr = base + offset << 2 */
- sys_cpu_status0_offset = <0xa0>;
-
- sys_cpu_status0_pmuirq_mask = <0xf>;
-
+ /* clusterb-enabled; */
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x0 0xc8834400 0x0 0x4>;
+ cpumasks = <0xf>;
/* default 10ms */
- relax_timer_ns = <10000000>;
-
+ relax-timer-ns = <10000000>;
/* default 10000us */
- max_wait_cnt = <10000>;
+ max-wait-cnt = <10000>;
};
gic: interrupt-controller@2c001000 {
bit_mode=<12>;
bit_resolution=<0>;
};
+
arm_pmu {
compatible = "arm,armv8-pmuv3";
- interrupts = <0 137 4>,
- <0 138 4>,
- <0 153 4>,
- <0 154 4>;
+ /* clusterb-enabled; */
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x0 0xc8834400 0x0 0x4>;
+ cpumasks = <0xf>;
+ /* default 10ms */
+ relax-timer-ns = <10000000>;
+ /* default 10000us */
+ max-wait-cnt = <10000>;
};
gic: interrupt-controller@2c001000 {
bit_mode=<12>;
bit_resolution=<0>;
};
+
arm_pmu {
compatible = "arm,armv8-pmuv3";
- interrupts = <0 137 4>,
- <0 138 4>,
- <0 153 4>,
- <0 154 4>;
+ /* clusterb-enabled; */
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x0 0xc8834400 0x0 0x4>;
+ cpumasks = <0xf>;
+ /* default 10ms */
+ relax-timer-ns = <10000000>;
+ /* default 10000us */
+ max-wait-cnt = <10000>;
};
gic: interrupt-controller@2c001000 {
+++ /dev/null
-/*
- * arch/arm64/boot/dts/amlogic/mesontxl.dtsi
- *
- * Copyright (C) 2018 Amlogic, Inc. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/amlogic,txl-clkc.h>
-#include <dt-bindings/gpio/meson-txl-gpio.h>
-#include <dt-bindings/pwm/pwm.h>
-#include <dt-bindings/pwm/meson.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/meson_rc.h>
-#include <dt-bindings/input/input.h>
-#include "mesongxbb-gpu-mali450.dtsi"
-#include <dt-bindings/iio/adc/amlogic-saradc.h>
-
-/ {
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- cpus:cpus {
- #address-cells = <2>;
- #size-cells = <0>;
- #cooling-cells = <2>;
-
- cpu-map {
- cluster0:cluster0 {
- core0 {
- cpu = <&CPU0>;
- };
- core1 {
- cpu = <&CPU1>;
- };
- core2 {
- cpu = <&CPU2>;
- };
- core3 {
- cpu = <&CPU3>;
- };
- };
- };
-
- CPU0:cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
- reg = <0x0 0x0>;
- enable-method = "psci";
- clocks = <&scpi_dvfs 0>;
- clock-names = "cpu-cluster.0";
- cpu-idle-states = <&SYSTEM_SLEEP_0>;
- };
-
- CPU1:cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
- reg = <0x0 0x1>;
- enable-method = "psci";
- clocks = <&scpi_dvfs 0>;
- clock-names = "cpu-cluster.0";
- cpu-idle-states = <&SYSTEM_SLEEP_0>;
- };
-
- CPU2:cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
- reg = <0x0 0x2>;
- enable-method = "psci";
- clocks = <&scpi_dvfs 0>;
- clock-names = "cpu-cluster.0";
- cpu-idle-states = <&SYSTEM_SLEEP_0>;
- };
-
- CPU3:cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
- reg = <0x0 0x3>;
- enable-method = "psci";
- clocks = <&scpi_dvfs 0>;
- clock-names = "cpu-cluster.0";
- cpu-idle-states = <&SYSTEM_SLEEP_0>;
- };
-
- idle-states {
- entry-method = "arm,psci";
-/*
- CPU_SLEEP_0: cpu-sleep-0 {
- compatible = "arm,idle-state";
- arm,psci-suspend-param = <0x0010000>;
- local-timer-stop;
- entry-latency-us = <3000>;
- exit-latency-us = <3000>;
- min-residency-us = <8000>;
- };
-*/
-
- SYSTEM_SLEEP_0: system-sleep-0 {
- compatible = "arm,idle-state";
- arm,psci-suspend-param = <0x0020000>;
- local-timer-stop;
- entry-latency-us = <0x3fffffff>;
- exit-latency-us = <0x40000000>;
- min-residency-us = <0xffffffff>;
- };
-
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 0xff01>,
- <GIC_PPI 14 0xff01>,
- <GIC_PPI 11 0xff01>,
- <GIC_PPI 10 0xff01>;
- };
-
- timer_bc: timer@c1109990 {
- compatible = "arm, meson-bc-timer";
- reg = <0x0 0xc1109990 0x0 0x4 0x0 0xc1109994 0x0 0x4>;
- timer_name = "Meson TimerF";
- clockevent-rating = <300>;
- clockevent-shift = <20>;
- clockevent-features = <0x23>;
- interrupts = <0 60 1>;
- bit_enable = <16>;
- bit_mode = <12>;
- bit_resolution = <0>;
- };
-
- pmu {
- compatible = "arm,armv8-pmuv3";
- interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- gic: interrupt-controller@2c001000 {
- compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0x0 0xc4301000 0 0x1000>,
- <0x0 0xc4302000 0 0x0100>;
- interrupts = <GIC_PPI 9 0xf04>;
- };
-
- clocks {
- xtal: xtal-clk {
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- clock-output-names = "xtal";
- #clock-cells = <0>;
- };
- };
-
- cpu_iomap {
- compatible = "amlogic, iomap";
- #address-cells=<2>;
- #size-cells=<2>;
- ranges;
- io_cbus_base {
- reg = <0x0 0xc1100000 0x0 0x100000>;
- };
- io_apb_base {
- reg = <0x0 0xd0000000 0x0 0x100000>;
- };
- io_aobus_base {
- reg = <0x0 0xc8100000 0x0 0x100000>;
- };
- io_vapb_base {
- reg = <0x0 0xd0100000 0x0 0x100000>;
- };
- io_hiu_base {
- reg = <0x0 0xc883c000 0x0 0x2000>;
- };
- };
-
- cpuinfo {
- compatible = "amlogic, cpuinfo";
- cpuinfo_cmd = <0x82000044>;
- };
-
- ram-dump {
- compatible = "amlogic, ram_dump";
- status = "okay";
- };
-
- securitykey {
- compatible = "amlogic, securitykey";
- status = "okay";
- storage_query = <0x82000060>;
- storage_read = <0x82000061>;
- storage_write = <0x82000062>;
- storage_tell = <0x82000063>;
- storage_verify = <0x82000064>;
- storage_status = <0x82000065>;
- storage_list = <0x82000067>;
- storage_remove = <0x82000068>;
- storage_in_func = <0x82000023>;
- storage_out_func = <0x82000024>;
- storage_block_func = <0x82000025>;
- storage_size_func = <0x82000027>;
- storage_set_enctype = <0x8200006A>;
- storage_get_enctype = <0x8200006B>;
- storage_version = <0x8200006C>;
- };
-
- mailbox: mhu@c883c400 {
- compatible = "amlogic, meson_mhu";
- reg = <0x0 0xc883c400 0x0 0x4c>, /* MHU registers */
- <0x0 0xc8013000 0x0 0x800>; /* Payload area */
- interrupts = <0 209 1>, /* low priority interrupt */
- <0 210 1>; /* high priority interrupt */
- #mbox-cells = <1>;
- mbox-names = "cpu_to_scp_low", "cpu_to_scp_high";
- mboxes = <&mailbox 0 &mailbox 1>;
- };
-
- scpi_clocks {
- compatible = "arm, scpi-clks";
-
- scpi_dvfs: scpi_clocks@0 {
- compatible = "arm, scpi-clk-indexed";
- #clock-cells = <1>;
- clock-indices = <0>;
- clock-output-names = "vcpu";
- };
-
- };
-
- pinctrl_aobus: pinctrl@c8100014{
- compatible = "amlogic,meson-txl-aobus-pinctrl";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio_ao: ao-bank@c8100014{
- reg = <0x0 0xc8100014 0x0 0x8>,
- <0x0 0xc810002c 0x0 0x4>,
- <0x0 0xc8100024 0x0 0x8>;
- reg-names = "mux", "pull", "gpio";
- gpio-controller;
- #gpio-cells = <2>;
- };
- };
-
- pinctrl_periphs: pinctrl@c88344b0{
- compatible = "amlogic,meson-txl-periphs-pinctrl";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio: banks@c88344b0{
- reg = <0x0 0xc88344b0 0x0 0x28>,
- <0x0 0xc88344e8 0x0 0x14>,
- <0x0 0xc8834520 0x0 0x14>,
- <0x0 0xc8834430 0x0 0x40>;
- reg-names = "mux",
- "pull",
- "pull-enable",
- "gpio";
- gpio-controller;
- #gpio-cells = <2>;
- };
- };
-
- dwc3: dwc3@c9000000 {
- compatible = "synopsys, dwc3";
- status = "disable";
- reg = <0x0 0xc9000000 0x0 0x100000>;
- interrupts = <0 30 4>;
- usb-phy = <&usb2_phy>, <&usb3_phy>;
- cpu-type = "gxl";
- clock-src = "usb3.0";
- };
-
- usb2_phy: usb2phy@d0078000 {
- compatible = "amlogic, amlogic-new-usb2";
- status = "disable";
- portnum = <4>;
- reg = <0x0 0xd0078000 0x0 0x80
- 0x0 0xc1104408 0x0 0x4>;
- };
-
- usb3_phy: usb3phy@d0078080 {
- compatible = "amlogic, amlogic-new-usb3";
- status = "disable";
- portnum = <0>;
- reg = <0x0 0xd0078080 0x0 0x20>;
- };
-
- dwc2_a: dwc2_a@c9100000 {
- compatible = "amlogic, dwc2";
- status = "disable";
- reg = <0x0 0xc9100000 0x0 0x40000>;
- interrupts = <0 31 4>;
- pl-periph-id = <0>; /** lm name */
- clock-src = "usb0"; /** clock src */
- port-id = <0>; /** ref to mach/usb.h */
- port-type = <2>; /** 0: otg, 1: host, 2: slave */
- port-speed = <0>; /** 0: default, high, 1: full */
- port-config = <0>; /** 0: default */
- port-dma = <0>;
- port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
- usb-fifo = <728>;
- cpu-type = "gxl";
- phy-reg = <0xd0078000>;
- phy-reg-size = <0xa0>;
- clocks = <&clkc CLKID_USB_GENERAL
- &clkc CLKID_USB1_TO_DDR
- &clkc CLKID_USB1>;
- clock-names = "usb_general",
- "usb1",
- "usb1_to_ddr";
- };
-
- ethmac: ethernet@0xc9410000 {
- compatible = "amlogic, gxbb-eth-dwmac";
- status = "disable";
- reg = <0x0 0xc9410000 0x0 0x10000
- 0x0 0xc8834540 0x0 0x8
- 0x0 0xc8834558 0x0 0xc
- 0x0 0xc1104484 0x0 0x4>;
- interrupts = <0 8 1
- 0 9 1>;
- phy-mode= "rmii";
- mc_val_internal_phy = <0x1800>;
- mc_val_external_phy = <0x1621>;
- interrupt-names = "macirq",
- "phyirq";
- clocks = <&clkc CLKID_ETH_CORE>;
- clock-names = "ethclk81";
- internal_phy=<1>;
- };
-
- saradc: saradc {
- compatible = "amlogic,meson-txl-saradc";
- status = "okay";
- #io-channel-cells = <1>;
- clocks = <&xtal>, <&clkc CLKID_SARADC_GATE>;
- clock-names = "xtal", "saradc_clk";
- interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
- reg = <0x0 0xc8100600 0x0 0x38>;
- };
-
- jtag {
- compatible = "amlogic, jtag";
- status = "okay";
- select = "apao"; /* disable/apao/apee */
- jtagao-gpios = <&gpio_ao GPIOAO_3 0
- &gpio_ao GPIOAO_4 0
- &gpio_ao GPIOAO_5 0
- &gpio_ao GPIOAO_7 0>;
- jtagee-gpios = <&gpio CARD_0 0
- &gpio CARD_1 0
- &gpio CARD_2 0
- &gpio CARD_3 0>;
- };
-
- meson_suspend: pm {
- compatible = "amlogic, pm";
- status = "okay";
- reg = <0x0 0xc81000a8 0x0 0x4>,
- <0x0 0xc810023c 0x0 0x4>;
- };
-
- reboot {
- compatible = "amlogic,reboot";
- sys_reset = <0x84000009>;
- sys_poweroff = <0x84000008>;
- };
-
- rtc {
- compatible = "amlogic, aml_vrtc";
- alarm_reg_addr = <0xc81000a8>;
- timer_e_addr = <0xc1109988>;
- init_date = "2018/01/01";
- status = "okay";
- };
-
- soc {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- cbus: bus@c1100000 {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- reg = <0x0 0xc1100000 0x0 0x100000>;
- ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
-
- meson_clk_msr@875c{
- compatible = "amlogic, gxl_measure";
- reg = <0x0 0x875c 0x0 0x4
- 0x0 0x8764 0x0 0x4>;
- };
-
- /*i2c-A*/
- i2c0: i2c@8500 {
- compatible = "amlogic,meson-txl-i2c";
- status = "disabled";
- reg = <0x0 0x8500 0x0 0x20>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- /*i2c-B*/
- i2c1: i2c@87c0 {
- compatible = "amlogic,meson-txl-i2c";
- status = "disabled";
- reg = <0x0 0x87c0 0x0 0x20>;
- interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- /*i2c-C*/
- i2c2: i2c@87e0 {
- compatible = "amlogic,meson-txl-i2c";
- status = "disabled";
- reg = <0x0 0x87e0 0x0 0x20>;
- interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- /*i2c-D*/
- i2c3: i2c@8d20 {
- compatible = "amlogic,meson-txl-i2c";
- status = "disabled";
- reg = <0x0 0x8d20 0x0 0x20>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- pwm_ab: pwm@8550 {
- compatible = "amlogic,txl-ee-pwm";
- reg = <0x0 0x8550 0x0 0x1c>;
- #pwm-cells = <3>;
- clocks = <&xtal>,
- <&xtal>,
- <&xtal>,
- <&xtal>;
- clock-names = "clkin0",
- "clkin1",
- "clkin2",
- "clkin3";
- status = "disabled";
- };
-
- pwm_cd: pwm@8640 {
- compatible = "amlogic,txl-ee-pwm";
- reg = <0x0 0x8640 0x0 0x1c>;
- #pwm-cells = <3>;
- clocks = <&xtal>,
- <&xtal>,
- <&xtal>,
- <&xtal>;
- clock-names = "clkin0",
- "clkin1",
- "clkin2",
- "clkin3";
- status = "disabled";
- };
-
- pwm_ef: pwm@86c0 {
- compatible = "amlogic,txl-ee-pwm";
- reg = <0x0 0x86c0 0x0 0x1c>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- spicc: spi@8d80 {
- compatible = "amlogic,meson-txl-spicc",
- "amlogic,meson-txlx-spicc";
- reg = <0x0 0x8d80 0x0 0x3c>;
- interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_SPICC0>;
- clock-names = "core";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- uart_A: serial@84c0 {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0x84c0 0x0 0x18>;
- interrupts = <0 26 1>;
- status = "disabled";
- clocks = <&xtal &clkc CLKID_UART0>;
- clock-names = "clk_uart", "clk_gate";
- fifosize = < 128 >;
- pinctrl-names = "default";
- pinctrl-0 = <&a_uart_pins>;
- };
-
- uart_B: serial@84dc {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0x84dc 0x0 0x18>;
- interrupts = <0 75 1>;
- status = "disabled";
- clocks = <&xtal &clkc CLKID_UART1>;
- clock-names = "clk_uart", "clk_gate";
- fifosize = < 64 >;
- pinctrl-names = "default";
- pinctrl-0 = <&b_uart_pins>;
- };
-
- uart_C: serial@8700 {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0x8700 0x0 0x18>;
- interrupts = <0 93 1>;
- status = "disabled";
- clocks = <&xtal &clkc CLKID_UART2>;
- clock-names = "clk_uart", "clk_gate";
- fifosize = < 64 >;
- pinctrl-names = "default";
- pinctrl-0 = <&c_uart_pins>;
- };
-
- gpio_intc: interrupt-controller@9880 {
- compatible = "amlogic,meson-gpio-intc",
- "amlogic,meson-txl-gpio-intc";
- reg = <0x0 0x9880 0x0 0x10>;
- interrupt-controller;
- #interrupt-cells = <2>;
- amlogic,channel-interrupts =
- <64 65 66 67 68 69 70 71>;
- status = "okay";
- };
-
- wdt_ee: watchdog@98d0 {
- compatible = "amlogic, meson-wdt";
- status = "okay";
- default_timeout=<10>;
- reset_watchdog_method=<1>;/*0:sysfs,1:kernel*/
- reset_watchdog_time=<2>;
- shutdown_timeout=<10>;
- firmware_timeout=<6>;
- suspend_timeout=<6>;
- reg = <0x0 0x98d0 0x0 0x10>;
- clock-names = "xtal";
- clocks = <&xtal>;
- };
-
- }; /* end of cbus */
-
- aobus: bus@c8100000 {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- reg = <0x0 0xc8100000 0x0 0x100000>;
- ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
-
- cpu_version {
- reg=<0x0 0x220 0x0 0x4>;
- };
-
- aoclkc: clock-controller@0 {
- compatible = "amlogic,txl-aoclkc";
- #clock-cells = <1>;
- reg = <0x0 0x0 0x0 0x1000>;
- };
-
- uart_AO: serial@4c0 {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0x4c0 0x0 0x18>;
- interrupts = <0 193 1>;
- status = "okay";
- clocks = <&xtal>;
- clock-names = "clk_uart";
- xtal_tick_en = <1>;
- fifosize = < 64 >;
- pinctrl-names = "default";
- /*pinctrl-0 = <&ao_uart_pins>;*/
- /* 0 not support;1 support */
- support-sysrq = <0>;
- };
-
- uart_AO_B: serial@04e0 {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0x04e0 0x0 0x18>;
- interrupts = <0 197 1>;
- status = "disabled";
- clocks = <&xtal>;
- clock-names = "clk_uart";
- fifosize = < 64 >;
- pinctrl-names = "default";
- pinctrl-0 = <&ao_b_uart_pins>;
- };
-
- i2c_AO: i2c@0500 {
- compatible = "amlogic,meson-txl-i2c";
- status = "disabled";
- reg = <0x0 0x0500 0x0 0x20>;
- interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- pwm_aoab: pwm@0550 {
- compatible = "amlogic,txl-ao-pwm";
- reg = <0x0 0x0550 0x0 0x1c>;
- #pwm-cells = <3>;
- clocks = <&xtal>,
- <&xtal>,
- <&xtal>,
- <&xtal>;
- clock-names = "clkin0",
- "clkin1",
- "clkin2",
- "clkin3";
- status = "disabled";
- };
-
- remote:rc@0580 {
- compatible = "amlogic, aml_remote";
- dev_name = "meson-remote";
- reg = <0x0 0x0580 0x00 0x44>,
- <0x0 0x0480 0x00 0x20>;
- status = "okay";
- protocol = <REMOTE_TYPE_NEC>;
- interrupts = <0 196 1>;
- pinctrl-names = "default";
- pinctrl-0 = <&remote_pins>;
- map = <&custom_maps>;
- max_frame_time = <200>;
- };
- }; /* end of aobus*/
-
- periphs: periphs@c8834000 {
- compatible = "simple-bus";
- reg = <0x0 0xc8834000 0x0 0x2000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
-
- rng {
- compatible = "amlogic,meson-rng";
- reg = <0x0 0x0 0x0 0x4>;
- quality = /bits/ 16 <1000>;
- };
- };/* end of periphs */
-
- hiubus: bus@c883c000 {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- reg = <0x0 0xc883c000 0x0 0x2000>;
- ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
-
- clkc: clock-controller@0 {
- compatible = "amlogic,txl-clkc";
- #clock-cells = <1>;
- reg = <0x0 0x0 0x0 0x3fc>;
- };
- };/* end of hiubus*/
-
- }; /* end of soc*/
-
- custom_maps: custom_maps {
- mapnum = <3>;
- map0 = <&map_0>;
- map1 = <&map_1>;
- map2 = <&map_2>;
- map_0: map_0{
- mapname = "amlogic-remote-1";
- customcode = <0xfb04>;
- release_delay = <80>;
- size = <44>; /*keymap size*/
- keymap = <REMOTE_KEY(0x01, KEY_1)
- REMOTE_KEY(0x02, KEY_2)
- REMOTE_KEY(0x03, KEY_3)
- REMOTE_KEY(0x04, KEY_4)
- REMOTE_KEY(0x05, KEY_5)
- REMOTE_KEY(0x06, KEY_6)
- REMOTE_KEY(0x07, KEY_7)
- REMOTE_KEY(0x08, KEY_8)
- REMOTE_KEY(0x09, KEY_9)
- REMOTE_KEY(0x0a, KEY_0)
- REMOTE_KEY(0x1F, KEY_FN_F1)
- REMOTE_KEY(0x15, KEY_MENU)
- REMOTE_KEY(0x16, KEY_TAB)
- REMOTE_KEY(0x0c, KEY_CHANNELUP)
- REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
- REMOTE_KEY(0x0e, KEY_VOLUMEUP)
- REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
- REMOTE_KEY(0x11, KEY_HOME)
- REMOTE_KEY(0x1c, KEY_RIGHT)
- REMOTE_KEY(0x1b, KEY_LEFT)
- REMOTE_KEY(0x19, KEY_UP)
- REMOTE_KEY(0x1a, KEY_DOWN)
- REMOTE_KEY(0x1d, KEY_ENTER)
- REMOTE_KEY(0x17, KEY_MUTE)
- REMOTE_KEY(0x49, KEY_FINANCE)
- REMOTE_KEY(0x43, KEY_BACK)
- REMOTE_KEY(0x12, KEY_FN_F4)
- REMOTE_KEY(0x14, KEY_FN_F5)
- REMOTE_KEY(0x18, KEY_FN_F6)
- REMOTE_KEY(0x59, KEY_INFO)
- REMOTE_KEY(0x5a, KEY_STOPCD)
- REMOTE_KEY(0x10, KEY_POWER)
- REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
- REMOTE_KEY(0x44, KEY_NEXTSONG)
- REMOTE_KEY(0x1e, KEY_REWIND)
- REMOTE_KEY(0x4b, KEY_FASTFORWARD)
- REMOTE_KEY(0x58, KEY_PLAYPAUSE)
- REMOTE_KEY(0x46, KEY_PROPS)
- REMOTE_KEY(0x40, KEY_UNDO)
- REMOTE_KEY(0x38, KEY_SCROLLLOCK)
- REMOTE_KEY(0x57, KEY_FN)
- REMOTE_KEY(0x5b, KEY_FN_ESC)
- REMOTE_KEY(0x13, 195)
- REMOTE_KEY(0x54, KEY_RED)
- REMOTE_KEY(0x4c, KEY_GREEN)
- REMOTE_KEY(0x4e, KEY_YELLOW)
- REMOTE_KEY(0x55, KEY_BLUE)
- REMOTE_KEY(0x53, KEY_BLUETOOTH)
- REMOTE_KEY(0x52, KEY_WLAN)
- REMOTE_KEY(0x39, KEY_CAMERA)
- REMOTE_KEY(0x41, KEY_SOUND)
- REMOTE_KEY(0x0b, KEY_QUESTION)
- REMOTE_KEY(0x00, KEY_CHAT)
- REMOTE_KEY(0x13, KEY_SEARCH)>;
- };
-
- map_1: map_1{
- mapname = "amlogic-remote-2";
- customcode = <0xfe01>;
- release_delay = <80>;
- size = <53>;
- keymap = <REMOTE_KEY(0x01, KEY_1)
- REMOTE_KEY(0x02, KEY_2)
- REMOTE_KEY(0x03, KEY_3)
- REMOTE_KEY(0x04, KEY_4)
- REMOTE_KEY(0x05, KEY_5)
- REMOTE_KEY(0x06, KEY_6)
- REMOTE_KEY(0x07, KEY_7)
- REMOTE_KEY(0x08, KEY_8)
- REMOTE_KEY(0x09, KEY_9)
- REMOTE_KEY(0x0a, KEY_0)
- REMOTE_KEY(0x1F, KEY_FN_F1)
- REMOTE_KEY(0x15, KEY_MENU)
- REMOTE_KEY(0x16, KEY_TAB)
- REMOTE_KEY(0x0c, KEY_CHANNELUP)
- REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
- REMOTE_KEY(0x0e, KEY_VOLUMEUP)
- REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
- REMOTE_KEY(0x11, KEY_HOME)
- REMOTE_KEY(0x1c, KEY_RIGHT)
- REMOTE_KEY(0x1b, KEY_LEFT)
- REMOTE_KEY(0x19, KEY_UP)
- REMOTE_KEY(0x1a, KEY_DOWN)
- REMOTE_KEY(0x1d, KEY_ENTER)
- REMOTE_KEY(0x17, KEY_MUTE)
- REMOTE_KEY(0x49, KEY_FINANCE)
- REMOTE_KEY(0x43, KEY_BACK)
- REMOTE_KEY(0x12, KEY_FN_F4)
- REMOTE_KEY(0x14, KEY_FN_F5)
- REMOTE_KEY(0x18, KEY_FN_F6)
- REMOTE_KEY(0x59, KEY_INFO)
- REMOTE_KEY(0x5a, KEY_STOPCD)
- REMOTE_KEY(0x10, KEY_POWER)
- REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
- REMOTE_KEY(0x44, KEY_NEXTSONG)
- REMOTE_KEY(0x1e, KEY_REWIND)
- REMOTE_KEY(0x4b, KEY_FASTFORWARD)
- REMOTE_KEY(0x58, KEY_PLAYPAUSE)
- REMOTE_KEY(0x46, KEY_PROPS)
- REMOTE_KEY(0x40, KEY_UNDO)
- REMOTE_KEY(0x38, KEY_SCROLLLOCK)
- REMOTE_KEY(0x57, KEY_FN)
- REMOTE_KEY(0x5b, KEY_FN_ESC)
- REMOTE_KEY(0x54, KEY_RED)
- REMOTE_KEY(0x4c, KEY_GREEN)
- REMOTE_KEY(0x4e, KEY_YELLOW)
- REMOTE_KEY(0x55, KEY_BLUE)
- REMOTE_KEY(0x53, KEY_BLUETOOTH)
- REMOTE_KEY(0x52, KEY_WLAN)
- REMOTE_KEY(0x39, KEY_CAMERA)
- REMOTE_KEY(0x41, KEY_SOUND)
- REMOTE_KEY(0x0b, KEY_QUESTION)
- REMOTE_KEY(0x00, KEY_CHAT)
- REMOTE_KEY(0x13, KEY_SEARCH)>;
- };
-
- map_2: map_2{
- mapname = "amlogic-remote-3";
- customcode = <0xbd02>;
- release_delay = <80>;
- size = <17>;
- keymap = <REMOTE_KEY(0xca,103)
- REMOTE_KEY(0xd2,108)
- REMOTE_KEY(0x99,105)
- REMOTE_KEY(0xc1,106)
- REMOTE_KEY(0xce,KEY_ENTER)
- REMOTE_KEY(0x45,116)
- REMOTE_KEY(0xc5,133)
- REMOTE_KEY(0x80,113)
- REMOTE_KEY(0xd0,15)
- REMOTE_KEY(0xd6,125)
- REMOTE_KEY(0x95,102)
- REMOTE_KEY(0xdd,104)
- REMOTE_KEY(0x8c,109)
- REMOTE_KEY(0x89,131)
- REMOTE_KEY(0x9c,130)
- REMOTE_KEY(0x9a,120)
- REMOTE_KEY(0xcd,121)>;
- };
- };
-
- aocec: aocec@0xc8100000 {
- compatible = "amlogic, aocec-txl";
- status = "okay";
- vendor_name = "Amlogic"; /* Max Chars: 8 */
- /* Refer to the following URL at:
- * http://standards.ieee.org/develop/regauth/oui/oui.txt
- */
- vendor_id = <0x000000>;
- product_desc = "TXL"; /* Max Chars: 16 */
- cec_osd_string = "AML_TV"; /* Max Chars: 14 */
- port_num = <3>;
- ee_cec;
- arc_port_mask = <0x2>;
- interrupts = <0 56 1
- 0 199 1>;
- interrupt-names = "hdmi_aocecb","hdmi_aocec";
- pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
- pinctrl-0=<&hdmitx_aocec>;
- pinctrl-1=<&hdmitx_aocecb>;
- pinctrl-2=<&hdmitx_aocec>;
- reg = <0x0 0xc810023c 0x0 0x4
- 0x0 0xc8100000 0x0 0x200
- 0x0 0xda83e000 0x0 0x10
- 0x0 0xc883c000 0x0 0x400>;
- reg-names = "ao_exit","ao","hdmirx","hhi";
- };
-
- canvas: canvas{
- compatible = "amlogic, meson, canvas";
- dev_name = "amlogic-canvas";
- status = "okay";
- reg = <0x0 0xc8838000 0x0 0x2000>;
- };
-
- codec_io: codec_io {
- compatible = "amlogic, codec_io";
- status = "okay";
- #address-cells=<2>;
- #size-cells=<2>;
- ranges;
- io_cbus_base{
- reg = <0x0 0xC1100000 0x0 0x100000>;
- };
- io_dos_base{
- reg = <0x0 0xc8820000 0x0 0x10000>;
- };
- io_hiubus_base{
- reg = <0x0 0xc883c000 0x0 0x2000>;
- };
- io_aobus_base{
- reg = <0x0 0xc8100000 0x0 0x100000>;
- };
- io_vcbus_base{
- reg = <0x0 0xd0100000 0x0 0x40000>;
- };
- io_dmc_base{
- reg = <0x0 0xc8838000 0x0 0x400>;
- };
- };
-
- vpu {
- compatible = "amlogic, vpu-txl";
- dev_name = "vpu";
- status = "okay";
- clocks = <&clkc CLKID_VAPB_MUX>,
- <&clkc CLKID_VPU_INTR>,
- <&clkc CLKID_VPU_P0_COMP>,
- <&clkc CLKID_VPU_P1_COMP>,
- <&clkc CLKID_VPU_MUX>;
- clock-names = "vapb_clk",
- "vpu_intr_gate",
- "vpu_clk0",
- "vpu_clk1",
- "vpu_clk";
- clk_level = <7>;
- /* 0: 100.0M 1: 166.7M 2: 200.0M 3: 250.0M */
- /* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */
- };
-
- ge2d {
- compatible = "amlogic, ge2d-txl";
- status = "okay";
- interrupts = <0 146 1>;
- interrupt-names = "ge2d";
- clocks = <&clkc CLKID_VAPB_MUX>,
- <&clkc CLKID_G2D>,
- <&clkc CLKID_GE2D_GATE>;
- clock-names = "clk_vapb_0",
- "clk_ge2d",
- "clk_ge2d_gate";
- reg = <0x0 0xd0160000 0x0 0x10000>;
- };
-
- meson-amvideom {
- compatible = "amlogic, amvideom";
- status = "okay";
- interrupts = <0 3 1>;
- interrupt-names = "vsync";
- };
-
- mesonstream {
- compatible = "amlogic, codec, streambuf";
- status = "okay";
- clocks = <&clkc CLKID_DOS_PARSER
- &clkc CLKID_DEMUX
- &clkc CLKID_DOS
- &clkc CLKID_CLK81
- &clkc CLKID_VDEC_MUX
- &clkc CLKID_HCODEC_MUX
- &clkc CLKID_HEVC_MUX>;
- clock-names = "parser_top",
- "demux",
- "vdec",
- "clk_81",
- "clk_vdec_mux",
- "clk_hcodec_mux",
- "clk_hevc_mux";
- };
-
- codec_mm {
- compatible = "amlogic, codec, mm";
- status = "okay";
- memory-region = <&codec_mm_cma &codec_mm_reserved>;
- };
-
- vdec {
- compatible = "amlogic, vdec";
- status = "okay";
- interrupts = <0 3 1
- 0 23 1
- 0 32 1
- 0 43 1
- 0 44 1
- 0 45 1>;
- interrupt-names = "vsync",
- "demux",
- "parser",
- "mailbox_0",
- "mailbox_1",
- "mailbox_2";
- };
-
- amvenc_avc {
- compatible = "amlogic, amvenc_avc";
- status = "okay";
- //memory-region = <&amvenc_avc_reserved>;
- //memory-region = <&avc_cma_reserved>;
- interrupts = <0 45 1>;
- interrupt-names = "mailbox_2";
- };
-
- rdma {
- compatible = "amlogic, meson, rdma";
- dev_name = "amlogic-rdma";
- status = "okay";
- interrupts = <0 89 1>;
- interrupt-names = "rdma";
- };
-
- audio_data: audio_data {
- compatible = "amlogic, audio_data";
- query_licence_cmd = <0x82000050>;
- status = "disabled";
- };
-
- efuse: efuse {
- compatible = "amlogic, efuse";
- read_cmd = <0x82000030>;
- write_cmd = <0x82000031>;
- get_max_cmd = <0x82000033>;
- key = <&efusekey>;
- clocks = <&clkc CLKID_EFUSE>;
- clock-names = "efuse_clk";
- status = "disabled";
- };
-
- efusekey:efusekey {
- keynum = <4>;
- key0 = <&key_0>;
- key1 = <&key_1>;
- key2 = <&key_2>;
- key3 = <&key_3>;
- key_0:key_0 {
- keyname = "mac";
- offset = <0>;
- size = <6>;
- };
- key_1:key_1 {
- keyname = "mac_bt";
- offset = <6>;
- size = <6>;
- };
- key_2:key_2 {
- keyname = "mac_wifi";
- offset = <12>;
- size = <6>;
- };
- key_3:key_3 {
- keyname = "usid";
- offset = <18>;
- size = <16>;
- };
- };
-
- cpu_ver_name {
- compatible = "amlogic, cpu-major-id-txl";
- status = "okay";
- };
-
- ddr_bandwidth {
- compatible = "amlogic, ddr-bandwidth";
- status = "okay";
- reg = <0x0 0xc8838000 0x0 0x100
- 0x0 0xc8837000 0x0 0x100>;
- interrupts = <0 52 1>;
- interrupt-names = "ddr_bandwidth";
- };
- dmc_monitor {
- compatible = "amlogic, dmc_monitor";
- status = "okay";
- reg_base = <0xda838400>;
- interrupts = <0 51 1>;
- };
-
- vdac {
- compatible = "amlogic, vdac-txl";
- status = "okay";
- };
-}; /* end of / */
-
-&gpu{
- /*gpu max freq is 750M*/
- tbl = <&clk285_cfg &clk400_cfg &clk500_cfg &clk666_cfg &clk750_cfg>;
-};
-
-&pinctrl_aobus {
-
- pwm_ao_a_ao3_pins: pwm_ao_a_ao3 {
- mux {
- groups = "pwm_ao_a_ao3";
- function = "pwm_ao_a";
- };
- };
-
- pwm_ao_a_ao7_pins: pwm_ao_a_ao7 {
- mux {
- groups = "pwm_ao_a_ao7";
- function = "pwm_ao_a";
- };
- };
-
- pwm_ao_b_ao8_pins: pwm_ao_b_ao8 {
- mux {
- groups = "pwm_ao_b_ao8";
- function = "pwm_ao_b";
- };
- };
-
- pwm_ao_b_ao9_pins: pwm_ao_b_ao9 {
- mux {
- groups = "pwm_ao_b_ao9";
- function = "pwm_ao_b";
- };
- };
-
- remote_pins:remote_pin {
- mux {
- groups = "remote_in";
- function = "ir_in";
- };
-
- };
-
- sd_to_ao_uart_clr_pins:sd_to_ao_uart_clr_pins {
- mux {
- groups = "GPIOAO_0",
- "GPIOAO_1";
- function = "gpio_aobus";
- };
- };
-
- sd_to_ao_uart_pins:sd_to_ao_uart_pins {
- mux {
- groups = "uart_tx_ao_a",
- "uart_rx_ao_a";
- function = "uart_ao_a";
- bias-pull-up;
- input-enable;
- };
- };
-
- i2c_AO_pins:i2c_AO {
- mux {
- groups = "i2c_sck_ao",
- "i2c_sda_ao";
- function = "i2c_ao";
- };
- };
-
- ao_uart_pins:ao_uart {
- mux {
- groups = "uart_tx_ao_a",
- "uart_rx_ao_a";
- function = "uart_ao_a";
- };
- };
-
- ao_b_uart_pins:ao_b_uart {
- mux {
- groups = "uart_tx_ao_b_ao4",
- "uart_rx_ao_b_ao5";
- function = "uart_ao_b";
- };
- };
-
- hdmitx_aocec: ao_cec {
- mux {
- groups = "ao_cec";
- function = "ao_cec";
- };
- };
-
- hdmitx_aocecb: ao_cecb {
- mux {
- groups = "ee_cec";
- function = "ee_cec";
- };
- };
-};
-
-&pinctrl_periphs {
-
- pwm_a_z5_pins: pwm_a_z5 {
- mux {
- groups = "pwm_a_z";
- function = "pwm_a";
- };
- };
-
- pwm_a_dv2_pins: pwm_a_dv2 {
- mux {
- groups = "pwm_a_dv";
- function = "pwm_a";
- };
- };
-
- pwm_b_z6_pins: pwm_b_z6 {
- mux {
- groups = "pwm_b_z";
- function = "pwm_b";
- };
- };
-
- pwm_b_dv3_pins: pwm_b_dv3 {
- mux {
- groups = "pwm_b_dv";
- function = "pwm_b";
- };
- };
-
- pwm_c_z7_pins: pwm_c_z7 {
- mux {
- groups = "pwm_c";
- function = "pwm_c";
- };
- };
-
- pwm_d_z4_pins: pwm_d_z4 {
- mux {
- groups = "pwm_d_z4";
- function = "pwm_d";
- };
- };
-
- pwm_d_z19_pins: pwm_d_z19 {
- mux {
- groups = "pwm_d_z19";
- function = "pwm_d";
- };
- };
-
- pwm_e_h4_pins: pwm_e_h4 {
- mux {
- groups = "pwm_e_h4";
- function = "pwm_e";
- };
- };
-
- pwm_e_h8_pins: pwm_e_h8 {
- mux {
- groups = "pwm_e_h8";
- function = "pwm_e";
- };
- };
-
- pwm_f_h9_pins: pwm_f_h9 {
- mux {
- groups = "pwm_f_h";
- function = "pwm_f";
- };
- };
-
- pwm_f_clk_pins: pwm_f_clk {
- mux {
- groups = "pwm_f_clk";
- function = "pwm_f";
- };
- };
-
- pwm_vs_dv2_pins: pwm_vs_dv2 {
- mux {
- groups = "pwm_vs_dv2";
- function = "pwm_vs";
- };
- };
-
- pwm_vs_dv3_pins: pwm_vs_dv3 {
- mux {
- groups = "pwm_vs_dv3";
- function = "pwm_vs";
- };
- };
-
- pwm_vs_z4_pins: pwm_vs_z4 {
- mux {
- groups = "pwm_vs_z4";
- function = "pwm_vs";
- };
- };
-
- pwm_vs_z6_pins: pwm_vs_z6 {
- mux {
- groups = "pwm_vs_z6";
- function = "pwm_vs";
- };
- };
-
- pwm_vs_z7_pins: pwm_vs_z7 {
- mux {
- groups = "pwm_vs_z7";
- function = "pwm_vs";
- };
- };
-
- pwm_vs_z19_pins: pwm_vs_z19 {
- mux {
- groups = "pwm_vs_z19";
- function = "pwm_vs";
- };
- };
-
- ao_to_sd_uart_clr_pins:ao_to_sd_uart_clr_pins {
- mux {
- groups = "sdcard_d2",
- "sdcard_d3";
- function = "sdcard";
- input-enable;
- bias-pull-up;
- };
- };
-
- sd_1bit_pins:sd_1bit_pins {
- mux {
- groups = "sdcard_d0",
- "sdcard_cmd",
- "sdcard_clk";
- function = "sdcard";
- input-enable;
- bias-pull-up;
- };
- };
-
- ao_to_sd_uart_pins:ao_to_sd_uart_pins {
- mux {
- groups = "uart_tx_ao_a_c4",
- "uart_rx_ao_a_c5";
- function = "uart_ao_a_ee";
- bias-pull-up;
- input-enable;
- };
- };
-
- emmc_clk_cmd_pins:emmc_clk_cmd_pins {
- mux {
- groups = "emmc_cmd",
- "emmc_clk";
- function = "emmc";
- input-enable;
- bias-pull-up;
- };
- };
-
-
- emmc_conf_pull_up:emmc_conf_pull_up {
- mux {
- groups = "emmc_nand_d07",
- "emmc_clk",
- "emmc_cmd";
- function = "emmc";
- input-enable;
- bias-pull-up;
- };
- };
-
- emmc_conf_pull_done:emmc_conf_pull_done {
- mux {
- groups = "emmc_ds";
- function = "emmc";
- input-enable;
- bias-pull-down;
- };
- };
-
- spifc_cs_pin:spifc_cs_pin {
- mux {
- groups = "nor_cs";
- function = "nor";
- bias-pull-up;
- };
- };
-
- spifc_pulldown: spifc_pulldown {
- mux {
- groups = "nor_d",
- "nor_q",
- "nor_c";
- function = "nor";
- bias-pull-down;
- };
- };
-
- spifc_pullup: spifc_pullup {
- mux {
- groups = "nor_cs";
- function = "nor";
- bias-pull-up;
- };
- };
-
- spifc_all_pins: spifc_all_pins {
- mux {
- groups = "nor_d",
- "nor_q",
- "nor_c";
- function = "nor";
- input-enable;
- bias-pull-down;
- };
- };
-
- sd_clk_cmd_pins:sd_clk_cmd_pins{
- mux {
- groups = "sdcard_cmd",
- "sdcard_clk";
- function = "sdcard";
- input-enable;
- bias-pull-up;
- };
- };
-
- sd_all_pins:sd_all_pins{
- mux {
- groups = "sdcard_d0",
- "sdcard_d1",
- "sdcard_d2",
- "sdcard_d3",
- "sdcard_cmd",
- "sdcard_clk";
- function = "sdcard";
- input-enable;
- bias-pull-up;
- };
- };
-
- hdmirx_a_mux:hdmirx_a_mux {
- mux {
- groups = "hdmirx_hpd_a", "hdmirx_det_a",
- "hdmirx_sda_a", "hdmirx_sck_a";
- function = "hdmirx_a";
- };
- };
-
- hdmirx_b_mux:hdmirx_b_mux {
- mux {
- groups = "hdmirx_hpd_b", "hdmirx_det_b",
- "hdmirx_sda_b", "hdmirx_sck_b";
- function = "hdmirx_b";
- };
- };
-
- hdmirx_c_mux:hdmirx_c_mux {
- mux {
- groups = "hdmirx_hpd_c", "hdmirx_det_c",
- "hdmirx_sda_c", "hdmirx_sck_c";
- function = "hdmirx_c";
- };
- };
-
- hdmirx_d_mux:hdmirx_d_mux {
- mux {
- groups = "hdmirx_hpd_d", "hdmirx_det_d",
- "hdmirx_sda_d", "hdmirx_sck_d";
- function = "hdmirx_d";
- };
- };
-
- i2c0_z_pins:i2c0_z {
- mux {
- groups = "i2c0_sda",
- "i2c0_sck";
- function = "i2c0";
- };
- };
-
- i2c1_dv_pins:i2c1_z {
- mux {
- groups = "i2c1_sda",
- "i2c1_sck";
- function = "i2c1";
- };
- };
-
- i2c2_h_pins:i2c2_h {
- mux {
- groups = "i2c2_sda",
- "i2c2_sck";
- function = "i2c2";
- };
- };
-
- i2c3_z_pins:i2c3_z {
- mux {
- groups = "i2c3_sda",
- "i2c3_sck";
- function = "i2c3";
- };
- };
-
- a_uart_pins:a_uart {
- mux {
- groups = "uart_tx_a",
- "uart_rx_a",
- "uart_cts_a",
- "uart_rts_a";
- function = "uart_a";
- };
- };
-
- b_uart_pins:b_uart {
- mux {
- groups = "uart_tx_b",
- "uart_rx_b";
- function = "uart_b";
- };
- };
-
- c_uart_pins:c_uart {
- mux {
- groups = "uart_tx_c",
- "uart_rx_c";
- function = "uart_c";
- };
- };
-
- lcd_vbyone_pins: lcd_vbyone_pin {
- mux {
- groups = "vx1_lockn","vx1_htpdn";
- function = "vbyone";
- };
- };
-
- atvdemod_agc_pins: atvdemod_agc_pins {
- mux {
- groups = "atv_if_agc";
- function = "atv";
- };
- };
-
- dtvdemod_agc_pins: dtvdemod_agc_pins {
- mux {
- groups = "dtv_if_agc";
- function = "dtv";
- };
- };
-
- spicc_pins: spicc {
- mux {
- groups = "spi_miso_a",
- "spi_mosi_a",
- "spi_clk_a";
- function = "spi_a";
- };
- };
-};
arm_pmu {
compatible = "arm,armv8-pmuv3";
- interrupts = <0 137 4>;
- reg = <0x0 0xff634400 0 0x1000>;
-
- /* addr = base + offset << 2 */
- sys_cpu_status0_offset = <0xa0>;
-
- sys_cpu_status0_pmuirq_mask = <0xf>;
-
+ /* clusterb-enabled; */
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x0 0xff634680 0x0 0x4>;
+ cpumasks = <0xf>;
/* default 10ms */
- relax_timer_ns = <10000000>;
-
+ relax-timer-ns = <10000000>;
/* default 10000us */
- max_wait_cnt = <10000>;
+ max-wait-cnt = <10000>;
};
gic: interrupt-controller@2c001000 {
#include <linux/threads.h>
#include <asm/irq.h>
-#ifdef CONFIG_AMLOGIC_MODIFY
-#define NR_IPI 7
-#else
#define NR_IPI 6
-#endif
typedef struct {
unsigned int __softirq_pending;
}
-#ifdef CONFIG_AMLOGIC_MODIFY
-
-extern void armv8pmu_handle_irq_ipi(void);
-
-struct amlpmu_fixup_cpuinfo {
- int irq_num;
-
- int fix_done;
-
- unsigned long irq_cnt;
- unsigned long empty_irq_cnt;
-
- unsigned long irq_time;
- unsigned long empty_irq_time;
-
- unsigned long last_irq_cnt;
- unsigned long last_empty_irq_cnt;
- unsigned long last_irq_time;
- unsigned long last_empty_irq_time;
-};
-
-struct amlpmu_fixup_context {
- struct amlpmu_fixup_cpuinfo __percpu *cpuinfo;
-
- /* struct arm_pmu */
- void *dev;
-
- /* sys_cpu_status0 reg */
- unsigned int *sys_cpu_status0;
-
- /*
- * In main pmu irq route wait for other cpu fix done may cause lockup,
- * when lockup we disable main irq for a while.
- * relax_timer will enable main irq again.
- */
- struct hrtimer relax_timer;
-
- /* dts prop */
- unsigned int sys_cpu_status0_offset;
- unsigned int sys_cpu_status0_pmuirq_mask;
- unsigned int relax_timer_ns;
- unsigned int max_wait_cnt;
-};
-#endif
#endif
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#ifdef CONFIG_AMLOGIC_MODIFY
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-#endif
-
#include <asm/irq_regs.h>
#include <asm/perf_event.h>
#include <asm/sysreg.h>
#include <linux/platform_device.h>
-#ifdef CONFIG_AMLOGIC_MODIFY
-#include <linux/of.h>
-#include <linux/of_irq.h>
-#include <linux/of_device.h>
-#include <linux/irq.h>
-#include <asm/irq.h>
-#include <linux/interrupt.h>
-#include <linux/irqdesc.h>
-#include <linux/of_address.h>
-#include <linux/delay.h>
-#endif
-
/*
* ARMv8 PMUv3 Performance Events handling code.
* Common event types (some are defined in asm/perf_event.h).
}
#ifdef CONFIG_AMLOGIC_MODIFY
-
-static struct amlpmu_fixup_context amlpmu_fixup_ctx;
-
-static enum hrtimer_restart amlpmu_relax_timer_func(struct hrtimer *timer)
-{
- struct amlpmu_fixup_cpuinfo *ci;
-
- ci = per_cpu_ptr(amlpmu_fixup_ctx.cpuinfo, 0);
-
- pr_alert("enable cpu0_irq %d again, irq cnt = %lu\n",
- ci->irq_num,
- ci->irq_cnt);
- enable_irq(ci->irq_num);
-
- return HRTIMER_NORESTART;
-}
-
-
-static void amlpmu_relax_timer_start(int other_cpu)
-{
- struct amlpmu_fixup_cpuinfo *ci;
- int cpu;
-
- cpu = smp_processor_id();
- WARN_ON(cpu != 0);
-
- ci = per_cpu_ptr(amlpmu_fixup_ctx.cpuinfo, 0);
-
- pr_alert("wait cpu %d fixup done timeout, main cpu irq cnt = %lu\n",
- other_cpu,
- ci->irq_cnt);
-
- if (hrtimer_active(&amlpmu_fixup_ctx.relax_timer)) {
- pr_alert("relax_timer already active, return!\n");
- return;
- }
-
- disable_irq_nosync(ci->irq_num);
-
- hrtimer_start(&amlpmu_fixup_ctx.relax_timer,
- ns_to_ktime(amlpmu_fixup_ctx.relax_timer_ns),
- HRTIMER_MODE_REL);
-}
+#include <linux/perf/arm_pmu.h>
static irqreturn_t armv8pmu_handle_irq(int irq_num, void *dev);
-void armv8pmu_handle_irq_ipi(void)
+void amlpmu_handle_irq_ipi(void *arg)
{
- int cpu = smp_processor_id();
-
- WARN_ON(cpu == 0);
- WARN_ON(!amlpmu_fixup_ctx.dev);
-
- armv8pmu_handle_irq(-1, amlpmu_fixup_ctx.dev);
-}
-
-static int aml_pmu_fix(void)
-{
- int i;
- int cpu;
- int pmuirq_val;
- struct amlpmu_fixup_cpuinfo *ci;
-
- int max_wait_cnt = amlpmu_fixup_ctx.max_wait_cnt;
-
- pmuirq_val = readl(amlpmu_fixup_ctx.sys_cpu_status0);
- pmuirq_val &= amlpmu_fixup_ctx.sys_cpu_status0_pmuirq_mask;
-
- for (cpu = 0; cpu < num_possible_cpus(); cpu++) {
- if (pmuirq_val & (1<<cpu)) {
- if (cpu == 0) {
- pr_debug("cpu0 shouldn't fix pmuirq = 0x%x\n",
- pmuirq_val);
- } else {
- pr_debug("fix pmu irq cpu %d, pmuirq = 0x%x\n",
- cpu,
- pmuirq_val);
-
- ci = per_cpu_ptr(amlpmu_fixup_ctx.cpuinfo,
- cpu);
-
- ci->fix_done = 0;
-
- /* aml pmu IPI will set fix_done to 1 */
- mb();
-
- smp_send_aml_pmu(cpu);
-
- for (i = 0; i < max_wait_cnt; i++) {
- if (READ_ONCE(ci->fix_done))
- break;
-
- udelay(1);
- }
-
- if (i == amlpmu_fixup_ctx.max_wait_cnt)
- amlpmu_relax_timer_start(cpu);
-
- return 0;
- }
- }
- }
-
- return 1;
-}
-
-static void aml_pmu_fix_stat_account(int is_empty_irq)
-{
- int freq;
- unsigned long time = jiffies;
- struct amlpmu_fixup_cpuinfo *ci;
-
- ci = this_cpu_ptr(amlpmu_fixup_ctx.cpuinfo);
-
- ci->irq_cnt++;
- ci->irq_time = time;
- if (!ci->last_irq_cnt) {
- ci->last_irq_cnt = ci->irq_cnt;
- ci->last_irq_time = ci->irq_time;
- }
-
- if (is_empty_irq) {
- ci->empty_irq_cnt++;
- ci->empty_irq_time = time;
- if (!ci->last_empty_irq_cnt) {
- ci->last_empty_irq_cnt = ci->empty_irq_cnt;
- ci->last_empty_irq_time = ci->empty_irq_time;
- }
- }
-
- if (time_after(ci->irq_time, ci->last_irq_time + HZ)) {
- freq = ci->irq_cnt - ci->last_irq_cnt;
- freq = freq * HZ / (ci->irq_time - ci->last_irq_time);
- pr_debug("irq_cnt = %lu, irq_last_cnt = %lu, freq = %d\n",
- ci->irq_cnt,
- ci->last_irq_cnt,
- freq);
-
- ci->last_irq_cnt = ci->irq_cnt;
- ci->last_irq_time = ci->irq_time;
- }
-
- if (is_empty_irq &&
- time_after(ci->empty_irq_time, ci->last_empty_irq_time + HZ)) {
-
- freq = ci->empty_irq_cnt - ci->last_empty_irq_cnt;
- freq *= HZ;
- freq /= (ci->empty_irq_time - ci->last_empty_irq_time);
- pr_debug("empty_irq_cnt = %lu, freq = %d\n",
- ci->empty_irq_cnt,
- freq);
-
- ci->last_empty_irq_cnt = ci->empty_irq_cnt;
- ci->last_empty_irq_time = ci->empty_irq_time;
- }
+ armv8pmu_handle_irq(-1, amlpmu_ctx.pmu);
}
#endif
struct pt_regs *regs;
int idx;
-#ifdef CONFIG_AMLOGIC_MODIFY
- int cpu;
- int is_empty_irq = 0;
- struct amlpmu_fixup_cpuinfo *ci;
-
- ci = this_cpu_ptr(amlpmu_fixup_ctx.cpuinfo);
- ci->irq_num = irq_num;
- amlpmu_fixup_ctx.dev = dev;
- cpu = smp_processor_id();
-#endif
-
/*
* Get and reset the IRQ flags
*/
pmovsr = armv8pmu_getreset_flags();
#ifdef CONFIG_AMLOGIC_MODIFY
- ci->fix_done = 1;
-#endif
+ /* amlpmu have routed the interrupt already, so return IRQ_HANDLED */
+ if (amlpmu_handle_irq(cpu_pmu,
+ irq_num,
+ armv8pmu_has_overflowed(pmovsr)))
+ return IRQ_HANDLED;
+#else
/*
* Did an overflow occur?
*/
-#ifdef CONFIG_AMLOGIC_MODIFY
- if (!armv8pmu_has_overflowed(pmovsr)) {
- is_empty_irq = 1;
-
- if (cpu == 0)
- is_empty_irq = aml_pmu_fix();
- }
-
- aml_pmu_fix_stat_account(is_empty_irq);
-
- /* txlx have some empty pmu irqs, so return IRQ_HANDLED */
- if (is_empty_irq)
- return IRQ_HANDLED;
-#else
if (!armv8pmu_has_overflowed(pmovsr))
return IRQ_NONE;
#endif
return IRQ_HANDLED;
}
-
-
-
static void armv8pmu_start(struct arm_pmu *cpu_pmu)
{
unsigned long flags;
};
-#ifdef CONFIG_AMLOGIC_MODIFY
-static int amlpmu_fixup_init(struct platform_device *pdev)
-{
- int ret;
- void __iomem *base;
-
- amlpmu_fixup_ctx.cpuinfo = __alloc_percpu(
- sizeof(struct amlpmu_fixup_cpuinfo), 2 * sizeof(void *));
- if (!amlpmu_fixup_ctx.cpuinfo) {
- pr_err("alloc percpu failed\n");
- return -ENOMEM;
- }
-
- base = of_iomap(pdev->dev.of_node, 0);
- if (IS_ERR(base)) {
- pr_err("of_iomap() failed, base = %p\n", base);
- return PTR_ERR(base);
- }
-
- ret = of_property_read_u32(pdev->dev.of_node,
- "sys_cpu_status0_offset",
- &amlpmu_fixup_ctx.sys_cpu_status0_offset);
- if (ret) {
- pr_err("read sys_cpu_status0_offset failed, ret = %d\n", ret);
- return 1;
- }
- pr_debug("sys_cpu_status0_offset = 0x%0x\n",
- amlpmu_fixup_ctx.sys_cpu_status0_offset);
-
- ret = of_property_read_u32(pdev->dev.of_node,
- "sys_cpu_status0_pmuirq_mask",
- &amlpmu_fixup_ctx.sys_cpu_status0_pmuirq_mask);
- if (ret) {
- pr_err("read sys_cpu_status0_pmuirq_mask failed, ret = %d\n",
- ret);
- return 1;
- }
- pr_debug("sys_cpu_status0_pmuirq_mask = 0x%0x\n",
- amlpmu_fixup_ctx.sys_cpu_status0_pmuirq_mask);
-
-
- ret = of_property_read_u32(pdev->dev.of_node,
- "relax_timer_ns",
- &amlpmu_fixup_ctx.relax_timer_ns);
- if (ret) {
- pr_err("read prop relax_timer_ns failed, ret = %d\n", ret);
- return 1;
- }
- pr_debug("relax_timer_ns = %u\n", amlpmu_fixup_ctx.relax_timer_ns);
-
-
- ret = of_property_read_u32(pdev->dev.of_node,
- "max_wait_cnt",
- &amlpmu_fixup_ctx.max_wait_cnt);
- if (ret) {
- pr_err("read prop max_wait_cnt failed, ret = %d\n", ret);
- return 1;
- }
- pr_debug("max_wait_cnt = %u\n", amlpmu_fixup_ctx.max_wait_cnt);
-
-
- base += (amlpmu_fixup_ctx.sys_cpu_status0_offset << 2);
- amlpmu_fixup_ctx.sys_cpu_status0 = base;
- pr_debug("sys_cpu_status0 = %p\n", amlpmu_fixup_ctx.sys_cpu_status0);
-
-
- hrtimer_init(&amlpmu_fixup_ctx.relax_timer,
- CLOCK_MONOTONIC,
- HRTIMER_MODE_REL);
- amlpmu_fixup_ctx.relax_timer.function = amlpmu_relax_timer_func;
-
- return 0;
-}
-#endif
-
static int armv8_pmu_device_probe(struct platform_device *pdev)
{
-#ifdef CONFIG_AMLOGIC_MODIFY
- if (amlpmu_fixup_init(pdev))
- return 1;
-#endif
if (acpi_disabled)
return arm_pmu_device_probe(pdev, armv8_pmu_of_device_ids,
NULL);
#include <asm/ptrace.h>
#include <asm/virt.h>
-#ifdef CONFIG_AMLOGIC_MODIFY
-#include <asm/perf_event.h>
-#endif
-
#ifdef CONFIG_AMLOGIC_VMAP
#include <linux/amlogic/vmap_stack.h>
#endif
IPI_CPU_STOP,
IPI_TIMER,
IPI_IRQ_WORK,
-#ifdef CONFIG_AMLOGIC_MODIFY
- IPI_WAKEUP,
- IPI_AML_PMU
-#else
IPI_WAKEUP
-#endif
};
#ifdef CONFIG_ARM64_VHE
S(IPI_TIMER, "Timer broadcast interrupts"),
S(IPI_IRQ_WORK, "IRQ work interrupts"),
S(IPI_WAKEUP, "CPU wake-up interrupts"),
-#ifdef CONFIG_AMLOGIC_MODIFY
- S(IPI_AML_PMU, "AML pmu cross interrupts"),
-#endif
};
static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
__smp_cross_call(target, ipinr);
}
-#ifdef CONFIG_AMLOGIC_MODIFY
-void smp_send_aml_pmu(int cpu)
-{
- smp_cross_call(cpumask_of(cpu), IPI_AML_PMU);
-}
-#endif
-
void show_ipi_list(struct seq_file *p, int prec)
{
unsigned int cpu, i;
break;
#endif
-#ifdef CONFIG_AMLOGIC_MODIFY
- case IPI_AML_PMU:
- armv8pmu_handle_irq_ipi();
- break;
-#endif
-
default:
pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
break;
return 0;
}
+
+#ifdef CONFIG_AMLOGIC_MODIFY
+#include <linux/of_address.h>
+#include <linux/delay.h>
+
+struct amlpmu_context amlpmu_ctx;
+
+static enum hrtimer_restart amlpmu_relax_timer_func(struct hrtimer *timer)
+{
+ struct amlpmu_context *ctx = &amlpmu_ctx;
+ struct amlpmu_cpuinfo *ci;
+
+ ci = per_cpu_ptr(ctx->cpuinfo, 0);
+
+ pr_info("enable cpu0_irq %d again, irq cnt = %lu\n",
+ ci->irq_num,
+ ci->valid_irq_cnt);
+ enable_irq(ci->irq_num);
+
+ return HRTIMER_NORESTART;
+}
+
+void amlpmu_relax_timer_start(int other_cpu)
+{
+ struct amlpmu_cpuinfo *ci;
+ int cpu;
+ struct amlpmu_context *ctx = &amlpmu_ctx;
+
+ cpu = smp_processor_id();
+ WARN_ON(cpu != 0);
+
+ ci = per_cpu_ptr(ctx->cpuinfo, 0);
+
+ pr_warn("wait cpu %d fixup done timeout, main cpu irq cnt = %lu\n",
+ other_cpu,
+ ci->valid_irq_cnt);
+
+ if (hrtimer_active(&ctx->relax_timer)) {
+ pr_alert("relax_timer already active, return!\n");
+ return;
+ }
+
+ disable_irq_nosync(ci->irq_num);
+
+ hrtimer_start(&ctx->relax_timer,
+ ns_to_ktime(ctx->relax_timer_ns),
+ HRTIMER_MODE_REL);
+}
+
+static void amlpmu_fix_setup_affinity(int irq)
+{
+ int cluster_index = 0;
+ int cpu;
+ int affinity_cpu = -1;
+ struct amlpmu_cpuinfo *ci = NULL;
+ struct amlpmu_context *ctx = &amlpmu_ctx;
+ s64 latest_next_stamp = S64_MAX;
+
+ if (irq == ctx->irqs[0])
+ cluster_index = 0;
+ else if (ctx->clusterb_enabled && irq ==
+ ctx->irqs[1])
+ cluster_index = 1;
+ else {
+ pr_err("amlpmu_fix_setup_affinity() bad irq = %d\n", irq);
+ return;
+ }
+
+ /*
+ * find latest next_predicted_stamp cpu for affinity cpu
+ * if no cpu have predict time, select first cpu of cpumask
+ * todo:
+ * - if a cpu predict failed for continuous N times,
+ * try add some punishment.
+ * - if no cpu have predicted time, try recently most used cpu
+ * for affinity
+ * - try to keep and promote prediction accuracy
+ */
+ for_each_cpu_and(cpu,
+ &ctx->cpumasks[cluster_index],
+ cpu_possible_mask) {
+ ci = per_cpu_ptr(ctx->cpuinfo, cpu);
+ //pr_info("cpu = %d, ci->next_predicted_stamp.tv64 = %lld\n",
+ // cpu, ci->next_predicted_stamp.tv64);
+ if (ci->next_predicted_stamp.tv64 &&
+ ci->next_predicted_stamp.tv64 < latest_next_stamp) {
+ latest_next_stamp = ci->next_predicted_stamp.tv64;
+ affinity_cpu = cpu;
+ }
+ }
+
+ if (affinity_cpu == -1) {
+ affinity_cpu = cpumask_first(&ctx->cpumasks[cluster_index]);
+ pr_debug("used first cpu: %d, cluster: 0x%lx\n",
+ affinity_cpu,
+ *cpumask_bits(&ctx->cpumasks[cluster_index]));
+ } else
+ pr_debug("find affinity cpu: %d, next_predicted_stamp: %lld\n",
+ affinity_cpu,
+ latest_next_stamp);
+
+ if (irq_set_affinity(irq, cpumask_of(affinity_cpu)))
+ pr_err("irq_set_affinity() failed irq: %d, affinity_cpu: %d\n",
+ irq,
+ affinity_cpu);
+}
+
+/*
+ * on pmu interrupt generated cpu, @irq_num is valid
+ * on other cpus(called by AML_PMU_IPI), @irq_num is -1
+ */
+static int amlpmu_irq_fix(int irq_num)
+{
+ int i;
+ int cpu;
+ int cur_cpu;
+ int pmuirq_val;
+ int cluster_index = 0;
+ int fix_success = 0;
+ struct amlpmu_cpuinfo *ci;
+ struct amlpmu_context *ctx = &amlpmu_ctx;
+ struct call_single_data csd_stack;
+ int max_wait_cnt = ctx->max_wait_cnt;
+
+ csd_stack.func = amlpmu_handle_irq_ipi;
+ csd_stack.info = NULL;
+
+ cur_cpu = smp_processor_id();
+
+ if (irq_num == ctx->irqs[0])
+ cluster_index = 0;
+ else if (ctx->clusterb_enabled && irq_num == ctx->irqs[1])
+ cluster_index = 1;
+ else {
+ pr_err("amlpmu_irq_fix() bad irq = %d\n", irq_num);
+ return fix_success;
+ }
+
+ if (!cpumask_test_cpu(cur_cpu, &ctx->cpumasks[cluster_index])) {
+ pr_warn("amlpmu_irq_fix() cur_cpu %d not in cluster: 0x%lx\n",
+ cur_cpu,
+ *cpumask_bits(&ctx->cpumasks[cluster_index]));
+ }
+
+ pmuirq_val = readl(ctx->regs[cluster_index]);
+ pmuirq_val &= 0xf;
+ pmuirq_val <<= ctx->first_cpus[cluster_index];
+
+ pr_debug("amlpmu_irq_fix() val=0x%0x, first_cpu=%d, cluster=0x%lx\n",
+ readl(ctx->regs[cluster_index]),
+ ctx->first_cpus[cluster_index],
+ *cpumask_bits(&ctx->cpumasks[cluster_index]));
+
+ for_each_cpu_and(cpu,
+ &ctx->cpumasks[cluster_index],
+ cpu_possible_mask) {
+ if (pmuirq_val & (1<<cpu)) {
+ if (cpu == cur_cpu) {
+ pr_info("ownercpu %d in pmuirq = 0x%x\n",
+ cur_cpu, pmuirq_val);
+ continue;
+ }
+ pr_debug("fix pmu irq cpu %d, pmuirq = 0x%x\n",
+ cpu,
+ pmuirq_val);
+
+ ci = per_cpu_ptr(ctx->cpuinfo, cpu);
+ WRITE_ONCE(ci->fix_done, 0);
+ WRITE_ONCE(ci->fix_overflowed, 0);
+
+ csd_stack.flags = 0;
+ smp_call_function_single_async(cpu, &csd_stack);
+
+ for (i = 0; i < max_wait_cnt; i++) {
+ if (READ_ONCE(ci->fix_done))
+ break;
+
+ udelay(1);
+ }
+
+ if (i == ctx->max_wait_cnt) {
+ pr_err("wait for cpu %d done timeout\n",
+ cpu);
+ //amlpmu_relax_timer_start(cpu);
+ }
+
+ if (READ_ONCE(ci->fix_overflowed))
+ fix_success++;
+ }
+ }
+
+ return fix_success;
+}
+
+static void amlpmu_update_stats(int irq_num,
+ int has_overflowed,
+ int fix_success)
+{
+ int freq;
+ int i;
+ ktime_t stamp;
+ unsigned long time = jiffies;
+ struct amlpmu_cpuinfo *ci;
+ struct amlpmu_context *ctx = &amlpmu_ctx;
+
+ ci = this_cpu_ptr(ctx->cpuinfo);
+
+ if (!has_overflowed && !fix_success) {
+ pr_debug("empty_irq_cnt: %lu\n", ci->empty_irq_cnt);
+ ci->empty_irq_cnt++;
+ ci->empty_irq_time = time;
+ }
+
+ if (fix_success) {
+ /* send IPI success */
+ pr_debug("fix_irq_cnt: %lu, fix_success = %d\n",
+ ci->fix_irq_cnt,
+ fix_success);
+ ci->fix_irq_cnt++;
+ ci->fix_irq_time = time;
+ }
+
+ if (has_overflowed) {
+ ci->valid_irq_cnt++;
+ ci->valid_irq_time = time;
+
+ stamp = ktime_get();
+ ci->stamp_deltas[ci->valid_irq_cnt % MAX_DELTA_CNT] =
+ stamp.tv64 - ci->last_stamp.tv64;
+ ci->last_stamp = stamp;
+
+ /* update avg_delta if it's valid */
+ ci->avg_delta = 0;
+ for (i = 0; i < MAX_DELTA_CNT; i++)
+ ci->avg_delta += ci->stamp_deltas[i];
+
+ ci->avg_delta /= MAX_DELTA_CNT;
+ for (i = 0; i < MAX_DELTA_CNT; i++) {
+ if (ci->stamp_deltas[i] > ci->avg_delta * 3/2 ||
+ ci->stamp_deltas[i] < ci->avg_delta / 2) {
+ ci->avg_delta = 0;
+ break;
+ }
+ }
+ if (ci->avg_delta)
+ ci->next_predicted_stamp.tv64 =
+ ci->last_stamp.tv64 + ci->avg_delta;
+ else
+ ci->next_predicted_stamp.tv64 = 0;
+
+ pr_debug("irq_num = %d, valid_irq_cnt = %lu\n",
+ irq_num,
+ ci->valid_irq_cnt);
+ pr_debug("cur_delta = %lld, avg_delta = %lld, next = %lld\n",
+ ci->stamp_deltas[ci->valid_irq_cnt % MAX_DELTA_CNT],
+ ci->avg_delta,
+ ci->next_predicted_stamp.tv64);
+ }
+
+ if (time_after(ci->valid_irq_time, ci->last_valid_irq_time + 2*HZ)) {
+ freq = ci->empty_irq_cnt - ci->last_empty_irq_cnt;
+ freq *= HZ;
+ freq /= (ci->empty_irq_time - ci->last_empty_irq_time);
+ pr_info("######## empty_irq_cnt: %lu - %lu = %lu, freq = %d\n",
+ ci->empty_irq_cnt,
+ ci->last_empty_irq_cnt,
+ ci->empty_irq_cnt - ci->last_empty_irq_cnt,
+ freq);
+
+ ci->last_empty_irq_cnt = ci->empty_irq_cnt;
+ ci->last_empty_irq_time = ci->empty_irq_time;
+
+
+ freq = ci->fix_irq_cnt - ci->last_fix_irq_cnt;
+ freq *= HZ;
+ freq /= (ci->fix_irq_time - ci->last_fix_irq_time);
+ pr_info("######## fix_irq_cnt: %lu - %lu = %lu, freq = %d\n",
+ ci->fix_irq_cnt,
+ ci->last_fix_irq_cnt,
+ ci->fix_irq_cnt - ci->last_fix_irq_cnt,
+ freq);
+
+ ci->last_fix_irq_cnt = ci->fix_irq_cnt;
+ ci->last_fix_irq_time = ci->fix_irq_time;
+
+
+ freq = ci->valid_irq_cnt - ci->last_valid_irq_cnt;
+ freq *= HZ;
+ freq /= (ci->valid_irq_time - ci->last_valid_irq_time);
+ pr_info("######## valid_irq_cnt: %lu - %lu = %lu, freq = %d\n",
+ ci->valid_irq_cnt,
+ ci->last_valid_irq_cnt,
+ ci->valid_irq_cnt - ci->last_valid_irq_cnt,
+ freq);
+
+ ci->last_valid_irq_cnt = ci->valid_irq_cnt;
+ ci->last_valid_irq_time = ci->valid_irq_time;
+ }
+}
+
+int amlpmu_handle_irq(struct arm_pmu *cpu_pmu, int irq_num, int has_overflowed)
+{
+ int cpu;
+ int fix_success = 0;
+ struct amlpmu_cpuinfo *ci;
+ struct amlpmu_context *ctx = &amlpmu_ctx;
+
+ ci = this_cpu_ptr(ctx->cpuinfo);
+ ci->irq_num = irq_num;
+ cpu = smp_processor_id();
+
+ pr_debug("amlpmu_handle_irq() irq_num = %d, overflowed = %d\n",
+ irq_num, has_overflowed);
+
+ /*
+ * if current cpu is not overflowed, it's possible some other
+ * cpus caused the pmu interrupt.
+ * so if current cpu is interrupt generated cpu(irq_num != -1),
+ * call aml_pmu_fix() try to send IPI to other cpus and waiting
+ * for fix_done.
+ */
+ if (!has_overflowed && irq_num != -1)
+ fix_success = amlpmu_irq_fix(irq_num);
+
+ /*
+ * valid_irq, fix_irq and empty_irq status
+ * avg_delta time account to predict next interrupt time
+ */
+ amlpmu_update_stats(irq_num, has_overflowed, fix_success);
+
+ /*
+ * armv*pmu_getreset_flags() will clear interrupt. If current
+ * interrupt is IPI fix(irq_num = -1), interrupt generated cpu
+ * now is waiting for ci->fix_done=1(clear interrupt).
+ * we must set ci->fix_done to 1 after amlpmu_stat_account(),
+ * because interrupt generated cpu need this predict time info
+ * to setup interrupt affinity.
+ */
+ if (irq_num == -1) {
+ WRITE_ONCE(ci->fix_overflowed, has_overflowed);
+ /* fix_overflowed must before fix_done */
+ mb();
+ WRITE_ONCE(ci->fix_done, 1);
+ }
+
+ /* only interrupt generated cpu need setup affinity */
+ if (irq_num != -1)
+ amlpmu_fix_setup_affinity(irq_num);
+
+ /*
+ * when a pmu interrupt generated, if current cpu is not
+ * overflowed and some other cpus succeed in handling the
+ * interrupt by IPIs return true.
+ */
+ return !has_overflowed && fix_success;
+}
+
+static int amlpmu_init(struct platform_device *pdev, struct arm_pmu *pmu)
+{
+ int cpu;
+ int ret = 0;
+ int irq;
+ u32 cpumasks[MAX_CLUSTER_NR] = {0};
+ struct amlpmu_context *ctx = &amlpmu_ctx;
+ struct amlpmu_cpuinfo *ci;
+
+ memset(ctx, 0, sizeof(*ctx));
+
+ ctx->cpuinfo = __alloc_percpu_gfp(
+ sizeof(struct amlpmu_cpuinfo),
+ SMP_CACHE_BYTES,
+ GFP_KERNEL | __GFP_ZERO);
+ if (!ctx->cpuinfo) {
+ pr_err("alloc percpu failed\n");
+ ret = -ENOMEM;
+ goto free;
+ }
+
+ for_each_possible_cpu(cpu) {
+ ci = per_cpu_ptr(ctx->cpuinfo, cpu);
+ ci->last_valid_irq_time = INITIAL_JIFFIES;
+ ci->last_fix_irq_time = INITIAL_JIFFIES;
+ ci->last_empty_irq_time = INITIAL_JIFFIES;
+ }
+
+ ctx->pmu = pmu;
+
+ if (of_property_read_bool(pdev->dev.of_node, "clusterb-enabled"))
+ ctx->clusterb_enabled = 1;
+
+ pr_info("clusterb_enabled = %d\n", ctx->clusterb_enabled);
+
+ ret = of_property_read_u32_array(pdev->dev.of_node,
+ "cpumasks",
+ cpumasks,
+ ctx->clusterb_enabled ? MAX_CLUSTER_NR : 1);
+ if (ret) {
+ pr_err("read prop cpumasks failed, ret = %d\n", ret);
+ ret = -EINVAL;
+ goto free;
+ }
+ pr_info("cpumasks 0x%0x, 0x%0x\n", cpumasks[0], cpumasks[1]);
+
+ ret = of_property_read_u32(pdev->dev.of_node,
+ "relax-timer-ns",
+ &ctx->relax_timer_ns);
+ if (ret) {
+ pr_err("read prop relax-timer-ns failed, ret = %d\n", ret);
+ ret = -EINVAL;
+ goto free;
+ }
+
+ ret = of_property_read_u32(pdev->dev.of_node,
+ "max-wait-cnt",
+ &ctx->max_wait_cnt);
+ if (ret) {
+ pr_err("read prop max-wait-cnt failed, ret = %d\n", ret);
+ ret = -EINVAL;
+ goto free;
+ }
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ pr_err("get clusterA irq failed, %d\n", irq);
+ ret = -EINVAL;
+ goto free;
+ }
+ ctx->irqs[0] = irq;
+ pr_info("cluster A irq = %d\n", irq);
+
+ ctx->regs[0] = of_iomap(pdev->dev.of_node, 0);
+ if (IS_ERR(ctx->regs[0])) {
+ pr_err("of_iomap() clusterA failed, base = %p\n", ctx->regs[0]);
+ ret = PTR_ERR(ctx->regs[0]);
+ goto free;
+ }
+
+ cpumask_clear(&ctx->cpumasks[0]);
+ memcpy(cpumask_bits(&ctx->cpumasks[0]),
+ &cpumasks[0],
+ sizeof(cpumasks[0]));
+ if (!cpumask_intersects(&ctx->cpumasks[0], cpu_possible_mask)) {
+ pr_err("bad cpumasks[0] 0x%x\n", cpumasks[0]);
+ ret = -EINVAL;
+ goto free;
+ }
+ ctx->first_cpus[0] = cpumask_first(&ctx->cpumasks[0]);
+
+ amlpmu_fix_setup_affinity(ctx->irqs[0]);
+
+ hrtimer_init(&ctx->relax_timer,
+ CLOCK_MONOTONIC,
+ HRTIMER_MODE_REL);
+ ctx->relax_timer.function = amlpmu_relax_timer_func;
+
+ if (!ctx->clusterb_enabled)
+ return 0;
+
+ irq = platform_get_irq(pdev, 1);
+ if (irq < 0) {
+ pr_err("get clusterB irq failed, %d\n", irq);
+ ret = -EINVAL;
+ goto free;
+ }
+ ctx->irqs[1] = irq;
+ pr_info("cluster B irq = %d\n", irq);
+
+
+ ctx->regs[1] = of_iomap(pdev->dev.of_node, 1);
+ if (IS_ERR(ctx->regs[1])) {
+ pr_err("of_iomap() clusterA failed, base = %p\n", ctx->regs[1]);
+ ret = PTR_ERR(ctx->regs[1]);
+ goto free;
+ }
+
+ cpumask_clear(&ctx->cpumasks[1]);
+ memcpy(cpumask_bits(&ctx->cpumasks[1]),
+ &cpumasks[1],
+ sizeof(cpumasks[1]));
+ if (!cpumask_intersects(&ctx->cpumasks[1], cpu_possible_mask)) {
+ pr_err("bad cpumasks[1] 0x%x\n", cpumasks[1]);
+ ret = -EINVAL;
+ goto free;
+ } else if (cpumask_intersects(&ctx->cpumasks[0], &ctx->cpumasks[1])) {
+ pr_err("cpumasks intersect 0x%x : 0x%x\n",
+ cpumasks[0],
+ cpumasks[1]);
+ ret = -EINVAL;
+ goto free;
+ }
+ ctx->first_cpus[1] = cpumask_first(&ctx->cpumasks[1]);
+
+ amlpmu_fix_setup_affinity(ctx->irqs[1]);
+
+ return 0;
+
+free:
+ if (ctx->cpuinfo)
+ free_percpu(ctx->cpuinfo);
+
+ if (ctx->regs[0])
+ iounmap(ctx->regs[0]);
+
+ if (ctx->regs[1])
+ iounmap(ctx->regs[1]);
+
+ return ret;
+}
+
+#endif
+
int arm_pmu_device_probe(struct platform_device *pdev,
const struct of_device_id *of_table,
const struct pmu_probe_info *probe_table)
return -ENOMEM;
}
+#ifdef CONFIG_AMLOGIC_MODIFY
+ if (amlpmu_init(pdev, pmu)) {
+ pr_err("amlpmu_init() failed\n");
+ return 1;
+ }
+#endif
+
armpmu_init(pmu);
pmu->plat_device = pdev;
#define ARMV8_PMU_PDEV_NAME "armv8-pmu"
+#ifdef CONFIG_AMLOGIC_MODIFY
+#define MAX_DELTA_CNT 4
+struct amlpmu_cpuinfo {
+ int irq_num;
+
+ /*
+ * In interrupt generated cpu(affinity cpu)
+ * If pmu no overflowed, then we need to send IPI to some other cpus to
+ * fix it. And before send IPI, set corresponding cpu's fix_done and
+ * fix_overflowed to zero, in corresponding cpu's IPI interrupt will set
+ * fix_done to inform source cpu and if indeed pmu overflowed then also
+ * set fix_overflowed to 1, then inerrupt generated cpu can feel that.
+ */
+ int fix_done;
+ int fix_overflowed;
+
+ /* for interrupt affinity prediction */
+ ktime_t last_stamp;
+ s64 stamp_deltas[MAX_DELTA_CNT];
+ s64 avg_delta;
+ ktime_t next_predicted_stamp;
+
+ /*
+ * irq state account of this cpu
+ *
+ * - valid_irq_cnt:
+ * valid irq cnt.(pmu overflow happened)
+ * - fix_irq_cnt:
+ * when this cpu is pmu interrupt generated affinity cpu, a pmu
+ * interrupt if cpu affinity predict failed so no pmu overflow
+ * happened and succeeded send IPI to other cpu, then it's a send
+ * fix irq. So the lower is better.
+ * - empty_irq_cnt:
+ * when this cpu is pmu interrupt generated affinity cpu, a pmu
+ * interrupt that no overflow happened and also no fix IPI sended to
+ * other cpus, then it's a empty irq.
+ * when this cpu is not affinity cpu, a IPI interrupt(pmu fix from
+ * affinity cpu) that no pmu overflow happened, it's a empty irq.
+ *
+ * attention:
+ * A interrupt can be a valid_irq and also a fix_irq.
+ */
+ unsigned long valid_irq_cnt;
+ unsigned long fix_irq_cnt;
+ unsigned long empty_irq_cnt;
+
+ unsigned long valid_irq_time;
+ unsigned long fix_irq_time;
+ unsigned long empty_irq_time;
+
+ unsigned long last_valid_irq_cnt;
+ unsigned long last_fix_irq_cnt;
+ unsigned long last_empty_irq_cnt;
+
+ unsigned long last_valid_irq_time;
+ unsigned long last_fix_irq_time;
+ unsigned long last_empty_irq_time;
+};
+
+
+#define MAX_CLUSTER_NR 2
+struct amlpmu_context {
+ struct amlpmu_cpuinfo __percpu *cpuinfo;
+
+ /* struct arm_pmu */
+ struct arm_pmu *pmu;
+
+ int clusterb_enabled;
+
+ unsigned int __iomem *regs[MAX_CLUSTER_NR];
+ int irqs[MAX_CLUSTER_NR];
+ struct cpumask cpumasks[MAX_CLUSTER_NR];
+ int first_cpus[MAX_CLUSTER_NR];
+
+ /*
+ * In main pmu irq route wait for other cpu fix done may cause lockup,
+ * when lockup we disable main irq for a while.
+ * relax_timer will enable main irq again.
+ */
+ struct hrtimer relax_timer;
+
+ unsigned int relax_timer_ns;
+ unsigned int max_wait_cnt;
+};
+
+extern struct amlpmu_context amlpmu_ctx;
+
+int amlpmu_handle_irq(struct arm_pmu *cpu_pmu, int irq_num, int has_overflowed);
+
+/* defined int arch/arm(64)/kernel/perf_event(_v7).c */
+void amlpmu_handle_irq_ipi(void *arg);
+#endif
+
#endif /* CONFIG_ARM_PMU */
#endif /* __ARM_PMU_H__ */
*/
extern void smp_send_reschedule(int cpu);
-#ifdef CONFIG_AMLOGIC_MODIFY
-/*
- * sends a 'aml pmu' event to another CPU:
- */
-extern void smp_send_aml_pmu(int cpu);
-#endif
-
/*
* Prepare machine for booting other CPUs.
*/
projects / platform / kernel / linux-amlogic.git / commitdiff