clocksource/drivers/timer-ti-dm: Move private defines to the driver

These defines are only used by timer-ti-dm driver.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Link: https://lore.kernel.org/r/20220815131250.34603-6-tony@atomide.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c
index fe8ba0f..e82ec56 100644 (file)
--- a/drivers/clocksource/timer-ti-dm.c
+++ b/drivers/clocksource/timer-ti-dm.c
@@ -33,6 +33,68 @@
 
 #include <clocksource/timer-ti-dm.h>
 
+/*
+ * timer errata flags
+ *
+ * Errata i103/i767 impacts all OMAP3/4/5 devices including AM33xx. This
+ * errata prevents us from using posted mode on these devices, unless the
+ * timer counter register is never read. For more details please refer to
+ * the OMAP3/4/5 errata documents.
+ */
+#define OMAP_TIMER_ERRATA_I103_I767                    0x80000000
+
+/* posted mode types */
+#define OMAP_TIMER_NONPOSTED                   0x00
+#define OMAP_TIMER_POSTED                      0x01
+
+/* register offsets with the write pending bit encoded */
+#define        WPSHIFT                                 16
+
+#define OMAP_TIMER_WAKEUP_EN_REG               (_OMAP_TIMER_WAKEUP_EN_OFFSET \
+                                                       | (WP_NONE << WPSHIFT))
+
+#define OMAP_TIMER_CTRL_REG                    (_OMAP_TIMER_CTRL_OFFSET \
+                                                       | (WP_TCLR << WPSHIFT))
+
+#define OMAP_TIMER_COUNTER_REG                 (_OMAP_TIMER_COUNTER_OFFSET \
+                                                       | (WP_TCRR << WPSHIFT))
+
+#define OMAP_TIMER_LOAD_REG                    (_OMAP_TIMER_LOAD_OFFSET \
+                                                       | (WP_TLDR << WPSHIFT))
+
+#define OMAP_TIMER_TRIGGER_REG                 (_OMAP_TIMER_TRIGGER_OFFSET \
+                                                       | (WP_TTGR << WPSHIFT))
+
+#define OMAP_TIMER_WRITE_PEND_REG              (_OMAP_TIMER_WRITE_PEND_OFFSET \
+                                                       | (WP_NONE << WPSHIFT))
+
+#define OMAP_TIMER_MATCH_REG                   (_OMAP_TIMER_MATCH_OFFSET \
+                                                       | (WP_TMAR << WPSHIFT))
+
+#define OMAP_TIMER_CAPTURE_REG                 (_OMAP_TIMER_CAPTURE_OFFSET \
+                                                       | (WP_NONE << WPSHIFT))
+
+#define OMAP_TIMER_IF_CTRL_REG                 (_OMAP_TIMER_IF_CTRL_OFFSET \
+                                                       | (WP_NONE << WPSHIFT))
+
+#define OMAP_TIMER_CAPTURE2_REG                        (_OMAP_TIMER_CAPTURE2_OFFSET \
+                                                       | (WP_NONE << WPSHIFT))
+
+#define OMAP_TIMER_TICK_POS_REG                        (_OMAP_TIMER_TICK_POS_OFFSET \
+                                                       | (WP_TPIR << WPSHIFT))
+
+#define OMAP_TIMER_TICK_NEG_REG                        (_OMAP_TIMER_TICK_NEG_OFFSET \
+                                                       | (WP_TNIR << WPSHIFT))
+
+#define OMAP_TIMER_TICK_COUNT_REG              (_OMAP_TIMER_TICK_COUNT_OFFSET \
+                                                       | (WP_TCVR << WPSHIFT))
+
+#define OMAP_TIMER_TICK_INT_MASK_SET_REG                               \
+               (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR << WPSHIFT))
+
+#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG                             \
+               (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT))
+
 static u32 omap_reserved_systimers;
 static LIST_HEAD(omap_timer_list);
 static DEFINE_SPINLOCK(dm_timer_lock);

diff --git a/include/clocksource/timer-ti-dm.h b/include/clocksource/timer-ti-dm.h
index e874eed..df3c6c8 100644 (file)
--- a/include/clocksource/timer-ti-dm.h
+++ b/include/clocksource/timer-ti-dm.h
@@ -52,10 +52,6 @@
 #define OMAP_TIMER_TRIGGER_OVERFLOW            0x01
 #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE        0x02
 
-/* posted mode types */
-#define OMAP_TIMER_NONPOSTED                   0x00
-#define OMAP_TIMER_POSTED                      0x01
-
 /* timer capabilities used in hwmod database */
 #define OMAP_TIMER_SECURE                              0x80000000
 #define OMAP_TIMER_ALWON                               0x40000000
@@ -63,16 +59,6 @@
 #define OMAP_TIMER_NEEDS_RESET                         0x10000000
 #define OMAP_TIMER_HAS_DSP_IRQ                         0x08000000
 
-/*
- * timer errata flags
- *
- * Errata i103/i767 impacts all OMAP3/4/5 devices including AM33xx. This
- * errata prevents us from using posted mode on these devices, unless the
- * timer counter register is never read. For more details please refer to
- * the OMAP3/4/5 errata documents.
- */
-#define OMAP_TIMER_ERRATA_I103_I767                    0x80000000
-
 struct timer_regs {
        u32 ocp_cfg;
        u32 tidr;
@@ -192,52 +178,4 @@ u32 omap_dm_timer_modify_idlect_mask(u32 inputmask);
 #define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET   0x54    /* TOCR, 34xx only */
 #define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET 0x58    /* TOWR, 34xx only */
 
-/* register offsets with the write pending bit encoded */
-#define        WPSHIFT                                 16
-
-#define OMAP_TIMER_WAKEUP_EN_REG               (_OMAP_TIMER_WAKEUP_EN_OFFSET \
-                                                       | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_CTRL_REG                    (_OMAP_TIMER_CTRL_OFFSET \
-                                                       | (WP_TCLR << WPSHIFT))
-
-#define OMAP_TIMER_COUNTER_REG                 (_OMAP_TIMER_COUNTER_OFFSET \
-                                                       | (WP_TCRR << WPSHIFT))
-
-#define OMAP_TIMER_LOAD_REG                    (_OMAP_TIMER_LOAD_OFFSET \
-                                                       | (WP_TLDR << WPSHIFT))
-
-#define OMAP_TIMER_TRIGGER_REG                 (_OMAP_TIMER_TRIGGER_OFFSET \
-                                                       | (WP_TTGR << WPSHIFT))
-
-#define OMAP_TIMER_WRITE_PEND_REG              (_OMAP_TIMER_WRITE_PEND_OFFSET \
-                                                       | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_MATCH_REG                   (_OMAP_TIMER_MATCH_OFFSET \
-                                                       | (WP_TMAR << WPSHIFT))
-
-#define OMAP_TIMER_CAPTURE_REG                 (_OMAP_TIMER_CAPTURE_OFFSET \
-                                                       | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_IF_CTRL_REG                 (_OMAP_TIMER_IF_CTRL_OFFSET \
-                                                       | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_CAPTURE2_REG                        (_OMAP_TIMER_CAPTURE2_OFFSET \
-                                                       | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_TICK_POS_REG                        (_OMAP_TIMER_TICK_POS_OFFSET \
-                                                       | (WP_TPIR << WPSHIFT))
-
-#define OMAP_TIMER_TICK_NEG_REG                        (_OMAP_TIMER_TICK_NEG_OFFSET \
-                                                       | (WP_TNIR << WPSHIFT))
-
-#define OMAP_TIMER_TICK_COUNT_REG              (_OMAP_TIMER_TICK_COUNT_OFFSET \
-                                                       | (WP_TCVR << WPSHIFT))
-
-#define OMAP_TIMER_TICK_INT_MASK_SET_REG                               \
-               (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR << WPSHIFT))
-
-#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG                             \
-               (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT))
-
 #endif /* __CLOCKSOURCE_DMTIMER_H */